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LP5521TMX中文资料

June 2007 LP5521

Programmable Three Channel LED Driver

General Description

The LP5521 is a three channel LED driver designed to pro-duce variety of lighting effects for mobile devices. High effi-ciency charge pump enables LED driving over full Li-I on battery voltage range. The device has a program memory for creating variety of lighting sequences. When program mem-ory has been loaded, LP5521 can operate independently without processor control.

LP5521 maintains excellent efficiency over a wide operating range by automatically selecting proper charge pump gain based on LED forward voltage requirements. LP5521 is able to automatically enter power-save mode, when LED outputs are not active and thus lowering current consumption. Three independent LED channels have accurate pro-grammable current sources and PWM control. Each channel has program memory for creating desired lighting sequences with PWM control.

LP5521 has a flexible digital interface. Trigger I/O and 32 kHz clock input allow synchronization between multiple devices. Interrupt output can be used to notify processor, when LED sequence has ended. LP5521 has four pin selectable I2C ad-dresses. This allows connecting up to four parallel devices in one I2C bus. GPO and INT pins can be used as a digital con-trol pin for other devices.

LP5521 requires only four small and low cost ceramic capac-itors.

LP5521 is available in tiny 2.1x1.7x0.6 mm microSMD-20 package and in 4.0x5.0x0.8 mm bumped LLP-24 package. Comprehensive application tools are available, including command compiler for easy LED sequence programming.Features

■Adaptive charge pump with 1x and 1.5x gain provides up to 95% LED drive efficiency

■Charge pump with soft start and overcurrent/short circuit protection

■Low input ripple and EMI

■Very small solution size, no inductor or resistors required ■200 nA typical shutdown current

■Automatic power save mode

■I2C compatible interface

■Independently programmable constant current outputs with 8-bit current setting and 8-bit PWM control

■Typical LED output saturation voltage 50 mV and current matching 1%

■Three program execution engines with flexible instruction set

■Autonomous operation without external control

■Large SRAM program memory

■Two general purpose digital outputs

■microSMD-20 package, 0.4 mm pitch

■Bumped LLP-24 package, 0.5 mm pitch Applications

■Fun / indicator lights

■LCD sub-display backlighting

■Keypad RGB backlighting and phone cosmetics

■Vibra, speakers, waveform generator

Typical Application

20186270

? 2007 National Semiconductor https://www.wendangku.net/doc/092789819.html, LP5521 Programmable Three Channel LED Driver

Connection Diagrams and Package Mark Information

Thin microSMD-20 Package (2.1 x 1.7 x 0.6 mm, 0.4 mm pitch)

NS Package Number TMD20ECA

20186271

Top View

20186272

Bottom View

Package Mark

20186296

Package Mark - Top View

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L P 5521

Connection Diagrams and Package Mark Information

Bumped LLP-24 Package (5 x 4 x 0.8 mm, 0.5 mm pitch)

NS Package Number YQA24A

20186202 Bottom View

20186201

Package Mark - Top View

U = Fab

Z = Assembly

XY = 2 Digit Date Code

TT = Die Traceability

L5521YQ = Product Identification

Ordering Information

Order Number Package Package Marking Supplied As Spec/Flow LP5521TMμSMD5521250 units, Tape-and-Reel NoPb

LP5521TM XμSMD55213000 units, Tape-and-Reel NoPb

LP5521YQ bumped LLP L5521YQ1000 units, Tape-and-Reel NoPb

LP5521YQ X bumped LLP L5521YQ4500 units, Tape-and-Reel NoPb

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Pin Descriptions LP5521TM

Pin #Name Type Description

1A B A Current source output 1B G A Current source output 1C R A Current source output 1D SCL I I 2C Serial interface clock input 1E SDA I/OD I 2C Serial interface data input/output 2A VOUT A Charge pump output 2B ADDR_SEL1I I 2C address select input 2C ADDR_SEL0

I I 2C address select input 2D GPO O General purpose output 2E EN I Chip enable

3A CFLY2N A Negative terminal of charge pump fly capacitor 23B CFLY1N A Negative terminal of charge pump fly capacitor 13C GND G Ground

3D CLK_32K I 32 kHz clock input

3E INT OD/O Interrupt output / General Purpose Output 4A CFLY2P A Positive terminal of charge pump fly capacitor 24B CFLY1P A Positive terminal of charge pump fly capacitor 14C VDD P Power supply pin 4D GND G Ground

4E

TRIG

I/OD

Trigger input/output

A: Analog Pin, G: Ground Pin, P: Power Pin, I: Input Pin, I/O: Input/Output Pin, O: Output Pin, OD: Open Drain Pin

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L P 5521

LP5521 Pin Descriptions LP5521YQ

Pin #Name Type Description

1CFLY2P A Positive terminal of charge pump fly capacitor 2

2CFLY1P A Positive terminal of charge pump fly capacitor 1

3VDD P Power supply pin

4GND G Ground

5CLK_32K I32 kHz clock input

6INT OD/O Interrupt output / General purpose output

7TRIG I/OD Trigger input/output

8N/C

9N/C

10N/C

11N/C

12N/C

13SDA I/OD I2C Serial interface data input/output

14EN I Chip enable

15SCL I I2C Serial interface clock input

16GPO O General purpose output

17R A Current source output

18G A Current source output

19B A Current source output

20ADDR_SEL0I I2C address select input

21ADDR_SEL1I I2C address select input

22VOUT A Charge pump output

23CFLY2N A Negative terminal of charge pump fly capacitor 2

24CFLY1N A Negative terminal of charge pump fly capacitor 1

A: Analog Pin, G: Ground Pin, P: Power Pin, I: Input Pin, I/O: Input/Output Pin, O: Output Pin, OD: Open Drain Pin, N/C:

Not Connected

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Absolute Maximum Ratings (Notes 1, 2)

If Military/Aerospace specified devices are required,please contact the National Semiconductor Sales Office/Distributors for availability and specifications.V(V DD , V OUT , R, G, B)-0.3V to +6.0V Voltage on Logic Pins -0.3V to V DD +0.3V

with 6.0V max Continuous Power Dissipation (Note 3)

Internally Limited Junction Temperature (T J-MAX )125°C

Storage Temperature Range -65°C to +150°C

Maximum Lead Temperature (Soldering)

(Note 4)

ESD Rating (Note 5)Human Body Model:Machine Model:

2 kV 200V

Operating Ratings

(Notes 1, 2)

V DD

2.7 to 5.5V Recommended Charge Pump Load Current I OUT

0 to 100 mA Junction Temperature (T J ) Range -30°C to +125°C Ambient Temperature (T A ) Range (Note 6)

-30°C to +85°C

Thermal Properties

Junction-to-Ambient Thermal

Resistance (θJA ), TMD20 Package (Note 7)

50 - 90°C/W

Junction-to-Ambient Thermal

Resistance (θJA ), YQA24A Package (Note 7)

37 - 90°C/W

Electrical Characteristics

(Notes 2, 8)

Limits in standard typeface are for T J = 25°C. Limits in boldface type apply over the operating ambient temperature range (-30°C < T A < +85°C). Unless otherwise noted, specifications apply to the LP5521 Block Diagram with: 2.7V ≤ V DD ≤ 5.5V, C OUT = C IN =1 μF, C FLY1 = C FLY2 = 0.47 μF. (Note 9).Symbol Parameter Condition

Min Typ Max Units I VDD

Standby supply current

EN = 0 (pin), CHIP_EN = 0 (bit), external 32 kHz clock running or not running

0.22μA EN = 1 (pin), CHIP_EN = 0 (bit), external 32 kHz clock not running 1.0 μA EN = 1 (pin), CHIP_EN = 0 (bit), external 32 kHz clock running

1.4 μA Normal mode supply current

Charge pump and LED drivers disabled

0.25 mA Charge pump in 1x mode, no load, LED drivers disabled 0.70 mA Charge pump in 1.5x mode, no load, LED drivers disabled 1.5 mA Charge pump in 1x mode, no load, LED drivers enabled

1.2 mA Powersave mode supply current

External 32 kHz clock running 10 μA Internal oscillator running

0.25 mA f OSC

Internal oscillator frequency accuracy

-4-7

47

%

Charge Pump Electrical Characteristics

(Note 10)Symbol Parameter

Condition

Min

Typ Max

Units R OUT

Charge pump output resistance

Gain = 1.5x 3.5 ?Gain = 1x

1 ?

f SW Switchin

g frequency

-7

1.25

7MHz %I GND

Ground current

Gain = 1.5x 1.2 mA Gain = 1x

0.5 mA t ON V OUT turn-on time from charge pump off to 1.5x mode V DD = 3.6V, CHIP_EN = H I OUT = 60 mA 100 μs V OUT

Charge pump output voltage

V DD = 3.6V, no load, Gain = 1.5x

4.55

V

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L P 5521

LED Driver Electrical Characteristics (R, G, B Outputs)

Symbol Parameter Condition Min Typ Max Units I

LEAKAGE

R, G, B pin leakage current0.11μA

I

MAX

Maximum Source Current Outputs R, G, B25.5mA

I OUT Accuracy of output current Output current set to 17.5 mA, V

DD

= 3.6V-4

-5

4

5

%

I MATCH Matching (Note 11)I

OUT

= 17.5 mA, V

DD

= 3.6V12%

f

LED

LED PWM switching frequency PWM_HF = 1

Frequency defined by internal oscillator

558Hz

PWM_HF = 0

Frequency defined by 32 kHz clock (internal or

external)

256Hz

V SAT Saturation voltage (Note 12)I

OUT

set to 17.5 mA50100mV

Logic Interface Characteristics

(V(EN) = 1.65V...V

DD

unless otherwise noted)

Symbol Parameter Conditions Min Typ Max Units LOGIC INPUT EN

V

IL

Input Low Level0.5V

V

IH

Input High Level 1.2V

I

I

Logic Input Current?1.0 1.0μA

t

DELAY

Input delay2μs LOGIC INPUT SCL, SDA, TRIG, CLK_32K

V

IL

Input Low Level0.2xV(EN)V

V

IH

Input High Level0.8xV(EN)V

I

I

Input Current-1.0 1.0μA

f

CLK_32K

Clock frequency32kHz

f

SCL

Clock frequency400kHz LOGIC OUTPUT SDA, TRIG, INT

V OL Output Low Level I

OUT

= 3 mA (pull-up current)0.30.5V

I

L

Output Leakage Current 1.0μA

LOGIC INPUT ADDR_SEL0, ADDR_SEL1

V

IL

Input Low Level0.2xV DD V

V

IH

Input High Level0.8xV DD V

I

I

Input Current–1.0 1.0μA LOGIC OUTPUT GPO, INT (in GPO state)

V OL Output Low Level I

OUT

= 3 mA0.30.5V

V OH Output High Level I

OUT

= -2 mA V

DD

- 0.5V

DD

- 0.3V

I

L

Output leakage current 1.0μA

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LP5521

I 2C Timing Parameters (SDA, SCL)

(Note 13)

Symbol Parameter

Limit

Units Min Max f SCL Clock Frequency

400kHz 1Hold Time (repeated) START Condition 0.6 μs 2Clock Low Time 1.3 μs 3Clock High Time

600 ns 4Setup Time for a Repeated START Condition 600 ns 5Data Hold Time 50 ns 6Data Setup Time

100 ns 7Rise Time of SDA and SCL 20+0.1C b 300ns 8Fall Time of SDA and SCL 15+0.1C b

300ns 9Set-up Time for STOP condition

600 ns 10Bus Free Time between a STOP and a START Condition 1.3 μs C b

Capacitive Load for Each Bus Line

10

200

pF

20186298

Note 1:Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings are conditions under which operation of the device is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits and associated test conditions,see the Electrical Characteristics tables.

Note 2:All voltages are with respect to the potential at the GND pins.

Note 3:Internal thermal shutdown circuitry protects the device from permanent damage. Thermal shutdown engages at T J = 150°C (typ.) and disengages at T J = 130°C (typ.).

Note 4:For detailed soldering specifications and information, please refer to National Semiconductor Application Note AN1112 : Micro SMD Wafer Level Chip Scale Package or AN1187 : Leadless Leadframe Package (LLP).

Note 5: The Human body model is a 100 pF capacitor discharged through a 1.5 k ? resistor into each pin. The machine model is a 200 pF capacitor discharged directly into each pin. MIL-STD-883 3015.7

Note 6:In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may have to be derated. Maximum ambient temperature (T A-MAX ) is dependent on the maximum operating junction temperature (T J-MAX-OP = 125°C), the maximum power

dissipation of the device in the application (P D-MAX ), and the junction-to ambient thermal resistance of the part/package in the application (θJA ), as given by the following equation: T A-MAX = T J-MAX-OP – (θJA × P D-MAX ).

Note 7:Junction-to-ambient thermal resistance is highly application and board-layout dependent. In applications where high maximum power dissipation exists,special care must be paid to thermal dissipation issues in board design.

Note 8:Min and Max limits are guaranteed by design, test, or statistical analysis. Typical numbers are not guaranteed, but do represent the most likely norm.Note 9:Low-ESR Surface-Mount Ceramic Capacitors (MLCCs) used in setting electrical characteristics.Note 10:Input, output, and fly capacitors should be of the type X5R or X7R low ESR ceramic capacitor.Note 11:Matching is the maximum difference from the average of the three output's currents.

Note 12:Saturation voltage is defined as the voltage when the LED current has dropped 10% from the value measured at V OUT - 1V.Note 13:Guaranteed by design.

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L P 5521

Typical Performance Characteristics Unless otherwise specified: V

DD

= 3.6V

LED Drive Efficiency vs. Input Voltage Automatic Gain Change

20186221LED Current vs. Output Pin Headroom Voltage

20186222

LED Current vs. Current Register Code

20186223LED Current vs. Supply Voltage

20186207

Charge Pump Efficiency vs. Load Current

20186208

Charge Pump Efficiency vs. Input Voltage

1.5x Mode

20186209

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LP5521

Charge Pump Output Voltage vs. Load Current

20186210

Charge Pump Output Voltage vs. Input Voltage

Automatic Gain Change from 1x to 1.5x

20186211

Charge Pump Automatic Gain Change Hysteresis

20186212

Charge Pump Startup in 1.5x Mode

No Load

20186213

Charge Pump Load Transient Response

in 1.5x Mode (0 to 25.5 mA)

20186214

Charge Pump Line Transient Response

1.5x Mode (V IN 3.5V to 4.0V)

20186215

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L P 5521

Charge Pump Automatic Gain Change (LED V

F

= 3.6V)

20186216Standby Current vs. Input Voltage

20186217

For full LP5521 datasheet please contact nearest National Semiconductor sales office.

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Physical Dimensions inches (millimeters) unless otherwise noted

The dimension for X1 ,X2 and X3 are as given:

X1=1.717 mm ± 0.03 mm X2=2.066 mm ± 0.03 mm X3=0.600 mm ± 0.075 mm

TMD20ECA: Thin microSMD-20, Small Bump

YQA24A: Bumped LLP-24

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L P 5521

LP5521 Notes

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Notes

L P 5521 P r o g r a m m a b l e T h r e e C h a n n e l L E D D r i v e r

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Copyright? 2007 National Semiconductor Corporation

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