ADA4858-3ACPZ-R7中文资料
Single-Supply, High Speed,
Triple Op Amp with Charge Pump
ADA4858-3 Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. T rademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, N orwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 https://www.wendangku.net/doc/0f5995604.html, Fax: 781.461.3113 ?2008 Analog Devices, Inc. All rights reserved.
FEATURES
Integrated charge pump
Supply range: 3 V to 5.5 V
Output range: ?3.3 V to ?1.8 V
50 mA maximum output current for external use at ?3 V High speed amplifiers
?3 dB bandwidth: 600 MHz
Slew rate: 600 V/μs
0.1 dB flatness: 85 MHz
0.1% settling time: 18 ns
Low power
Total quiescent current: 42 mA
Power-down feature
High input common-mode voltage range
?1.8 V to +3.8 V at +5 V supply
Current feedback architecture
Differential gain error: 0.01%
Differential phase error: 0.02°
Available in 16-lead LFCSP
APPLICATIONS
Professional video
Consumer video
Imaging
Active filters
CONNECTION DIAGRAM
7
7
1
4
-
1 NOTES
1. NC = NO CONNECT.
2. EXPOSED PAD, CONNECT TO GROUND.
ADA4858-3
C1_a
C1_b
+
V
S
+
I
N
3
–
I
N
3
O
U
T
3
O
U
T
1
–
I
N
1
+
I
N
1
N
C
CPO
+V S
–IN2
+IN2
10OUT2
9PD
Figure 1.
GENERAL DESCRIPTION
The ADA4858-3 (triple) is a single-supply, high speed current feedback amplifier with an integrated charge pump that eliminates the need for negative supplies in order to output negative voltages or output a 0 V level for video applications. The 600 MHz
?3 dB bandwidth and 600 V/μs slew rate make this amplifier well suited for many high speed applications. In addition, its 0.1 dB flatness out to 85 MHz at G = 2, along with its differential gain and phase errors of 0.01% and 0.02° into a 150 Ω load, make it well suited for professional and consumer video applications. This triple operational amplifier is designed to operate on supply voltages of 3.3 V to 5 V, using only 42 mA of total quiescent current, including the charge pump. To further reduce the power consumption, it is equipped with a power-down feature that lowers the total supply current to as low as 2.5 mA when the amplifier is not being used. Even in power-down mode, the charge pump can be used to power external components. The maximum output current for external use is 50 mA at ?3 V. The amplifier also has a wide input common-mode voltage range that extends from 1.8 V below ground to 1.2 V below the positive rail at a 5 V supply.
The ADA4858-3 is available in a 16-lead LFCSP, and it is designed to work over the extended industrial temperature range of
?40°C to +105°C.
ADA4858-3
Rev. 0 | Page 2 of 16
TABLE OF CONTENTS
Features .............................................................................................. 1 Applications ....................................................................................... 1 Connection Diagram ....................................................................... 1 General Description ......................................................................... 1 Revision History ............................................................................... 2 Specifications ..................................................................................... 3 Absolute Maximum Ratings ............................................................ 5 Maximum Power Dissipation ..................................................... 5 ESD Caution .................................................................................. 5 Pin Configuration and Function Descriptions ............................. 6 Typical Performance Characteristics ............................................. 7 Theory of Operation ...................................................................... 13 Overview ..................................................................................... 13 Charge Pump Operation ........................................................... 13 Applications Information .............................................................. 14 Gain Configurations .................................................................. 14 DC-Coupled Video Signal ........................................................ 14 Multiple Video Driver ................................................................ 14 PD (Power-Down) Pin .............................................................. 15 Power Supply Bypassing ............................................................ 15 Layout .......................................................................................... 15 Outline Dimensions ....................................................................... 16 Ordering Guide .. (16)
REVISION HISTORY
10/08—Revision 0: Initial Version
ADA4858-3
Rev. 0 | Page 3 of 16
SPECIFICATIONS
T A = 25°C, V S = 5 V , G = 2, R F = 301 Ω, R F = 402 Ω for G = 1, R L = 150 Ω, unless otherwise noted. Table 1.
Parameter Conditions Min Typ Max Unit DYNAMIC PERFORMANCE ?3 dB Bandwidth V OUT = 0.1 V p-p, G = 1 600 MHz V OUT = 0.1 V p-p 350 MHz V OUT = 2 V p-p, G = 1 165 MHz V OUT = 2 V p-p 175 MHz Bandwidth for 0.1 dB Flatness V OUT = 2 V p-p 85 MHz Slew Rate V OUT = 2 V step 600 V/μs Settling Time to 0.1% V OUT = 2 V step 18 ns NOISE/DISTORTION PERFORMANCE Harmonic Distortion (HD2/HD3) f C = 1 MHz, V O = 2 V p-p ?86/?94 dBc f C = 5 MHz, V O = 2 V p-p ?71/?84 dBc Crosstalk f = 5 MHz ?60 dB Input Voltage Noise f = 1 MHz 4 nV/√Hz Input Current Noise f = 1 MHz (+IN/?IN) 2/9 pA/√Hz Differential Gain Error 0.01 % Differential Phase Error 0.02 Degrees DC PERFORMANCE Input Offset Voltage ?14 +0.5 +14 mV + nput Bias Current ?2 +0.7 +2 μA ?Input Bias Current ?13 +8 +13 μA Open-Loop Transimpedance 300 390 kΩ INPUT C H
ARACTERISTICS Input Resistance +IN 15 MΩ ?IN 90 Ω Input Capacitance +IN 1.5 pF Input Common-Mode Voltage Range Typical ?1.8 +3.8 V Common-Mode Rejection Ratio ?61 ?54 dB OUTPUT C H
ARACTERISTICS Output Voltage Swing ?1.4 to +3.6 ?1.7 to +3.7 V Output Overdrive Recovery Time Rise/fall, f = 5 MHz 15 ns Maximum Linear Output Current @ V O = 1 V PEAK f C = 1 MHz, HD2 ≤ ?50 dBc 21 mA POWER-DOWN Input Voltage Enabled 1.9 V Powered down 2 V Bias Current ?0.1 +0.1 μA Turn-On Time 0.3 μs Turn-Off Time 1.6 μs POWER SUPPLY Operating Range 3 5.5 V Total Quiescent Current Amplifiers 15 19 21 mA Charge Pump 23 mA Total Quiescent Current When Powered Down Amplifiers 0.15 0.25 0.3 mA Charge Pump 4 mA Positive Power Supply Rejection Ratio ?64 ?60 dB Negative Power Supply Rejection Ratio ?58 ?54 dB Charge Pump Output Voltage ?3.3 ?3 ?2.5 V Charge Pump Sink Current 150 mA
ADA4858-3
Rev. 0 | Page 4 of 16
T A = 25°C, V S = 3.3 V , G = 2, R F = 301 Ω, R F = 402 Ω for G = 1, R L = 150 Ω, unless otherwise noted. Table 2.
Parameter Conditions Min Typ Max Unit DYNAMIC PERFORMANCE ?3 dB Bandwidth V OUT = 0.1 V p-p, G = 1 540 MHz V OUT = 0.1 V p-p 340 MHz V OUT = 2 V p-p, G = 1 140 MHz V OUT = 2 V p-p 145 MHz Bandwidth for 0.1 dB Flatness V OUT = 2 V p-p 70 MHz Slew Rate V OUT = 2 V step 430 V/μs Settling Time to 0.1% V OUT = 2 V step 20 ns NOISE/DISTORTION PERFORMANCE Harmonic Distortion (HD2/HD3) f C = 1 MHz, V O = 2 V p-p ?88/?91 dBc f C = 5 MHz, V O = 2 V p-p ?75/?78 dBc
Crosstalk f = 5 MHz ?60 dB
Input Voltage Noise f = 1 MHz 4 nV/√Hz Input Current Noise f = 1 MHz (+IN/?IN) 2/9 pA/√Hz Differential Gain Error 0.02 % Differential Phase Error 0.03 Degrees DC PERFORMANCE Input Offset Voltage ?14 +0.7 +14 mV +Input Bias Current ?2 +0.6 +2 μA ?Input Bias Current ?13 +7 +13 μA Open-Loop Transimpedance 300 350 kΩ INPUT C H ARACTERISTICS Input Resistance +IN 15 MΩ ?IN 90 Ω Input Capacitance +IN 1.5 pF Input Common-Mode Voltage Range Typical ?0.9 +2.2 V Common-Mode Rejection Ratio ?60 ?54 dB OUTPUT C H ARACTERISTICS Output Voltage Swing ?0.6 to +2.1 ?0.9 to +2.2 V Output Overdrive Recovery Time Rise/fall, f = 5 MHz 15 ns Maximum Linear Output Current @ V O = 1 V PEAK f C = 1 MHz, HD2 ≤ ?50 dBc 20 mA POWER-DOWN Input Voltage Enabled 1.25 V Powered down 1.35 V Bias Current ?0.1 +0.1 μA Turn-On Time 0.3 μs Turn-Off Time 1.6 μs POWER SUPPLY Operating Range 3 5.5 V Total Quiescent Current Amplifiers 14 19 20 mA Charge Pump 21 mA Total Quiescent Current When Powered Down Amplifiers 0.15 0.25 0.3 mA Charge Pump 2 mA Positive Power Supply Rejection Ratio ?63 ?60 dB Negative Power Supply Rejection Ratio ?57 ?54 dB Charge Pump Output Voltage ?2.1 ?2 ?1.8 V Charge Pump Sink Current 45 mA
ADA4858-3
Rev. 0 | Page 5 of 16
ABSOLUTE MAXIMUM RATINGS
MAXIMUM POWER DISSIPATION
Table 3.
The maximum power that can be safely dissipated by the ADA4858-3 is limited by the associated rise in junction temperature. The maximum safe junction temperature for
plastic encapsulated devices is determined by the glass transition temperature of the plastic, approximately 150°C. Temporarily exceeding this limit may cause a shift in parametric performance due to a change in the stresses exerted on the die by the package. Exceeding a junction temperature of 175°C for an extended period can result in device failure.
Parameter Rating Supply Voltage 6 V
Internal Power Dissipation 1
16-Lead LFCSP See Figure 2Input Voltage (Common Mode) (?V S ? 0.2 V) to (+V S ? 1.2 V) Differential Input Voltage ±V S
Output Short-Circuit Duration Observe Power Derating Curves Storage Temperature Range ?65°C to +125°C Operating Temperature Range ?40°C to +105°C
Lead Temperature
(Soldering, 10 sec)
300°C To ensure proper operation, it is necessary to observe the maximum power derating curves in Figure 2.
2.5
2.0
1.5
1.0
0.5
0–40
–20020
406080100
M A X I M U M P O W E R D I S S I P A T I O N (W )
AMBIENT TEMPERATURE (°C)
07714-002
1
Specification is for device in free air.
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Figure 2. Maximum Power Dissipation vs. Temperature for ADA4858-3
ESD CAUTION
ADA4858-3
Rev. 0 | Page 6 of 16
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
07714-003
NOTES
1. NC = NO CONNECT.
2. EXPOSED PAD, CONNECT TO GROUND.
ADA4858-3
TOP VIEW (Not to Scale)
C1_a C1_b +V S
+I N 3
–I N 3
O U T 3
O U T 1
–I N 1
+I N 1
N C
CPO +V S –IN2+IN2OUT2PD
Figure 3. Pin Configuration.
Table 4. Pin Function Descriptions
Pin No. Mnemonic Description
1 +V S Positive Supply for Charge Pump.
2 C1_a Charge Pump Capacitor Side a.
3 C1_b Charge Pump Capacitor Side b.
4 CPO Charge Pump Output.
5 +V S Positive Supply.
6 +IN3
Noninverting Input 3.
7 ?IN3 Inverting Input 3. 8 OUT3 Output 3. 9 PD Power Down. 10 OUT2 Output 2. 11 ?IN2 Inverting Input 2. 12 +IN2
Noninverting Input 2.
13 NC No Connect. 14 +IN1
Noninverting Input 1.
15 ?IN1 Inverting Input 1. 16 OUT1 Output 1.
17 (EPAD) Exposed Pad (EPAD)
The exposed pad must be connected to ground.
ADA4858-3
Rev. 0 | Page 7 of 16
TYPICAL PERFORMANCE CHARACTERISTICS
V S = 5 V , G = 2, R F = 301 Ω, R F = 402 Ω for G = 1, R F = 200 Ω for G = 5, R L = 150 Ω, large signal V OUT = 2 V p-p, small signal V OUT = 0.1 V p-p, and T = 25oC, unless otherwise noted.
2
–8–7
–6–5–4–3–2–1011101001000N O R M A L I Z E D C L O S E D -L O O P G A I N (d B )
FREQUENCY (MHz)07714-00
4
2
–8
–7
–6–5–4–3–2–1011101001000
N O R M A L I Z E D C L O S E D -L O O P G A I N (d B )
FREQUENCY (MHz)
07714-0
07
Figure 4. Small Signal Frequency Response vs. Gain
Figure 7. Large Signal Frequency Response vs. Gain
2
–8
–7
–6–5–4–3–2–1011101001000
N O R M A L I Z E D C L O S E D -L O O P G A I N (d B )
FREQUENCY (MHz)
07714-005
2
–8–7
–6–5–4–3–2–1011
10
100
1000
N O R M A L I Z E D C L O S E D -L O O P G A I N (d B )
FREQUENCY (MHz)
07714-008Figure 5. Small Signal Frequency Response vs. Gain
Figure 8. Large Signal Frequency Response vs. Gain
2
–8
–7
–6–5–4–3–2–1011101001000
N O R M A L I Z E D C L O S E D -L O O P G A I N (d B )
FREQUENCY (MHz)
07714-006
2
–8–7–6–5–4–3–2–10
11
10
1001000
N O R M A L I Z E D C L O S E D -L O O P G A I N (d B )
FREQUENCY (MHz)
07714-009
Figure 6. Small Signal Frequency Response vs. Feedback Resistor
Figure 9. Large Signal Frequency Response vs. Feedback Resistor
ADA4858-3
Rev. 0 | Page 8 of 16
0.2
–0.8–0.7
–0.6–0.5–0.4–0.3–0.2–0.100.11101001000N O R M A L I Z E D C L O S E D -L O O P G A I N (d B )
FREQUENCY (MHz)07714-010
Figure 10. Large Signal 0.1 dB Flatness vs. Supply Voltage
0–100
–90–80–70–60–50–40–30–20–101
10
D I S T O R T I O N (d B c )
FREQUENCY (MHz)
100
07714-011
Figure 11. Harmonic Distortion vs. Frequency
10–70–60–50–40–30–20–100P S R R (d B )
FREQUENCY (MHz)
0.1
110010
400
07714-012
Figure 12. Power Supply Rejection Ratio (PSRR) vs. Frequency
0.2–0.8
–0.7
–0.6–0.5–0.4–0.3–0.2–0.100.11101001000
N O R M A L I Z E D C L O S E D -L O O P G A I N (d B )
FREQUENCY (MHz)
07714-013
Figure 13. Large Signal 0.1 dB Flatness vs. Feedback Resistor
0–100
–90
–80–70–60–50–40–30–20–101
10
D I S T O R T I O N (d B c )
FREQUENCY (MHz)
100
07714-014
Figure 14. Harmonic Distortion vs. Frequency, V S = 3.3 V
–10
–70–60
–50
–40
–30–20
C M R R (d B )
FREQUENCY (MHz)
0.1
110010
400
07714-015
Figure 15. Common-Mode Rejection Ratio (CMRR) vs. Frequency
ADA4858-3
Rev. 0 | Page 9 of 16
–30–100
–80–90–70–60–50–40F O R W A R D I S O L A T I O N (d B )
FREQUENCY (MHz)
0.1
110010
40007714-016
Figure 16. Forward Isolation vs. Frequency
0.15
–0.15
–0.10
–0.05
00.050.10O U T P U T V O L T A G E (V )
TIME (5ns/DIV)
07
714-017
Figure 17. Small Signal Transient Response vs. Supply Voltage
0.15
–0.15
–0.10
–0.05
0.05
0.10O U T P U T V O L T A G E (V )
TIME (5ns/DIV)
07714-018
Figure 18. Small Signal Transient Response vs. Capacitive Load
–20–30–90–80–70–60–50–40C R O S S T A L K (d B )
FREQUENCY (MHz)
0.1
110010
400
07714-019
Figure 19. Crosstalk vs. Frequency
1.5
–1.5
–1.0
–0.5
00.51.0 2.0
–1.0
–0.5
0.5
1.0
1.5
O U T P U T V O L T A G E , V S = 5V (V )
O U T P U T V O L T A G E , V S = 3.3V (V )
TIME (5ns/DIV)
07714-020
Figure 20. Large Signal Transient Response vs. Supply Voltage
1.5
–1.5
–1.0
–0.5
0.5
1.0O U T P U T V O L T A G E (V )
TIME (5ns/DIV)
07714-021
Figure 21. Large Signal Transient Response vs. Capacitive Load
ADA4858-3
Rev. 0 | Page 10 of 16
0.15
–0.15
–0.10
–0.0500.05
0.10O U T P U T V O L T A G E (V )
TIME (5ns/DIV)
0771
4-022
Figure 22. Small Signal Transient Response vs. Capacitive Load
2.0–2.0
–1.6–1.2–0.8–0.400.40.81.21.60.5–0.5–0.4
–0.3–0.2–0.100.10.2
0.30.4
–5
4035302520151050A M P L I T U D E (V )
E R R O R (%)
TIME (ns)
07714-023
Figure 23. Settling Time (Rise)
5–3
–2–101234 2.5–1.5–1.0
–0.500.51.01.5
2.0O U T P U T V O L T A G E (V )
I N P U T V O L T
A G E (V )
TIME (20ns/DIV)
07714-024
Figure 24. Output Overdrive Recovery
1.5
–1.5
–1.0
–0.5
0.5
1.0
O U T P U T V O L T A G E (V )
TIME (5ns/DIV)
07714-025
Figure 25. Large Signal Transient Response vs. Capacitive Load
2.0–2.0
–1.6
–1.2
–0.8–0.400.40.8
1.21.60.5–0.5–0.4
–0.3–0.2–0.100.1
0.2
0.30.4–540
35
302520151050A M P L I T U D E (V )
E R R O R (%)
TIME (ns)
07714-026
Figure 26. Settling Time (Fall)
3.0–2.0
–1.5
–1.0–0.500.51.01.5
2.0
2.5 1.5
1.0
–1.0
–0.5
0.5
O U T P U T V O L T A G E (V )
I N P U T V O L T A G E
(V )
TIME (20ns/DIV)
07714-027
Figure 27. Output Overdrive Recovery, V S = 3.3 V
ADA4858-3
Rev. 0 | Page 11 of 16
1000900800
700
600500400300200100
00.5
1.0 1.5
2.0 2.50S L E W R A T E (V /μs )
OUTPUT VOLTAGE (V p-p)
077
14-028
Figure 28. Slew Rate vs. Output Voltage
–3.2
–2.8–2.4–2.0–1.6–1.2–0.8–0.424222018
161412
1082.5
5.0
4.5
4.03.53.0C H A R G E P U M P O U T P U T V O L T A G E (V )
C U R R E N T (m A )
CHARGE PUMP SUPPLY VOLTAGE (V)
07714-029
Figure 29. Charge Pump Output Voltage and Current vs. Supply Voltage
2018161412108642
0100
1k 10k
100k 1M
I N P U T V O L T A G E N O I S E (n
V H z )
FREQUENCY (Hz)
07714-030
Figure 30. Input Voltage Noise vs. Frequency
1000900800700600500400300200100
00.5
1.0 1.5
2.0
2.5
S L E W R A T E (V /μs )
OUTPUT VOLTAGE (V p-p)
07714-031
Figure 31. Slew Rate vs. Output Voltage
1.5
–1.5
–1.0–0.500.51.0
6
54
3
2
1
O U T
P U T V O L T A G E (V )
P O W E R D O W N V O L T A G E (V )
TIME (400ns/DIV)
07714-032
Figure 32. Enable/Power Down Time
100908070605040302010
0100
1k
10k
100k
1M
I N P U T C U R R E N T N O I S E (p A H z
)
FREQUENCY (Hz)
07714-033
Figure 33. Input Current Noise vs. Frequency
ADA4858-3
Rev. 0 | Page 12 of 16
–100
–105–110–115–120–125–130–135–140–145
–150
P O W E R (d B m )
07714-201
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
FREQUENCY (MHz)
CHARGE PUMP HARMONICS
–100
V S = 3.3V
–105–110–115
–120–125–130–135–140–145–150
P O W E R (d B m )
07714-202
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
FREQUENCY (MHz)
CHARGE PUMP HARMONICS
Figure 34. Output Spectrum vs. Frequency
Figure 35. Output Spectrum vs. Frequency
ADA4858-3
Rev. 0 | Page 13 of 16
THEORY OF OPERATION
OVERVIEW
The ADA4858-3 is a current feedback amplifier designed for exceptional performance as a triple amplifier with a variable gain capability. Its specifications make it especially suitable for SD and HD video applications. The ADA4858-3 provides HD video output on a single supply as low as 3.0 V while only consuming 13 mA per amplifier. It also features a power-down pin (PD) that reduces the quiescent current to 2 mA when activated. The ADA4858-3 can be used in applications that require both ac- and dc-coupled inputs and outputs. The output stage on the ADA4858-3 is capable of driving 2 V p-p video signals into two doubly terminated video loads (150 Ω each) on a single 5 V supply. The input range of the ADA4858-3 includes ground, while the output range is limited by the output headroom set by the voltage drop across the two diodes from each rail, which occurs 1.2 V from the positive and negative supply rails.
CHARGE PUMP OPERATION
The on-board charge pump creates a negative supply for the amplifier. It provides different negative voltages depending on the power supply voltage. For a +5 V supply, the negative supply generated is equal to ?3 V with 150 mA of output supply current, and for a +3.3 V supply, the negative supply is equal to ?2 V with 45 mA of output supply current.
Figure 36 shows the charging cycle when the supply voltage +V S charges C1 through Φ1 to ground. During this cycle, C1 quickly charges to reach the +V S voltage. The discharge cycle then begins with switching Φ1 off and switching Φ2 on, as shown in Figure 37. When C1 = C2, the charge in C1 is divided between the two capacitors and slowly increases the voltage in C2 until it reaches a predetermined voltage (?3 V for +5 V supply and ?2 V for
+3.3 V supply). The typical charge pump charging and discharging frequency is 550 kHz with a 150 Ω load and no input signal. This frequency changes with the load current, and it can reach the dc level if the amplifier is powered down.
07714-137+V S
CPO
Figure 36. C1 Charging Cycle
07714-138
+V S
CPO
Figure 37. C1 Discharging Cycle
The ADA4858-3 specifications make it especially suitable for SD and HD video applications. It also allows dc-coupled video signals with its black level set to 0 V and its sync tip at ?300 mV for YPbPr video.
The charge pump is always on, even when the power-down pin (PD) is enabled and the amplifier is off. However, if a negative current is not used, it is in an idle state. Each amplifier needs ?6.3 mA of current, which totals ?19 mA for all three amplifiers. This means additional negative current may be available by the charge pump for external use. Pin 4 (CPO) is the charge pump output, which provides access to the negative supply generated by the charge pump. Placing a 1 μF charge capacitor at the CPO pin is essential to hold the charge.
If the negative supply is used to power another device in the system, it is only possible for the 5 V supply operation. In the 3.3 V supply operation, the charge pump output current is very limited. The capacitor at the CPO pin, which regulates the ripple of the negative voltage, can be used as a coupling capacitor for the external device. However, the charge pump current should be limited to a maximum of 50 mA for external use. When powering down the ADA4858-3, the charge pump is not affected and its output voltage and current is still available for external use.
ADA4858-3
Rev. 0 | Page 14 of 16
APPLICATIONS INFORMATION
GAIN CONFIGURATIONS
The ADA4858-3 is a single-supply, high speed, voltage feedback amplifier. Table 5 provides a convenient reference for quickly determining the feedback and gain set resistor values and band-width for common gain configurations.
Table 5. Recommended Values and Frequency Performance 1
Gain R F (Ω) R G (Ω) Small Signal
?3 dB BW (MHz) Large Signal 0.1 dB
Flatness (MHz) 1 402 N/A 600 88 2 249 249 450 95 5 200 40 160
35
1
Conditions: V S = 5 V, T A = 25°C, R L = 150 Ω.
Figure 38 and Figure 39 show the typical noninverting and inverting configurations and the recommended bypass capacitor values.
07714-139
V IN
OUT
10μF
Figure 38. Noninverting Gain Configuration
07714-140
V V OUT
Figure 39. Inverting Gain Configuration
DC-COUPLED VIDEO SIGNAL
The ADA4858-3 does not have a rail-to-rail output stage. The output can be within 1 V of the rails. Having a charge pump on-board that can provide ?3 V on a +5 V supply and ?2 V on +3.3 V supply makes this part excellent for video applications. In dc-coupled applications, the black color has a 0 V voltage reference. This means that the output voltage should be able to reach 0 V , which is feasible with the presence of the charge pump. Figure 40 shows the schematic of a dc-coupled, single-supply application. It is similar to dual-supply application, where the input is properly terminated with a 50 Ω resistor to ground. The amplifier itself is set at a gain of 2 to account for the input termination loss.
The choice of R F and R G should be carefully considered for maximum flatness vs. power dissipation trade-off. In this case, the flatness is over 90 MHz, which is more than the high definition video requirement.
07714-141
V IN
OUT
Figure 40. DC-Coupled, Single-Supply Schematic
MULTIPLE VIDEO DRIVER
In applications requiring that multiple video loads be driven simultaneously, the ADA4858-3 can deliver 5 V supply operation. Figure 41 shows the ADA4858-3 configured with two video loads, and Figure 42 shows the two video load performances.
07714-142
R F V OUT 1
OUT 2
Figure 41. Video Driver Schematic for Two Video Loads
6.5
6.0
5.55.04.54.03.53.02.5
1
10
1001000
C L O S E
D -L O O P G A I N (d B )
FREQUENCY (MHz)
07714-040
Figure 42. Large Signal Frequency Response for Various Loads
ADA4858-3
Rev. 0 | Page 15 of 16
PD (POWER-DOWN) PIN
The ADA4858-3 is equipped with a PD (power-down) pin for all three amplifiers. This allows the user the ability to reduce the quiescent supply current when an amplifier is not active. The power-down threshold levels are derived from ground level. The amplifiers are powered down when the voltage applied to the PD pin is greater than a certain voltage from ground. In a 5 V supply application, the voltage is greater than 2 V , and in a 3.3 V supply application, the voltage is greater than 1.5 V . The amplifier is enabled whenever the PD pin is left floating (not connected). If the PD pin is not used, it is best to leave it floating or connected to ground. Note that the power-down feature does not control the charge pump output voltage and current. Table 6. Power-Down Voltage Control
PD Pin 5 V 3.3 V Not A ctive <1.5 V <1 V Active
>2 V
>1.5 V
POWER SUPPLY BYPASSING
Careful attention must be paid to bypassing the power supply pins of the ADA4858-3. High quality capacitors with low equivalent series resistance (ESR), such as multilayer ceramic capacitors (MLCCs), should be used to minimize supply voltage ripple and power dissipation. A large, usually tantalum,
capacitor between 2.2 μF to 47 μF located in proximity to the ADA4858-3 is required to provide good decoupling for lower frequency signals. The actual value is determined by the circuit transient and frequency requirements. In addition, 0.1 μF MLCC decoupling capacitors should be located as close to each of the power supply pins and across from both supplies as is physically possible, no more than 1/8-inch away. The ground returns should terminate immediately into the ground plane. Locating the bypass capacitor return close to the load return minimizes ground loops and improves performance.
LAYOUT
As is the case with all high speed applications, careful attention to printed circuit board (PCB) layout details prevents associated board parasitics from becoming problematic. The ADA4858-3 can operate at up to 600 MHz; therefore, proper RF design techniques must be employed. The PCB should have a ground plane covering all unused portions of the component side of the board to provide a low impedance return path. Removing the ground plane on all layers from the area near and under the input and output pins reduces stray capacitance. Signal lines connecting the feedback and gain resistors should be kept as short as possible to minimize the inductance and stray
capacitance associated with these traces. Termination resistors and loads should be located as close as possible to their respective inputs and outputs. Input and output traces should be kept as far apart as possible to minimize coupling (crosstalk) through the board. Adherence to microstrip or stripline design techniques for long signal traces (greater than 1 inch) is recommended. For more information on high speed board layout, see “A Practical Guide to High-Speed Printed-Circuit-Board Layout ”, Analog Dialogue, Volume 39, Number 3, September 2005 at https://www.wendangku.net/doc/0f5995604.html, .
ADA4858-3
Rev. 0 | Page 16 of 16
OUTLINE DIMENSIONS
COMPLIANT TO JEDEC STANDARDS MO-220-VGGC
COPLANARITY
0.08
PLANE
072808-A
FOR PROPER CONNECTION OF THE EXPOSED PAD, REFER TO THE PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
SECTION OF THIS DATA SHEET.
Figure 43.16-Lead Lead Frame Chip Scale Package [LFCSP_VQ]
4 mm × 4 mm Body, Very Thin Quad
(CP-16-4)
Dimensions shown in millimeters
ORDERING GUIDE
Model Temperature Range Package Description Package Option Ordering Quantity
ADA4858-3ACPZ-R21–40°C to +105°C 16-Lead LFCSP_VQ CP-16-4
250 ADA4858-3ACPZ-R71
–40°C to +105°C 16-Lead LFCSP_VQ CP-16-4 1,500 ADA4858-3ACPZ-RL 1–40°C to +105°C 16-Lead LFCSP_VQ CP-16-4
5,000
1
Z = RoHS Compliant Part.
?2008 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D07714-0-10/08(0)