74ls160功能表

74160 (Counter)

4-Bit Decade Counter with Synchronous Load and Asynchronous Clear

Default Signal Levels: GND--A, B, C, D, CLK

VCC--LDN, ENT, ENP, CLRN

AHDL Function Prototype (port name and order also apply to V erilog HDL): FUNCTION 74160 (clk, ldn, clrn, enp, ent, d, c, b, a)

RETURNS (qd, qc, qb, qa, rco);

Inputs | Outputs

CLK LDN CLRN ENP ENT D C B A | QD QC QB QA RCO X X L X X | L L L L L

L H X X d c b a | d c b a *

H H X L | QD QC QB QA *

H H L X | QD QC QB QA L

H H H H | L L L L L

H H H H | L L L H L

H H H H | L L H L L

H H H H | L L H H L

H H H H | L H L L L

H H H H | L H L H L

H H H H | L H H L L

H H H H | L H H H L

H H H H | H L L L L

H H H H | H L L H H

* RCO = QD & QA & ENT

See also:

Counter Macrofunctions

Megafunctions/LPM

Old-Style Macrofunctions (by function)

Unused Inputs to Primitives, Megafunctions & Macrofunctions