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ADN2880XCHIPS-WP中文资料

3.2 Gbps, 3.3 V, Low Noise, Transimpedance Amplifier

ADN2880

Rev. 0

Information furnished by Analog Devices is believed to be accurate and reliable. However , no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. T rademarks and registered trademarks are the property of their respective owners.

FEATURES

Bandwidth: 2.5 GHz

Optical sensitivity: ?24.2 dBm 1

Differential transimpedance: 4400 V/A Power dissipation: 70 mW

Differential output swing: 260 mV p-p Input overload current: 4.3 mA p-p On-chip RSSI function

Low frequency cutoff: 20 kHz

On-chip PD filter: R F = 200 Ω, C F = 20 pF Die size: 0.7 mm × 1.2 mm

APPLICATIONS

3.2 Gbps or below optical receivers SONET/GbE/FC optical receivers SFF-8472-compliant receivers

PIN/APD-TIA receive optical subassemblies (ROSA)

GENERAL DESCRIPTION

The ADN2880 is a 3.3 V , high gain SiGe transimpedance

amplifier (TIA). The TIA converts the small signal current of a photo detector into differential voltage output. The ADN2880 features a 315 nA typical input-referred noise, enabling an optical sensitivity of ?24.2 dBm (0.85 A/W PIN). With a bandwidth of 2.5 GHz, the ADN2880 allows a data rate operation up to 3.2 Gbps. Typical power dissipation is approximately 70 mW .

To facilitate the assembly in small form factor packages, such as TO-46 headers, the ADN2880 provides an on-chip RC filter (200 Ω, 20 pF) and features a 20 kHz low frequency cutoff without using an external capacitor. An on-chip RSSI circuit, which generates a voltage proportional to the average photo-diode current, is also available for power monitoring and assembly alignment.

The ADN2880 is available in die form. With a chip area of 1.2 mm × 0.7 mm, the TIA layout is specifically optimized for TO-Can-based packages.

Based on 1550 nm PIN, responsivity = 0.85 A/W, ER = 9 dB, BER < 10?10.

FUNCTIONAL BLOCK DIAGRAM

04945-001

Figure 1.

ADN2880

Rev. 0 | Page 2 of 12

TABLE OF CONTENTS

Features..............................................................................................1 Applications.......................................................................................1 General Description.........................................................................1 Functional Block Diagram..............................................................1 Revision History...............................................................................2 Electrical Specifications...................................................................3 Absolute Maximum Ratings............................................................4 ESD Caution..................................................................................4 Pad Layout and Function Descriptions..........................................5 Typical Performance Characteristics..............................................6 Assembly Recommendations...........................................................9 Outline Dimensions.......................................................................12 Die Information..........................................................................12 Ordering Guide.. (12)

REVISION HISTORY

7/05—Revision 0: Initial Version

ADN2880

Rev. 0 | Page 3 of 12

ELECTRICAL SPECIFICATIONS

Minimum/maximum VCC = 3.3 V ± 0.3 V , T AMBIENT = ?40°C to +95°C; typical VCC = 3.3 V , T AMBIENT = 25°C, unless otherwise noted. Table 1.

Parameter Conditions Min Typ Max Unit

DYNAM I

C PERFORMANCE Bandwidth (BW)1?3 dB 1.9 2.5 GHz Total Input Referred RMS Noise (I RMS ) C

D = 0.8 pF, dc to 2.1 GHz 315 485 nA Total Input Referred RMS Noise (I RMS ) C D = 0.6 pF, dc to 2.1 GHz

300 nA Small Signal Transimpedance (Z T )1

100 MHz, differential 2700 4400 6200 V/A 100 MHz, single-ended 1350 2200 3100 V/A Low Frequency Cutoff CAP = open, I IN = 20 μA 20 kHz CAP = 1 nF, I IN = 20 μA

1.0 kHz Output Return Loss DC to 3.5 GHz, differential ?26 ?20 dB Input Overload Current ER = 10 dB, at 95°C 1

2.11 4.3 mA p-p Maximum Differential Output Swing I IN, P- P = 2.0 mA 170 260 375 mV p-p Output Data Transition Time I IN, P-P = 1.0 mA; 20% to 80% rise/fall time 60 ps PSRR I IN = 0 mA, <10 MHz 39 dB Group Delay Variation 1.0 GHz to

3.0 GHz 50 ps Transimpedance Ripple 50 MHz to 1.0 GHz, single-ended 0.93 dB Deterministic Jitter 10 μA < I IN, P- P ≤ 100 μA, K28.5 @ 3.2 Gbps 16 ps p-p 100 μA < I IN, P- P ≤ 2.0 mA, K28.5 @ 3.2 Gbps 25 ps p-p 10 μA < I IN, P- P ≤ 2.0 mA, PRBS 231 ? 1 at OC48 (FEC) 38 ps p-p Linear Output Range Differential, <1 dB compression 210 mV p-p Linear Input Current Range Single-ended, <1 dB compression 53 μA p-p DC PERFORMANCE Power Dissipation I IN, AVE = 0 mA 70 110 mW

nput Voltage Compliance voltage 0.85 V Output Common-Mode Voltage DC (50 Ω) terminated to VCC VCC ? 0.12 V Output I mpedance Single-ended 50 Ω PD FILTER Resistance R F 200 Ω PD FILTER Capacitance C F 20 pF RSSI Gain I IN, AVE = 5 μA to 1 mA 0.85 V/mA RSSI Offset I IN, AVE = 10 μA 8.0 mV RSSI Accuracy 5 μA < I IN, P- P ≤ 20 μA ±7 % 20 μA < I IN, P- P ≤ 1 mA

±3 %

An equivalent I IN, P-P = 13 μA current signal is applied to the TIA input. No input capacitor is applied.

ADN2880

Rev. 0 | Page 4 of 12

ABSOLUTE MAXIMUM RATINGS

Table 2.

Parameter Rating Supply Voltage (VCC to GND) 5 V Maximum Voltage to All Input and Output Signal Pins

VCC + 0.4 V Minimum Voltage to All Input and Output Signal Pins

GND – 0.4 V Maximum Input Current 10 mA

Storage Temperature Range ?65°C to +125°C Operating Ambient Temperature Range ?40°C to +95°C Maximum Junction Temperature 125°C Die Attach Temperature (<30 sec) 410°C

Stresses above those listed under Absolute Maximum Rating may cause permanent damage to the device. This is a stress

rating only; functional operation of the device at these or any

other conditions above those indicated in the operational

section of this specification is not implied. Exposure to absolute

maximum rating conditions for extended periods may affect

device reliability.

ESD CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance

degradation or loss of functionality.

ADN2880

Rev. 0 | Page 5 of 12

PAD LAYOUT AND FUNCTION DESCRIPTIONS

04945-002

GND

Figure 2. Pad Layout

Table 3. Pad Function Descriptions

Pad No.

Mnemonic

Pin Type 1

Description

1 GND P Ground. (Input return.)

2 IN AI Current Input. Bond directly to a photodiode (PD) anode.

3 TEST AI Test Probe Pad. Do not connect. 4, 5 FILTER AO Filter Output. Pad

4 and Pad

5 are metal connected. Optional bond to a PD cathode.

6 GND P Ground.

7 RSSI AO Voltage Output. Provides average input current monitoring. If not used, connect to ground.

8 CAP A Low Frequency Cutoff (LFC) Setpoint. For SONET applications, see Figure 10 and contact sales

for assembly details.

9, 10, 13, 14 GND P Ground. (Output return.) 11 OUTB AO Negative Output, CML, On-Chip 50 Ω Termination (AC or DC Termination). 12 OUT AO Positive Output, CML, On-Chip 50 Ω Termination (AC or DC Termination). 15 VCCF LTER P On-Chip Filter Supply. Connect to VCC to Enable On-Chip RC Filter (200 Ω, 20 pF). Leave

unconnected if not used.

16, 17 VCC P 3.3 V Supply. Place a 200 pF, RF decoupling capacitor close to the power pad to reduce

the power noise.

P = power; AI = analog input; and AO = analog output.

ADN2880

Rev. 0 | Page 6 of 12

TYPICAL PERFORMANCE CHARACTERISTICS

04945-017

FREQUENCY (Hz)

100G

10M

100M

10G T Z (d B -Ω)

7060

6555

5045403530

Figure 3. Single-Ended Transimpedance vs. Frequency

04945-018

TEMPERATURE (°C)

100

–40–200

2040

6080T Z (k Ω)

5.0

4.84.6

4.4

4.2

4.0

3.8

Figure 4. Differential Transimpedance vs. VCC and Temperature

04945-027

I INPP (μA)

100

0102030506040

708090T Z (

k Ω)

5.55.04.5

4.03.52.53.02.0

Figure 5. Differential Transimpedance vs. Input Current 04945-019TEMPERATURE (°C)

100

–40

80–202060B A N D W I D T H (G H z )

3.2

3.0

2.8

2.6

2.4

2.2

2.0

Figure 6. Bandwidth vs. VCC and Temperature

04945-020TEMPERATURE (°C)

100

–40

80–202060P O W E R D I S S I P A T I O N (m W )

90858075

6055

Figure 7. Power Dissipation vs. VCC and Temperature

04945-021

FREQUENCY (Hz)

10M

100M

1G S

D D 22

–20

–25

–30–40

–35

–45

–50

Figure 8. SDD22 vs. Frequency up to 3.5 GHz, CAP = Open

ADN2880

Rev. 0 | Page 7 of 12

04945-007

INPUT CURRENT (μA)

1,000

100

L O W F R E Q U E N C Y C U T O F F (k H z )

1,000

100

Figure 9. Low Frequency Cutoff vs. Input Current

04945-031

EXTERNAL CAPACITANCE AT CAP (pF)

10,000

101001,000L O W F R E Q U E N C Y C U T O F F (k H z

)

1816

14121086420

Figure 10. Low Frequency Cutoff vs. Capacitance at CAP

04945-024

I IN (μA)

051510

202530V R S S I

(m V )

2015

Figure 11. RSSI Voltage Output vs. Input Current (0 μA to 35 μA)

04945-008I IN (mA)

012

34V R S S

I (V )

3.0

2.5

2.0

1.5

1.0

0.5

Figure 12. Full-Scale of RSSI Voltage Output vs. Input Current

04945-028

TEMPERATURE (°C)

–40

–10

–2520535506580I R M S N O I S E (n A )

330340300310320280290270260

250350

Figure 13. Input Noise vs. Temperature with 2 GHz Low-Pass Filter

04945-048

PHOTODIODE CAPACITANCE (pF)

1.0

00.2

0.40.60.8

I N P U T R E F E R R E D R M S N O I S E

(n A )

350

325

300

275

250

Figure 14. Input Referred Noise (DC to 2.0 GHz) vs.

Photodiode Capacitance C D (pF)

ADN2880

Rev. 0 | Page 8 of 12

04945-011

52.9ps/DIV

OPTICAL POWER –22.7dBm

5.0m V /D I

Figure 15. Output Eye at 3.2 Gbps with BER <10?10 (Based on a 1550 nm PIN,

Responsivity = 0.91 A/W, ER = 9 dB, PRBS 231)

04945-010

FREQUENCY (GHz)

3G R O U P D E L A Y (p

s )

–25

–50

Figure 16. Group Delay vs. Frequency

04945-030

TEMPERATURE (°C)

–40

–10

5–252035506580I N P U T O V E R L O A D C U R R E N T (m A

p -p )

5.5

5.0

4.5

4.0

3.5

3.0

Figure 17. Input Overload Current vs. Temperature

ADN2880

Rev. 0 | Page 9 of 12

ASSEMBLY RECOMMENDATIONS

Coplanar PIN Photodiode for SDH/SONET

04945-042

C B

C A

VCC

OUTB OUT C PD

VPD

Figure 18. 5-Pin TO-46 with External Photodiode Supply V PD

Connected Through the FILTER Pin

04945-032

Figure 19. Equivalent Circuit of the Assembly Including Bond Wires

Dual Planar PIN/APD Photodiode for SDH/SONET

04945-049

C B

C A

VCC

OUTB OUT

C P

D PD

VPD

Figure 20. 5-Pin TO-46 with External Photodiode Supply V PD to

a Dual Planar PIN or APD

04945-050

Figure 21. For Dual Planar PDs, No Connection to FILTER Pin

Table 4. Bill of Materials (BOM)

Component Description PD 1× vendor specific, 2.5 Gbps, photodiode TIA 1× ADN2880 (0.7 mm × 1.2 mm), 3.2 Gbps,

transimpedance amplifier

C B 1× 200 pF, RF single-layer capacitor C P

D 1× 560 pF, RF single-layer capacitor C A 1× 1000 pF, ceramic capacitor (optional for SDH)

Notes

One mil thickness, gold wire, ball bond recommended. Minimize all GND bond-wire lengths.

Minimize IN, FILTER, OUT, and OUTB bond-wire lengths. Maintain symmetry in length and orientation between OUT

and OUTB bond wires.

Maintain symmetry in length and orientation between IN and FILTER bond wires.

Maintain symmetry between IN/FILTER and OUT/OUTB bond wires.

ADN2880

Rev. 0 | Page 10 of 12

PIN Photodiode for a Non-SDH/SONET Application

04945-044

C B

VCC

OUTB OUT

S C

RSSI

Figure 22. Coplanar PIN and RSSI Layout for a 5-Pin TO-46

04945-04

Figure 23. Equivalent Circuit with Bond Wires, as Shown in Figure 22

C B

VCC

OUTB OUT

S C

RSSI

04945-022

Figure 24. Dual Planar PIN and RSSI Layout for a 5-Pin TO-46

04945-040

Figure 25. Side View of the Assembly, as Shown in Figure 22

Table 5. Bill of Materials (BOM)

Component Description PD 1× vendor specific, 2.5 Gbps, photodiode TIA 1× ADN2880 (0.7 mm × 1.2 mm), 3.2 Gbps,

transimpedance amplifier

C B 1× 200 pF, RF single-layer capacitor Sc 1× ceramic standoff or 1× optional capacitor

Notes

One mil thickness, gold wire, ball bond recommended. Minimize all GND bond-wire lengths.

Minimize IN, FILTER, OUT, and OUTB bond-wire lengths. Maintain symmetry in length and orientation between OUT

and OUTB bond wires.

Maintain symmetry in length and orientation between IN and FILTER bond wires.

Maintain symmetry between IN/FILTER and OUT/OUTB bond wires.

ADN2880

Rev. 0 | Page 11 of 12

PIN Photodiode for Non-SDH/SONET Applications

S C C B VCC

OUT OUTB 04945-043

Figure 26. Coplanar PIN for a 4-Pin TO-46

04946-029

Figure 27. Equivalent Circuit with Bond Wires, as Shown in Figure 26

S C C B

VCC

OUT

OUTB 04945-051

Figure 28. Dual Planar PIN for a 4-Pin TO-46

04945-039

Figure 29. Side View of the Assembly, as Shown in Figure 26

Table 6. Bill of Materials (BOM)

Component Description PD 1× vendor specific, 2.5 Gbps, photodiode TIA 1× ADN2880 (0.7 mm × 1.2 mm), 3.2 Gbps,

transimpedance amplifier

C B 1× 200 pF, RF single-layer capacitor Sc 1× ceramic standoff or 1× optional 1000 pF

capacitor

Notes

One mil thickness, gold wire, ball bond recommended. Minimize all GND bond-wire lengths.

Minimize IN, FILTER, OUT, and OUTB bond-wire lengths. Maintain symmetry in length and orientation between OUT and OUTB bond wires.

Maintain symmetry in length and orientation between IN and FILTER bond wires.

Maintain symmetry between IN/FILTER and OUT/OUTB bond wires.

ADN2880

Rev. 0 | Page 12 of 12

OUTLINE DIMENSIONS

Figure 30. 17-Pad Bare Die Sales [CHIP] Dimensions shown in millimeters

Table 7. Pad Coordinates

Pad No. Mnemonic X (μm) Y (μm)

1 GND ?500 +260

2 I

N ?500 +130 3 TEST ?500 +10 4 F I LTER ?500 ?120

5 F I LTER ?500 ?260

6 GND ?350 ?260

7 RSS I ?200 ?260

8 CAP ?50

?260 9 GND +130 ?260 10 GND +500 ?260 11 OUTB +350 ?60

12 OUT +350 +60

13 GND +500 +260 14 GND +130 +260

15 VCCF I

LTER ?50 +260 16 VCC ?200 +260 17 VCC ?350 +260

DIE INFORMATION

Die Size

0.7 mm × 1.2 mm (edge-to-edge, including 1 mil scribe) Die Thickness 10 mils = 0.25 mm

Passivation Openings 0.075 mm × 0.075 mm (Pad 1 to Pad 8, Pad 10, Pad 13, Pad 15 to Pad 17) 0.144 mm × 0.075 mm (Pad 9, Pad 11, Pad 12, Pad 14) Passivation Composition 5000 ? Si 3N 4 (top) 5000 ? SiO 2 (bottom)

Pad Composition Al/1%Cu

Substrate Contact

To ground

ORDERING GUIDE

Model Temperature Package Description ADN2880ACHIPS ?40°C to +95°C 17-Pad Die Sales