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飞思卡尔加速度传感器资料AN4074 MMA8451Q Auto-Wake Sleep

飞思卡尔加速度传感器资料AN4074  MMA8451Q Auto-Wake Sleep
飞思卡尔加速度传感器资料AN4074  MMA8451Q Auto-Wake Sleep

? 2010, 2012 Freescale Semiconductor, Inc. All rights reserved.

Document Number: AN4074

Rev 1, 03/2012

Freescale Semiconductor Application Note

Auto-Wake/Sleep Using the MMA8451, 2, 3Q

by: Kimberly Tuck

Applications Engineer

1.0Introduction

Accelerometers are commonly used in hand-held electronics and/or battery operated electronic devices.

Consumption of current in the entire system is a critical feature of the product design. Users do not want to be inconvenienced by continually recharging or changing out batteries. When designing in the accelerometer, battery power usage is often a critical feature which concerns many designers.

Therefore, current consumption of the sensor as well as of the entire system should be paramount design considerations. If the system processor is used often only for processing data from the accelerometer, then it is ideal to embed the intelligence in the sensor to avoid burdening the system processor from running continually. The flexibility of

embedded interrupt driven functions and selectable data rates with trade-offs for resolution, response time, and current are the types of intelligent features in the MMA8451, 2, 3Q.This application note will explain the following:?The Auto-Wake/Sleep feature

?Description of the configuration procedure with

example register settings and code.

1.1Key Words

Accelerometer, Output Data Rate (ODR), Current, Standby Current, Power Down Mode Current, Low Power Mode, Noise, Auto-Wake/Sleep, Sleep Timer, Sensor.

TABLE OF CONTENTS

1.0 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11.1 Key Words . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11.2 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2

2.0 MMA8451, 2, 3Q Consumer 3-axis Accelerometer 3 by 3 by 1 mm. . . . .22.1 Output Data, Sample Rates and Dynamic Ranges of all Three Products . . .22.1.1 MMA8451Q . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22.1.2 MMA8452Q . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22.1.3 MMA8453Q Note: No HPF Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2

3.0 Configuring the MMA8451, 2, 3Q into Auto-Wake/Sleep Mode . . . . . . . .33.1 Set the Sleep Enable Bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .43.2 Set the Sleep Mode and Wake Mode Oversampling Mode. . . . . . . . . . . . . . .43.3 Configure the Sleep Sample Rate and Wake Sample Rate . . . . . . . . . . . . . .53.4 Set the Timeout Counter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .53.5 Enable the Interrupts to be used in the System and Route to INT1 or INT2

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .63.6 Enable the Interrupt Sources that Wake the Device . . . . . . . . . . . . . . . . . . . .64.0 Example Configuration for the Auto-Wake/Sleep Function. . . . . . . . . . .7Table 14.Registers used for Auto-Wake/Sleep Functionality

. . . . . . . . . . . . . . . .74.1 Example Procedure for Configuring the Auto-Wake/Sleep Function Conditions

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8

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1.2Summary

The MMA845xQ can be used to cycle between different ODRs, which results in overall lower current consumption of the device. This can be achieved from several programmable functions.

2.0MMA8451, 2, 3Q Consumer 3-axis Accelerometer 3 by 3 by 1 mm

The MMA8451, 2, 3Q has a selectable dynamic range of ±2g, ±4g, ±8g. The device has 8 different output data rates, selectable high pass filter cut-off frequencies, and high pass filtered data. The available resolution of the data and the embedded features is dependant on the specific device.

Note: The MMA8450Q has a different memory map and has a slightly different pinout configuration.

Figure 1. MMA8451, 2, 3Q Consumer 3-axis Accelerometer 3 by 3 by 1 mm

2.1

Output Data, Sample Rates and Dynamic Ranges of all Three Products

2.1.1

MMA8451Q

1.14-bit data

2g (4096 counts/g = 0.25 mg/LSB) 4g (2048 counts/g = 0.5 mg/LSB) 8g (1024 counts/g = 1 mg/LSB)2.8-bit data

2g (64 counts/g = 15.6 mg/LSB) 4g (32 counts/g = 31.25 mg/LSB) 8g (16 counts/g = 62.5 mg/LSB)3.Embedded 32 sample FIFO (MMA8451Q)

2.1.2MMA8452Q

1.12-bit data

2g (1024 counts/g = 1 mg/LSB) 4g (512 counts/g = 2 mg/LSB) 8g (256 counts/g = 3.9 mg/LSB)2.8-bit data

2g (64 counts/g = 15.6 mg/LSB) 4g (32 counts/g = 31.25 mg/LSB) 8g (16 counts/g = 62.5 mg/LSB)

2.1.3MMA8453Q Note: No HPF Data

1.10-bit data

2g (256 counts/g = 3.9 mg/LSB) 4g (128 counts/g = 7.8 mg/LSB) 8g (64 counts/g = 15.6 mg/LSB)2.8-bit data

2g (64 counts/g = 15.6 mg/LSB) 4g (32 counts/g = 31.25 mg/LSB) 8g

(16 counts/g = 62.5 mg/LSB)

12345

9

10111213

14

1516

876N C

V D D

N C

VDDIO BYP NC SCL GND

NC GND INT1GND INT2

S A 0

N C

S D A

MMA845xQ 16-Pin QFN (Top View)

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3.0Configuring the MMA8451, 2, 3Q into Auto-Wake/Sleep Mode

The MMA8451, 2, 3Q can be configured to transition between different sample rates (different current consumption) based on different selected events. Enabling this feature can be accomplished by enabling the Sleep Mode and setting a timeout period. Then the functions of interest must be set to trigger the device to wake. Both Wake and Sleep are considered “Active” Modes because data and interrupts are available. The difference between the modes is that the sample rate in Sleep Mode is limited to a maximum of 50 Hz. The advantage of using the Auto-Wake/Sleep is that the system can automatically transition to a higher sample rate (higher current consumption) when needed but spends the majority of the time in the Sleep Mode (lower current) when the device does not require higher sampling rates. This can all be triggered on selected events. The Low Noise bit (Register 0x2A bit 2) can be used as well with this feature. Be aware that using the Low Noise bit will limit the dynamic range to 4g, regardless of the set range of the full scale value. The oversampling mode can also be changed from Active Sleep Mode to Active Wake Mode. The Sleep Mode oversampling option is set in Register 0x2B using bit 3 and bit 4 SMODS0 and SMODS1. The Active Wake Mode oversampling option is set in Register 0x2B using bit 0 and bit 1 MODS0 and MODS1. For example the device can be configured to be in Low Power Mode when asleep at 1.56 Hz to be in the lowest current consumption configuration. Then the device can be set for High Resolution Mode at 6.25 Hz when awake to be prepared to take higher resolution data for a tilt application.

Figure 2 shows transition states from the Wake, Sleep and Standby modes.Figure 2. Mode Transitions

Table 1 compares how the current consumption changes with the data rate and with the oversampling mode chosen. The over-sampling modes are “Normal”, “Low Noise and Low Power”, “High Resolution” and “Low Power”. The oversampling ratios are given at each data rate along with the current consumption values for each. The more averaging done internally results in higher current consumption. Note the Low Power Mode has the least amount of averaging and the lowest current consumption.Table 2 shows the list of functions that will delay the device from returning to sleep and waking from sleep. Note that the MMA8451Q is the only device that contains the FIFO. The FIFO can delay the device from going to sleep but it is not capable of waking the device from sleep. The transient, portrait/landscape, tap, and motion/freefall functions can all delay the device from sleep by servicing the interrupt before the timeout period. They can also wake the device from sleep. The Auto-Sleep interrupt indicates when the device changes modes from Wake to Sleep or Sleep to Wake but the interrupt does not affect the state change. Also the data ready interrupt does not affect the state change from the Wake to Sleep or Sleep to Wake state.

Table 1. (S)MODS Oversampling Options with Current Consumption Values

Mode ODR Normal

Low Noise and Low Power High Resolution Low Power

Current μA

OS Ratio

Current μA

OS Ratio

Current μA

OS Ratio

Current μA

OS

Ratio

8001652165216521652400165416541654852200854854165844210044444416516242502442441653214212.5241684165128626.25243288165256641.5625

24

128

8

32

165

1024

6

16

Standby

SYSMOD[1:0] = 00

Wake

SYSMOD[1:0] = 01

Sleep

SYSMOD[1:0] = 10A SLP_RATE[1:0]

I n t e r r u p t s If Time > ASLP_COUNT[7:0] and no Interrupts triggered

t r i g g e r e d

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Note that to configure the Auto-Wake/Sleep functionality, the selected embedded functions must be enabled (Register 0x2D) and the same corresponding functions must be set to “Wake-from-Sleep” (Register 0x2C) if they are to be used to wake the de-vice.

All enabled functions will still function in Sleep Mode at the sleep ODR. Only the functions that have been selected for “Wake-from-Sleep” will wake the device. If nothing is selected to Wake-from-Sleep then the device will remain in Sleep Mode and will never wake up.

This section reviews the different registers involved in configuring the device for auto-wake/sleep.

1.Register 0x2B bit 2 – SLPE Enable Sleep bit

2.Register 0x2B Set the Sleep Mode Oversampling Rate

3.Register 0x2A Sleep Sample Rate and Wake Sample Rate

4.Register 0x29 Timeout Counter

5.Register 0x2D Enable the Interrupts for the Selected Functions

6.Register 0x2E Route the Interrupts to INT1 or INT2

7.Register 0x2C Enable the Wake-from-Sleep Interrupts

3.1Set the Sleep Enable Bit

If the Sleep Enable bit (Register 0x2B bit 2) is NOT enabled then the device can only toggle between Standby and Wake Mode by writing to the Active bit in Register 0x2A. When the Sleep Enable bit is enabled the device can transition between Standby, Wake, and Sleep. The SLPE bit is shown as bit 2 in Table 4.

3.2Set the Sleep Mode and Wake Mode Oversampling Mode

There are four different oversampling modes described in Table 3 They are “Normal”, “Low Noise and Low Power”, “High Res-olution” and “Low Power”. The oversampling mode changes the current consumption, resolution and also the debounce counter timers in the part. The device can be configured to be in Low Power Mode while in Sleep and then to Normal Mode when awake or any of the other fifteen combinations. This allows for further current savings in the Sleep Mode. The different bit settings are shown in Table 3. The Wake oversampling modes configured from bit 0 and bit 1 in Register 0x2B. The Sleep oversampling modes are configured from bit 3 and bit 4 in SMODS in Register 0x2B.

Table 2. Interrupt Sources and the effects on the state change from Wake to Sleep and Sleep to Wake Modes

Interrupt Source Event Restarts Timer and Delays Return-to-Sleep

Event will Wake-from-Sleep

FIFO_GATE Yes No SRC_TRANS Yes Yes SRC_LNDPRT Yes Yes SRC_PULSE Yes Yes SRC_FF_MT Yes Yes SRC_ASLP No No SRC_DRDY

No

No

Table 3. Settings for Oversampling Modes

(S)MODS1

(S)MODS0

Power Mode 00Normal

01Low Noise and Low Power

10High Resolution 1

1

Low Power

Table 4. 0x2B CTRL_REG2 Register (Read/Write) and Description

Bit 7Bit 6Bit 5Bit 4Bit 3Bit 2Bit 1Bit 0ST

RST

SMODS1

SMODS0

SLPE

MODS1

MODS0

3.3Configure the Sleep Sample Rate and Wake Sample Rate

It is important to note that when the device is in Sleep Mode, the system ODR is overwritten by the data rate set by the ASLP_RATE field in the CTRL_REG1 Register (0x2A). The Sleep Sample Rate (ASLP_RATE[0:1]) and the Wake Mode Sample Rate (DR[0:3]) are found in Table 5. The different bit settings for the Sleep Mode Sample Rate can be found in Table 6. The bit settings for the Wake Mode Sample Rates are found in Table 7.

Table 5. 0x2A CTRL_REG1 Register (Read/Write) and Description

Bit 7Bit 6Bit 5Bit 4Bit 3Bit 2Bit 1Bit 0 ASLP_RA TE1ASLP_RA TE0DR2DR1DR0LNOISE F_READ ACTIVE

Table 6. Sleep Mode Sample Rate Description

ASLP_RATE1ASLP_RATE0ODR Period

0050 Hz20 ms

0112.5 Hz80 ms

10 6.25 Hz160 ms

11 1.56 Hz640 ms

Table 7. Wake Mode Sample Rate Description

DR2DR1DR0ODR Period

000800.0 Hz 1.25 ms

001400.0 Hz 2.5 ms

010200.0 Hz 5 ms

011100.0 Hz10 ms

10050.0 Hz20 ms

10112.5 Hz80 ms

110 6.25 Hz160 ms

111 1.56 Hz640 ms

3.4Set the Timeout Counter

The ASLP_COUNT Register 0x29 shown in Table 8 sets the minimum time period of inactivity required to change the current ODR value from the value specified in the DR[2:0] to that in the ASLP_RATE[1:0] (Register 0x2A). Of course this only occurs provided the SLPE bit is set.

Table 8. 0x29 ASLP_COUNT Register (Read/Write) and Description

Bit 7Bit 6Bit 5Bit 4Bit 3Bit 2Bit 1Bit 0 D7D6D5D4D3D2D1D0 D7-D0 defines the minimum duration time to change current ODR value from DR to ASLP_RATE. Time step and maximum value depend on the ODR chosen. See Table 9.

Table 9. ASLP_COUNT Relationship with ODR

Output Data Rate (ODR)Duration ODR Time Step ASLP_COUNT Step

8000 to 81s 1.25 ms320 ms

4000 to 81s 2.5 ms320 ms

2000 to 81s 5 ms320 ms

1000 to 81s10 ms320 ms

500 to 81s20 ms320 ms

12.50 to 81s80 ms320 ms

6.250 to 81s160 ms320 ms

1.560 to 162s640 ms640 ms

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3.5Enable the Interrupts to be used in the System and Route to INT1 or INT2

The interrupt functions must be enabled in Register 0x2D per Table 10 for the event to trigger the Auto-Wake/Sleep. The func-tions must also be configured with the appropriate thresholds and timing values to detect the events.The corresponding interrupt enable bit allows the function to route its event detection flag to the interrupt controller. The inter-rupt controller routes the enabled interrupt to the INT1 or INT2 pin. By default all interrupts are routed to INT2 and the correspond-ing configuration register bit value is 0. To route a functional block to INT1 instead of the default, set the corresponding configuration register bit to 1. The configuration register bit settings are shown in Table 11.3.6Enable the Interrupt Sources that Wake the Device

The register to control which interrupts will wake the device are configured in Register 0x2C shown in Table 12. There are five (5) functions that can be used to keep the sensor from falling asleep if they are enabled. These are the Transient, Orien-tation, Tap, Motion/FF and the FIFO. There are only four (4) functions used to wake the device. The FIFO will not wake the device from sleep. Also note the Auto-Wake/Sleep interrupt and the data ready interrupt do not affect the Wake/Sleep. Note that the FIFO is only available in the MMA8451Q device.

Note: The FIFO is flushed whenever the system ODR changes in order to prevent mixing the FIFO data from different time domains unless the FIFO_GATE (bit 7) is set. Also, the FIFO cannot wake the device from sleep but can prevent the device from going to sleep. Details of the functionality of the FIFO is captured in Table 13.Table 10. Register 0x2D CTRL_REG4 Register (Read/Write) and Description

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

INT_EN_ASLP

INT_EN_FIFO

INT_EN_TRANS

INT_EN_LNDPRT

INT_EN_PULSE

INT_EN_FF_MT

INT_EN_DRDY

Table 11. Register 0x2E CTRL_REG5 Register (Read/Write) and Description

Bit 7

Bit 6

Bit 5Bit 4Bit 3Bit 2Bit 1

Bit 0

INT_CFG_ASLP

INT_CFG_FIFO

INT_CFG_TRANS INT_CFG_LNDPRT INT_CFG_PULSE INT_CFG_FF_MT

INT_CFG_DRDY

Table 12. Register 0x2C CTRL_REG3 Interrupt Control Register and Description

Bit 7Bit 6

Bit 5

Bit 4

Bit 3Bit 2Bit 1Bit 0FIFO_GA TE

WAKE_TRANS WAKE_LNDPRT WAKE_PULSE

WAKE_FF_MT

IPOL

PP_OD

Table 13. Behavior of FIFO under Wake/Sleep Conditions

FIFO INT Enabled

Wake-from-Sleep

Enabled

Result

NO NO

FIFO will fall asleep when the sleep timer times out and no other interrupt wakes the system.There is an AUTOMATIC flush and the FIFO starts refilling at the Sleep ODR from 0.

If another functional block causes the device to wake the FIFO will FLUSH itself again and start filling at the Wake ODR.

YES NO

With the interrupt enabled the FIFO can be read and flushed clearing the interrupt. The system is kept from falling asleep by reading the status after the interrupt is set. The FIFO does not have to be flushed to keep the device in Wake Mode- as long as the FIFO status is read continuously after the FIFO interrupt is enabled. If the system falls asleep (and no new interrupts occur during the timeout period), the FIFO AUTOMATICALLY flushes and starts refilling at the Sleep ODR from 0 and stores at the Wake ODR.NO YES

FIFO will fall asleep if no wake events occur within the timeout https://www.wendangku.net/doc/1f4335636.html,st data remains here in the FIFO until it is flushed.

Once the FIFO is flushed, it will start collecting the new data at the current ODR.

YES YES

With interrupt enabled, the FIFO can be read and flushed (clearing the interrupt) . Note: Reading the FIFO status will keep the system from falling asleep.

If the system does fall asleep (and no interrupts occur during the timeout period) then the FIFO will stop collecting any data. The last data will be held in the FIFO.

Once the FIFO is flushed, it will start collecting the new data at the current ODR.

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4.0Example Configuration for the Auto-Wake/Sleep Function

The following are the steps to configure the Auto-Wake/Sleep function with the registers of importance in Table 14. In this ex-ample, the data rate will be set to 100 Hz in Wake Mode and 6.25 Hz in Sleep Mode. The Oversampling Mode will be set to High Resolution in the Wake Mode and Low Power Mode in Sleep Mode. The timeout period will be set to 20 seconds. The wake triggers will be tap and motion. There may be other interrupts that are enabled in the system including orientation detection, but these will not wake the device in this example.

Table 14. Registers used for Auto-Wake/Sleep Functionality

Reg Name Definition Bit 7Bit 6Bit 5Bit 4Bit 3Bit 2Bit 1Bit 00B SYSMOD System Mode

R FGERR FGT_4FGT_3FGT_2FGT_1FGT_0SYSMOD1

SYSMOD00C INT_SOURCE Interrupt Status

R SRC_ASLP

SRC_FIFO

SRC_TRANS

SRC_LNDPRT

SRC_PULSE

SRC_FF_MT

—SRC_DRDY

29ASLP_COUNT Auto-Sleep Counter

R/W D7D6D5D4D3D2D1D02A CTRL_REG1Control Reg1

R/W ASLP_RATE1

ASLP_RATE0

DR2DR1DR0LNOISE F_READ ACTIVE 2B

CTRL_REG2

Control Reg2

R/W ST

RST

SMODS1

SMODS0

SLPE

MODS1

MODS0

2C CTRL_REG3Control Reg3

R/W

(Wake Interrupts from

Sleep)FIFO_GATE WAKE_TRANS WAKE_LNDPRT WAKE_PULSE WAKE_FF_MT —IPOL PP_OD

2D CTRL_REG4Control Reg4

R/W

(Interrupt Enable Map)

INT_EN_ASLP INT_EN_FIFO INT_EN_TRANS INT_EN_LNDPRT INT_EN_PULSE INT_EN_FF_MT —INT_EN_DRDY

2E CTRL_REG5

Control Reg5

R/W

(Interrupt Configuration)

INT_CFG_ASLP INT_CFG_FIFO INT_CFG_TRANS INT_CFG_LNDPRT INT_CFG_PULSE INT_CFG_FF_MT —INT_CFG_DRDY

4.1Example Procedure for Configuring the Auto-Wake/Sleep Function Conditions

?Dynamic Range = 2g

?Sleep Timeout period = 20 seconds

?Wake Triggers = Tap and Motion

?Wake Sample Rate = 100 Hz,

?Wake Oversampling Mode = High Resolution

?Sleep Sample Rate = 6.25 Hz

?Sleep Oversampling Mode = Low Power

Step 1:Put the device in Standby Mode

Register 0x2A CTRL_REG1

CTRL_REG1_Data = IIC_RegRead(0x2A);

CTRL_REG1_Data& = 0xFE; //Clear Active Bit

IIC_RegWrite(0x2A,CTRL_REG1_Data);

Step 2:To enable the Auto-Wake/Sleep set bit 2 in Register 0x2B, the SLPE bit.

Register 0x2B CTRL_REG2

CTRL_REG2_Data = IIC_RegRead(0x2B); //Store value in the Register

CTRL_REG2_Data| = 0x04; //Set the Sleep Enable bit

IIC_RegWrite(0x2B, CTRL_REG2_Data); //Write the updated value into CTRL_REG2.

Step 3:The sleep sample rate must be chosen by writing in the corresponding sample rate value to bits

6 and

7 ASLP_RATE0 and ASLP_RATE1 (01) and the Wake Sample rate bits 5, 4 and 3 to DR

(011) in Register 0x2A.

Register 0x2A CTRL_REG1 ASLP_RATE = 01 (6.25 Hz), DR = 011(100 Hz)

CTRL_REG1_Data = IIC_RegRead(0x2A);

CTRL_REG1_Data& = 0x5E; //clear the bits that should be cleared for the sample rates

CTRL_REG1_Data| = 0x58; //Set ASLP = 6.25 Hz, DR = 100 Hz

IIC_RegWrite(0x2A,CTRL_REG1_Data);

Step 4:Set the Wake Oversampling Mode to High Resolution (10) and the Sleep Oversampling Mode to Low Power (11)

CTRL_REG2_Data = IIC_RegRead(0x2B);

CTRL_REG2_Data& = 0xE4; //puts both Oversampling modes in Normal Mode

CTRL_REG2_Data| = 0x1A; //Wake High Res, Sleep Low Power

IIC_RegWrite(0x2B,CTRL_REG2_Data);

Step 5:The Interrupt for the event to trigger the device to wake up must be enabled by writing to Register 0x2D, CTRL_Reg4. Bits 2 through 7 will affect the Auto-Wake/sleep. The data ready

interrupt doesn’t trigger the Auto-Wake/Sleep mechanism.

Example: Set Pulse and Orientation and Motion 1 and Auto-Wake/Sleep Interrupts

Enabled in the System

IIC_RegWrite(0x2D, 0x9C);

Step 6:Route the interrupt chosen and enabled to either INT1 or INT2 in Register 0x2E CTRL_REG5.

Example: Route Pulse, Motion1 and Orientation to INT2 and Auto-Sleep to INT1.

IIC_RegWrite(0x2E,0x80);

Step 7:Enable the interrupts that will wake the device from sleep. There can be more interrupts enabled in Step 4 than in Step 6. Only interrupts that are Enabled in Step 4 and that have the “Wake-from

-Sleep” bit set in Register 0x2C will actually wake the device.

Example: Choose Pulse and Motion to wake the device from sleep

IIC_RegWrite(0x2C,0x18);

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Step 8:Set the Dynamic Range to 2g

Register 0x0E XYZ_DATA_CFG

XYZ_CFG_Data = IIC_RegRead(0x0E);

XYZ_CFG_Data & = 0xFC; //Clear the FS bits to 00 2g

IIC_RegWrite(0x0E, XYZ_CFG_Data);

Step 9:Write an Interrupt Service routine to monitor the Auto-Sleep Interrupt

Interrupt void isr_KBI (void)

{

//clear the interrupt flag

CLEAR_KBI_INTERRUPT;

//Determine the source of interrupt by reading the system interrupt register

Int_SourceSystem = IIC_RegRead(0x0C);

//Set up Case statement here to service all of the possible interrupts

if ((Int_SourceSystem &=0x80)==0x80)

{

//Perform an Action since Auto-Sleep Flag has been set

//Read the System Mode to clear the system interrupt

Int_SysMod = IIC_RegRead(0x0B);

if (Int_SysMod==0x02)

{//sleep mode

}

else if (Int_SysMod==0x01)

{//Wake Mode

}

else

{//Error

}

}

}

Related Documentation

The MMA845xQ device features and operations are described in a variety of reference manuals, user guides, and application notes. To find the most-current versions of these documents:

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https://www.wendangku.net/doc/1f4335636.html,/

2.In the Keyword search box at the top of the page, enter the device number MMA845xQ.

3.In the Refine Your Result pane on the left, click on the Documentation link.

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加速度传感器的选择

加速度传感器选型 压电加速度传感器因其频响宽、动态范围大、可靠性高、使用方便,受到广泛应用。在一般通用振动测量时,用户主要关心的技术指标为:灵敏度、频率范围,内部结构、内置电路型与纯压电型的区别,现场环境与后续仪器配置等。 一、灵敏度的选择 制造商在产品介绍或说明书中一般都给出传感器的灵敏度和参考量程范围,目的是让用户在选择不同灵敏度的加速度传感器时能方便地选出合适的产品,最小加速度测量值也称最小分辨率,考虑到后级放大电路噪声问题,应尽量远离最小可用值,以确保最佳信噪比。最大测量极限要考虑加速度传感器自身的非线性影响和后续仪器的最大输出电压。 估算方法:最大被测加速度×传感器电荷(电压)灵敏度,其数值是否超过配套仪器的最大输入电荷(电压)值。建议如已知被测加速度范围可在传感器指标中的“参考量程范围”中选择(兼顾频响、重量),同时,在频响、质量允许的情况下,尽量选择高灵敏度的传感器,以提高后续仪器输入信号,提高信噪比。在兼顾频响、质量的同时,可参照以下范围选择传感器灵敏度:以电荷输出型压电加速度传感器为例: 1、土木工程和超大型机械结构的振动在0.1g-10g (1g=9.81m/s2)左右,可选电荷灵敏度在300pC/ms-2~ 30pC/ms-2的压电加速度传感器,属于电荷输出型压电加速度传感器 2、特殊的土木结构(如桩基)和机械设备的振动在100ms-2~1000ms-2,可选择20pC/ms-2~2pC/ms-2的加速度传感器。 3、冲击,碰撞测量量程一般10000ms-2~1000000ms-2,可选则传感器灵敏度是0.2pC/ms-2~ 0.002pC/ms-2的加速度传感器。 二、频率选择 制造商给出的加速度传感器的频响曲线是用螺钉刚性连接安装的。 一般将曲线分成二段:谐振频率和使用频率。使用频率是按灵敏度偏差给出的,有±10%、±5%、±3dB。谐振频率一般是避开不用的,但也有特例,如轴承故障检测。选择加速度传感器的频率范围应高于被测试件的振动频率。有倍频分析要求的加速度传感器频率响应应更高。土木工程一般是低频振动,加速度传感器频率响应范围可选择0.2Hz~1kHz,机械设备一般是中频段,可根据设备转速、设备刚度等因素综合估算振动频率,选择0.5Hz~ 5kHz 的加速度传感器。如发电机转速在3000rms 时,除以60s 此时它的主频率为50Hz。碰撞、冲击测量高频居多。 加速度传感器的安装方式不同也会改变使用频响(对振动值影响不大)。 安装面要平整、光洁,安装选择应根据方便、安全的原则。我们给出同一只AD500S 加速度传感器不同安装方式的使用频率:螺钉刚性连接(±10%误差)10kHz;环氧胶或“502”粘接安装6kHz;磁力吸座安装 2kHz;双面胶安装1kHz。由此可见,安装方式的不同对测试频率的响应影响很大,应注意选择。加速度传感器的质量、灵敏度与使用频率成反比,灵敏度高,质量大,使用频率低,这也是选择的技巧。 三、内部结构 内部结构是指敏感材料晶体片感受振动的方式及安装形式。有压缩和剪切两大类,常见的有中心压缩、平面剪切、三角剪切、环型剪切。 中心压缩型频响高于剪切型,剪切型对环境适应性好于中心压缩型。如配用积分型电荷放大器测量速度、位移时,最好选用剪切型产品,这样所获得的信号波动小,稳定性好。 四、内置电路 内置的概念是将放大电路置于加速度传感器内,成为具有电压输出功能的传感元件。它可分双电源(四线)和单电源(二线、带偏置,又称ICP) 两种,下面所指内装电路专指ICP

飞思卡尔锁相环

备战飞思卡尔智能车大赛.开始模块总结. 锁相环设置. 公式: PLLCLK=2*OSCCLK*(SYNR+1)/(REFDV+1), fbus=PLLCLK/2 void INIT_PLL(void) { CLKSEL &= 0x7f; //选用外部时钟.准备设置锁相环 PLLCTL &= 0x8F; //禁止锁相环 SYNR = 0xc9; //设置SYNR REFDV = 0x81; //设置REFDV PLLCTL |=0x70; //锁相环使能 asm NOP; asm NOP; //两个机器周期缓冲时间 while(!(CRGFLG&0x08)); //等待锁相环锁定 CLKSEL |= 0x80; //设置锁相环为时钟源 } 飞思卡尔XS128的PLL锁相环详细设置说明——关于如何提高总线工作频率PLL锁相环就相当于超频 单片机超频的原因和PC机是个一道理。分频的主要原因是外设需要的工作频率往往远低于CPU/MEMORY 这也和PC机南北桥的原理类似。总线频率设置过程 1、禁止总中断 2、寄存器CLKSEL(时钟选择寄存器)的第七位置0 即CLKSEL_PLLSEL=0。选择时钟源为外部晶振OSCCLK(外接晶振频率) 在PLL(锁相环)程序执行前 内部总线频率为OSCCLK/2 3. PLLCTL_PLLON=1 打开PLL 4.设置SYNR 时钟合成寄存器 、REFDV 时钟分频寄存器 、POSTDIV三个寄存器的参数 5、_asm(nop) _asm(nop);加入两条空指令 使锁相环稳定 6、while(!(CRGFLG_LOCK==1));//时钟校正同步 7、CLKSEL_PLLSEL=1; 下面详细说一下频率的计算一、时钟合成寄存器SYNR寄存器结构 VCOFRQ[1:0]控制压控振动器VCO的增益 默认值为00 VCO的频率与VCOFRQ[1:0]对应表

飞思卡尔电磁传感器

“飞思卡尔”杯全国大学生智能汽车邀请赛 电 磁 传 感 器 设计报告 学校:天津职业技术师范大学 制作人:自动化工程学院 电气0714 连刘雷

引言 这份技术报告中,我通过自己对这个比赛了解的传感器方面,详尽的阐述了传感器制作的原理和制作方法。具体表现在电路的可行性和实验的验证结果。 目录 引言 (2) 目录 (2) 第一章、电磁传感器设计思路及实现方案简介 (3) 1.1方案设计思路 (3) 1.2 磁场检测方法 (5) 第二章、电路设计原理 (7) 2.1感应磁场线圈 (7) 2.2信号选频放大 (8) 参考文献 (10)

第一章、电磁传感器设计思路及实现方案简介 1.1方案设计思路 根据麦克斯韦电磁场理论,交变电流会在周围产生交变的电磁场。智能汽车竞赛使用路径导航的交流电流频率为20kHz,产生的电磁波属于甚低频(VLF)电磁波。甚低频频率范围处于工频和低频电磁破中间,为 3kHz~30kHz,波长为100km~10km。如下图所示: 图1.1、电流周围的电磁场示意图 导线周围的电场和磁场,按照一定规律分布。通过检测相应的电磁场的强度和方向可以反过来获得距离导线的空间位置,这正是我们进行电磁导航的目的。 由于赛道导航电线和小车尺寸l 远远小于电磁波的波长λ,电磁场辐射能量 很小(如果天线的长度l 远小于电磁波长,在施加交变电压后,电磁波辐射功率正比于天线长度的四次方),所以能够感应到电磁波的能量非常小。为此,我们将导线周围变化的磁场近似缓变的磁场,按照检测静态磁场的方法获取导线周围的磁场分布,从而进行位置检测。 由毕奥-萨伐尔定律知:通有稳恒电流I 长度为L 的直导线周围会产生磁场,距离导线距离为r 处P 点的磁感应强度为:

FreescaleMM912J637汽车智能电池传感器(IBS)解决方案

FreescaleMM912J637汽车智能电池传感器(IBS)解决方案 智能电池传感器智能电池传感器智能电池传感器(IBS),支持精密的电流,电压和温度测量,集成的LIN 2.1和LIN2.0接口进行通信,主要用在汽车电池电流/电压/温度监测,电池充电状态监测和电池完好状态监测以及混合动力汽车.本文介绍了MM912J637主要特性,方框图,模拟部分框图以及电流/电压/温度测量通路框图,简化应用电路和所需要外接元件表.Intelligent Integrated Precision Battery SensorThe MM912I637 (96 kB) and MM912J637 (128 kB) are fully integrated LIN Battery monitoring devices, based on Freescale S12 MCU Technology.The device supports precise current measurement via an external shunt resistor, and precise battery voltage measurement via a series resistor directly at the battery plus pole. The integrated temperature sensor combined in the close proximity to the battery, allows battery temperature measurement.The integrated LIN 2.1 interface makes the sensor feedback available on the LIN Bus.MM912J637主要特性:• Battery voltage measurement• Battery current measurement in up to 8 ranges• On chip temperature measurement• Normal and two low-power modes• Current threshold detection and current averaging in standby => wake-up from low-power mode• Triggered wake-up from LIN and periodic wake-up• Signal low pass filtering (current, voltage)• PGA (programmable low-noise gain amplifier) with automatic gain control feature• Accurate internal oscillator (an external quartz oscillator may be used for extended accuracy)• Communication via a LIN 2.1, LIN2.0 bus interface• S12 microcontroller with 128 kByte flash, 6.0 kByte RAM, 4.0 kByte data flash• Background debug module• External temperature sensor option (TSUP, VTEMP)• Optional 2nd external voltage sense input (VOPT)• 4 x 5.0 V GPIO including one Wake-up capable high voltage input (PTB3/L0)• 8 x MCU general purpose I/O including SPI functionality• Industry standard EMC complianceMM912J637目标应用:AutomotiveBattery Current/Voltage/Temperature MonitoringBattery State of Charge MonitoringBattery State of Health MonitoringHybrid Electric Vehicles图1.MM912J637方框图图 2.MM912J637 模拟部分方框图图 3.MM912J637电流测量通路框图图4.MM912J637电压测量通路框图图5.MM912J637温度测量通路框图图6.MM912J637完整通路框图图7.MM912J637 LIN模块框图图8.MM912J637简化应用图图9.MM912J637所需/推荐外接元件所需/推荐外接元件数值表:图10.典型的智能电池传感器(IBS)应用电路(器件GND = 底盘GND)图11.典型的智能电池传感器(IBS)应用电路(器件GND =电池负端)详情请见:/files/analog/doc/data_sheet/MM912_637D1.pdf

加速度传感器的安装方法

加速度传感器的安装方法 1.目的: 将用书面形式来阐述加速度计的粘接式安装方法,我们的工程师在这个应用领域中进行了许多调查研究并得出结论:正确的加速度计粘接方法是十分重要的。这些信息将有助于测试工程师和技师在粘接一些特殊类型的传感器时获得更好的帮助并做出更好的决定。 2.背景: 测试工程师和技师们常常会问:如何避免在安装被测物体表面上不用打出螺孔而进行加速度计的安装?例如合成和碾压材料表面安装时厚度不足,在一块很小的表面区域中存在着很多不牢固的整体性结构,多样性的安装方式使得加速度计的安装方式具有很大的随意性,在这种状况下我们使用粘接剂粘合加速度计是最合适的安装方式。 测试人员将会决定在什么样的环境下采用什么类型的粘接剂更符合测试要求。加速度计的自然频率由粘接的耦合程度决定,选择正确的粘合剂将是很重要的一步。有些重要的问题是必须要考虑的:加速度计的重量,测试时的频率和带宽,测试时的振幅和温度。还要考虑一些测试过程中会出现的问题:正弦曲线的受限和测试中出现的随机振动。通常,工程师和技师将会根据测试不同的需求选择合适的粘接剂来粘接加速度计。 这些粘接剂包括:氰基丙烯酸盐,磁铁,双面胶带,石蜡,热粘接剂等,问题的关键在于如何能够有效的选择和使用这些粘接剂。下面我们来解决这些问题。在正弦振动测试过程中751-100和2226C是两种典型的被广泛应用的加速度计,分别用氰基丙烯酸盐,磁铁,双面胶带,石蜡,热粘接剂对它进行粘接。一般在高温控制室中进行,以此来校验加速度计在其他温度改变之前的频率响应。用热电偶来监控烤箱中的温度用于校准加速度计。 3.建议: 在加速度计的粘接过程中,粘合剂的使用数量将在加速度计能否达到良好的频率响应中起到很关键的作用。在一块小的薄膜上尽可能的用最少的粘接剂粘接加速度计将会直接的促进加速度计频率响应传送性能的提高。在安装传感器之前要用碳氢化合物的溶解液:比如(Loctite? X-NMS)来清洁其要安装的表面,在安装传感器的时候通常要用到氰基丙烯酸盐, 磁铁,双面胶带,石蜡,将它们均匀地涂抹在粘接加速度计被粘表面,合适的厚度将会起到良好的粘接效果。热粘接剂的使用有很多的注意事项,要注意安装过程中热粘接剂的凝固时间。 751-100和2226C是两种最具有代表的普通加速度计。751-100重7.8克,在测试高频振动时,频率响应在1-15K HZ。2226C重2.8克,在使用氰基丙烯酸盐粘接到高频振动台的时候,频率响应在1-5K HZ。 粘接剂安装方法介绍: 氰基丙烯酸盐 在测试传感器中一个加速度计的重量一般小于10克,这是它们的优势所在,在751-100和2226C两种传感器的粘接中可以使用氰基丙烯酸盐的粘合剂,使用温度范围通常在-18°C 到+121°C之间。氰基丙烯酸盐的粘合剂也可用于121°C之上,通常能达到177°C。氰基丙烯酸盐是一种用于粘合坚固塑料的胶液,这种胶液可用于粘接金属,玻璃,橡胶和各种塑料。使用氰基丙烯酸盐的稀释剂可以加快凝固时间。通常氰基丙烯酸盐用来粘接铝,不锈钢。甲基氰基丙烯酸盐通常被推荐用来粘接和固定金属和玻璃。不能确定的是氰基丙烯酸酯在其他材料方面的应用,我们还需要做进一步的测试。 优点: 1.室温时粘接效果好,凝固时间较快。 2.频率响应宽,温度范围宽。 缺点:

飞思卡尔单片机编程

关于Codewarrior 中的 .prm 文件 网上广泛流传的一篇文章讲述的是8位飞思卡尔单片机的内存映射,这几天,研究了一下Codewarrior 5.0 prm文件,基于16位单片机MC9S12XS128,一点心得,和大家分享。有什么错误请指正。 正文: 关于Codewarrior 中的.prm 文件 要讨论单片机的地址映射,就必须要接触.prm文件,本篇的讨论基于Codewarrior 5.0 编译器,单片机采用MC9S12XS128。 通过项目模板建立的新项目中都有一个名字为“project.prm”的文件,位于Project Settings->Linker Files文件夹下。一个标准的基于XS128的.prm文件起始内容如下: .prm文件范例: NAMES END SEGMENTS RAM = READ_WRITE DATA_NEAR 0x2000 TO 0x3FFF;

READ_ONLY DATA_NEAR IBCC_NEAR 0x4000 TO 0x7FFF; ROM_C000 = READ_ONLY DATA_NEAR IBCC_NEAR 0xC000 TO 0xFEFF; //OSVECTORS = READ_ONLY 0xFF10 TO 0xFFFF; EEPROM_00 = READ_ONLY DATA_FAR IBCC_FAR 0x000800 TO 0x000BFF; EEPROM_01 = READ_ONLY DATA_FAR IBCC_FAR 0x010800 TO 0x010BFF; EEPROM_02 = READ_ONLY DATA_FAR IBCC_FAR 0x020800 TO 0x020BFF; EEPROM_03 = READ_ONLY DATA_FAR IBCC_FAR 0x030800 TO 0x030BFF; EEPROM_04 = READ_ONLY DATA_FAR IBCC_FAR 0x040800 TO 0x040BFF; EEPROM_05 = READ_ONLY DATA_FAR IBCC_FAR 0x050800 TO 0x050BFF; EEPROM_06 = READ_ONLY DATA_FAR IBCC_FAR 0x060800 TO 0x060BFF; EEPROM_07 = READ_ONLY DATA_FAR IBCC_FAR 0x070800 TO 0x070BFF; PAGE_F8 = READ_ONLY DATA_FAR IBCC_FAR 0xF88000 TO 0xF8BFFF;

中鸿TPMS采用英飞凌和飞思卡尔TPMS轮胎压力传感器芯片

安徽中鸿电子科技有限公司是安徽最大的TPMS胎压监测系统供应商,公司所有TPMS芯片都是进口德国英飞凌和美国飞思卡尔最新的芯片,长期专注汽车轮胎安全,中鸿为您的幸福家庭保驾护航. 飞思卡尔TPMS芯片:是飞思卡尔半导体(Freescale Semiconductor)公司生产的,它是全球领先的半导体公司,全球总部位于美国德州的奥斯汀市。专注于嵌入式处理解决方案。飞思卡尔面向汽车、网络、工业和消费电子市场,提供的技术包括微处理器、微控制器、传感器、模拟集成电路和连接。飞思卡尔的一些主要应用和终端市场包括汽车安全、混合动力和全电动汽车、下一代无线基础设施、智能能源管理、便携式医疗器件、消费电器以及智能移动器件等。在全世界拥有多家设计、研发、制造和销售机构。Gregg Lowe是总裁兼CEO,该公司在纽约证券交易所股票代码(NYSE):FSL,在2013年投入了7.55亿美元的研发经费,占全年净销售额的18%。2015年2月,飞思卡尔与NXP达成合并协议,合并后整体市值400 亿美金。 据美国国家公路交通安全管理局统计,每年因为轮胎漏气或爆裂导致的交通事故约为23000件,死亡事故为535件。TPMS由于能提供可靠的轮胎充气状态监测,可有助于预防事故的发生。此外,如果能保证轮胎充气正常,还有助于提高燃油经济性,降低排放。目前世界许多国家和地区,例如美国、欧盟、中国、日本及台湾地区等已经开始要求新生产的车辆必须安装TPMS系统。 飞思卡尔的FXTH87 Xtrinsic系列胎压监测传感器(TPMS)高度集成了市场上尺寸最小7 x 7 mm的封装,比飞思卡尔前一代QFN 9 x 9 mm封装尺寸还要少40%。它还可以提供最低的功耗(9 mA Idd)、最大的客户存储器规格(8 kB)与独一无二的双轴加速度传感器架构。飞思卡尔的TPMS解决方案集成了8位微控制器(MCU)、压力传感器、XZ-轴或Z-轴加速度传感器和射频发射器。 FXTH87特点: * QFN 7 x 7 x 2.2 mm封装,带有用于检查的可见焊点 * 100–450 kPa和100–900 kPa压力范围 * Z轴或XZ轴加速度传感器 * 支持加速度传感器标准/精度公差 * 低功耗唤醒定时器和LFO驱动的周期性复位 * 用于降低功耗的专用状态机 * 8位MCU/S08内核,配备SIM、中断和调试/监控器 * 512字节RAM/16k闪存(8k用于飞思卡尔库,8k用于应用) * 内置315/434 MHz射频发射器 * 内置125 kHz LF接收器 * 6个多用途通用IO引脚(包括两个A/D输入) 英飞凌TPMS 芯片 英飞凌科技公司于1999年4月1日在德国慕尼黑正式成立,是全球领先的半导体公司之一。其前身是西门子集团的半导体部门,于1999年独立,2000年上市。其中文名称为亿恒科技,2002年后更名为英飞凌科技。

加速度传感器的工作原理、结构以及芯片的微加工

加速度传感器的工作原理、结构以及芯片的微加工 传感器作为故障信息监测与诊断的数据来源,其对工程装备工作参数的拾取精度直接决定了后续故障诊断的准确度,是机械故障信息监测的关键器件。随着无线监测系统进入工业应用以及制造装备智能化发展的趋势,当前所用的压电式加速度传感器由于成本、体积等方面的原因逐渐不能满足工业实际需求;因此,将具有微型化与可大规模生产等潜力的MEMS传感器应用于机械故障信息监测中,可为制造装备集成化、智能化发展提供必要的器件支持。综合各类传感器的优缺点以及机械制造装备故障检测对测振传感器的性能需求,本文以3种不同结构的压阻式MEMS加速度传感器为对象,介绍了微型测振加速度传感器的工作原理、结构以及微加工工艺,针对传感器固有频率与测量灵敏度之间的制约关系,提出“小变形-大应力”的敏感结构设计方法,并根据所设计结构特点与微加工工艺能力制定传感器芯片制作流程。加速度传感器工作原理压阻式传感器利用材料的压阻效应将物理量转换为电学量的方式来实现信号测量。目前,压阻式加速度传感器多采用如图1所示的“梁-质量块”结构,主要包括质量块、支撑梁和压敏电阻3个基本元件。当传感器受到加速度作用时,质量块在惯性力的作用下发生与加速度成比例的位移,带动支撑梁发生弯曲变形,产生应力。由于硅的压阻效应,压敏电阻在应力作用下阻值变化,后经过惠斯通电桥输出与加速度成比例的电压,实现加速度信号到电信号的转换,如图2所示。 图1 梁-质量块结构图 图 2 压阻式传感器工作过程在加工传感器芯片过程中,通常采用离子注入工艺在传感器应力最敏感区域制作4个等值的压敏电阻以提高传感器的测量灵敏度。然后由芯片上的金属引线将压敏电阻连接成惠斯通电桥,由外接恒压源或恒流源激励工作。当传感器工作时,惠斯通电桥能够有效地将压敏电阻的变化转换成电压信号,且压阻式传感器的电压输出与加速度输入成线性关系。传感器的敏感结构 加速度传感器的主要性能指标包括测量灵敏度、固有频率、输出线性度以及可用量程等,其中测量灵敏度与固有频率是决定传感器应用范围的重要指标。对于某一结构的传感器来说,提升固有频率则必须增加结构刚度、减小质量块,而这必然会减小结构的静态变形,造成

飞思卡尔单片机寄存器及汇编指令详解

附录I:寄存器地址列表 直接页面寄存器总结

高页面寄存器总结

非易失寄存器总结 注:直接页面寄存器表地址的低字节用粗体显示,直接寻址对其访问时,仅写地址低字节即可。第2列中寄存器名用粗体显示以区别右边的位名。有0的单元格表示未用到的位总是读为0,有破折号的单元格表示未用或者保留,对其读不定。

附录II 指令接与寻址方式 HCS08指令集概括 运算符 () = 括号种表示寄存器或存储器位置的内容 ← = 用……加载(读: “得到”) & = 布尔与 | = 布尔或 ⊕= 布尔异或 ×= 乘 ÷ = 除 : = 串联 + = 加 - = 求反(二进制补码) CPU registers A =>累加器 CCR =>条件代码寄存器 H =>索引寄存器,高8位 X => 索引寄存器,低8位 PC =>程序计数器 PCH =>程序计数器,高8位 PCL =>程序计数器,低8位 SP =>堆栈指针 存储器和寻址 M =>一个存储区位置或者绝对值数据,视寻址模式而定 M:M + 0x0001 => 两个连续存储位置的16位值.高8位位于M的地址,低8位位于更高的连续地址. 条件代码寄存器(CCR)位 V => 二进制补码溢出指示,第7位 H => 半进位,第4位 I => 中断屏蔽,第 3位 N => 求反指示器, 第2位 Z => 置零指示器, 第1位 C => 进/借, 第0位 (进位第 7位 ) CCR工作性符号 – => 位不受影响 0 = > 位强制为0 1 = > 位强制为1

= >根据运算结果设置或清除位 U = > 运算后没有定义 机器编码符号 dd =>一个直接寻址0x0000–0x00FF的低8位(高字节假设为0x00) ee => 16位偏移量的高8位 ff => 16位偏移量的低8位 ii => 立即数的一个字节 jj => 16位立即数值的高位字节 kk => 16位立即数值的低位字节 hh => 16位扩展寻址的高位字节 ll => 16位扩展寻址的低位字节 rr => 相对偏移量 n —任何表达范围在0–7之间的一个有符号数的标号或表达式 opr8i —任何一个表达8位立即值的标号或表达式 opr16 —任何一个表达16位立即值的标号或表达式 opr8a —任何一个表达一个8位值的标号或表达式.指令对待这个8位值为直接页面64K 字节地址空间(0x00xx)中地址的低8位. opr16a —任何一个表达16位值的标号或表达式.指令对待这个值为直接页面64K字节地址空间. oprx8 —任何一个表达8位无符号值的标号或表达式,用于索引寻址. oprx16 —任何一个16位值的标号或表达式.因为HCS08有一个16位地址总线,这可以为一个有符号或者无符号值. rel —任何指引在当前指令目标代码最后一个字节之后–128 to +127个字节之内的标号或表达式.汇编器会计算包括当前指令目标代码在内的8位有符号偏移量. 寻址方式 隐含寻址(Inherent)如CLRA,只有操作码,无操作数,需要操作的数据一般为CPU寄存器,因此不需要再去找操作数了。(INH) 立即寻址 (Immediate)如LDA #$0A,“$”表示16进制,此时操作数位于FLASH空间,与程序一起存放。(IMM) 直接寻址 (Direct)如 LDA $88,只能访问$0000-$00FF的存储器空间,指令短速度快; (DIR) 扩展寻址 (Extended)如果操作数地址超出了$00FF,自动为扩展寻址;(EXT) 相对寻址(Relative)如BRA LOOP,指令中一般给出8位有符号数表示的偏移量。(REL) 变址寻址 (Indexed) 采用[H:X]或SP作为指针的间接寻址方式。( IX )( IX1 )( IX2 ) 变址寻址 (Indexed) 1〉无偏移量:CLR ,X 简写(IX) 2〉无偏移量,指令完成后指针加1(H:X = H:X + 0x0001) ,简写(IX+)只用于指令MOV和CBEQ指令中;

飞思卡尔加速度传感器资料AN4074 MMA8451Q Auto-Wake Sleep

? 2010, 2012 Freescale Semiconductor, Inc. All rights reserved. Document Number: AN4074 Rev 1, 03/2012 Freescale Semiconductor Application Note Auto-Wake/Sleep Using the MMA8451, 2, 3Q by: Kimberly Tuck Applications Engineer 1.0Introduction Accelerometers are commonly used in hand-held electronics and/or battery operated electronic devices. Consumption of current in the entire system is a critical feature of the product design. Users do not want to be inconvenienced by continually recharging or changing out batteries. When designing in the accelerometer, battery power usage is often a critical feature which concerns many designers. Therefore, current consumption of the sensor as well as of the entire system should be paramount design considerations. If the system processor is used often only for processing data from the accelerometer, then it is ideal to embed the intelligence in the sensor to avoid burdening the system processor from running continually. The flexibility of embedded interrupt driven functions and selectable data rates with trade-offs for resolution, response time, and current are the types of intelligent features in the MMA8451, 2, 3Q.This application note will explain the following:?The Auto-Wake/Sleep feature ?Description of the configuration procedure with example register settings and code. 1.1Key Words Accelerometer, Output Data Rate (ODR), Current, Standby Current, Power Down Mode Current, Low Power Mode, Noise, Auto-Wake/Sleep, Sleep Timer, Sensor. TABLE OF CONTENTS 1.0 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11.1 Key Words . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11.2 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2 2.0 MMA8451, 2, 3Q Consumer 3-axis Accelerometer 3 by 3 by 1 mm. . . . .22.1 Output Data, Sample Rates and Dynamic Ranges of all Three Products . . .22.1.1 MMA8451Q . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22.1.2 MMA8452Q . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22.1.3 MMA8453Q Note: No HPF Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2 3.0 Configuring the MMA8451, 2, 3Q into Auto-Wake/Sleep Mode . . . . . . . .33.1 Set the Sleep Enable Bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .43.2 Set the Sleep Mode and Wake Mode Oversampling Mode. . . . . . . . . . . . . . .43.3 Configure the Sleep Sample Rate and Wake Sample Rate . . . . . . . . . . . . . .53.4 Set the Timeout Counter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .53.5 Enable the Interrupts to be used in the System and Route to INT1 or INT2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .63.6 Enable the Interrupt Sources that Wake the Device . . . . . . . . . . . . . . . . . . . .64.0 Example Configuration for the Auto-Wake/Sleep Function. . . . . . . . . . .7Table 14.Registers used for Auto-Wake/Sleep Functionality . . . . . . . . . . . . . . . .74.1 Example Procedure for Configuring the Auto-Wake/Sleep Function Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8

力平衡加速度传感器原理设计t

力平衡加速度传感器原理设计 摘要:本文介绍了一种力平衡加速度传感器的原理设计方法。差容式力平衡加速度传感器在传统的机械传感器的基础上,采用差动电容结构,利用反馈原理把被测的加速度转换为电容器的电容量变化,将加速度的变化转变为电压值。使传感器的灵敏度、非线性、测量范围等性能得到很大的提高,使其在地震、建筑、交通、航空等各领域得到广泛应用。 关键词:加速度差容式力平衡传感器 加速度传感器是用来将加速度这一物理信号转变成便于测量的电信号的测试仪器。它是工业、国防等许多领域中进行冲击、振动测量常用的测试仪器。 1、加速度传感器原理概述 加速度传感器是用来将加速度这一物理信号转变成便于测量的电信号的测试仪器。差容式力平衡加速度传感器则把被测的加速度转换为电容器的电容量变化。实现这种功能的方法有变间隙,变面积,变介电常量三种,差容式力平衡加速度传感器利用变间隙,且用差动式的结构,它优点是结构简单,动态响应好,能实现无接触式测量,灵敏度好,分辨率强,能测量0.01um甚至更微小的位移,但是由于本身的电容量一般很小,仅几pF至几百pF,其容抗可高达几MΩ至几百 MΩ,所以对绝缘电阻的要求较高,并且寄生电容(引线电容及仪器中各元器件与极板间电容等)不可忽视。近年来由于广泛应用集成电路,使电子线路紧靠传感器的极板,使寄生电容,非线性等缺点不断得到克服。 差容式力平衡加速度传感器的机械部分紧靠电路板,把加速度的变化转变为电容中间极的位移变化,后续电路通过对位移的检测,输出

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