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FEATURES
SN54LVTH16244A...WD PACKAGE
SN74LVTH16244A...DGG, DGV, OR DL PACKAGE
(TOP VIEW)
2OE CC CC 3OE
DESCRIPTION/ORDERING INFORMATION
SN54LVTH16244A,SN74LVTH16244A 3.3-V ABT 16-BIT BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SCBS142Q–MAY 1992–REVISED OCTOBER 2005
?Members of the Texas Instruments Widebus ?Family
?
State-of-the-Art Advanced BiCMOS Technology (ABT)Design for 3.3-V Operation and Low Static-Power Dissipation
?
Support Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V V CC )
?Support Unregulated Battery Operation Down to 2.7V
?Typical V OLP (Output Ground Bounce)<0.8V at V CC =3.3V,T A =25°C
?I off and Power-Up 3-State Support Hot Insertion
?Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors ?Latch-Up Performance Exceeds 500mA Per JESD 17
?
ESD Protection Exceeds JESD 22
–2000-V Human-Body Model (A114-A)–200-V Machine Model (A115-A)
The 'LVTH16244A devices are 16-bit buffers and line drivers designed for low-voltage (3.3-V)V CC operation,but with the capability to provide a TTL interface to a 5-V system environment.These devices can be used as four 4-bit buffers,two 8-bit buffers,or one 16-bit buffer.These devices provide true outputs and symmetrical active-low output-enable (OE)inputs.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic https://www.wendangku.net/doc/155141433.html,e of pullup or pulldown resistors with the bus-hold circuitry is not recommended.
When V CC is between 0and 1.5V,the devices are in the high-impedance state during power up or power down.However,to ensure the high-impedance state above 1.5V,OE should be tied to V CC through a pullup resistor;the minimum value of the resistor is determined by the current-sinking capability of the driver.
These devices are fully specified for hot-insertion applications using I off and power-up 3-state.The I off circuitry disables the outputs,preventing damaging current backflow through the devices when they are powered down.The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down,which prevents driver conflict.
Please be aware that an important notice concerning availability,standard warranty,and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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SN54LVTH16244A,SN74LVTH16244A
3.3-V ABT 16-BIT BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SCBS142Q–MAY 1992–REVISED OCTOBER 2005
ORDERING INFORMATION
T A
PACKAGE (1)
ORDERABLE PART NUMBER TOP-SIDE MARKING FBGA –GRD
SN74LVTH16244AGRDR Tape and reel LL244A
FBGA –ZRD (Pb-free)SN74LVTH16244AZRDR Tube SN74LVTH16244ADL SSOP –DL
SN74LVTH16244ADLR LVTH16244A
Tape and reel
74LVTH16244ADLRG4SN74LVTH16244ADGGR
–40°C to 85°C
TSSOP –DGG
Tape and reel
74LVTH16244ADGGRE4LVTH16244A 74LVTH16244ADGGRG4
SN74LVTH16244ADGVR TVSOP –DGV Tape and reel LL244A 74LVTH16244ADGVRE4VFBGA –GQL
SN74LVTH16244AGQLR Tape and reel LL244A VFBGA –ZQL (Pb-free)
SN74LVTH16244AZQLR –55°C to 125°C CFP –WD
Tube
SNJ54LVTH16244AWD
SNJ54LVTH16244AWD
(1)
Package drawings,standard packing quantities,thermal data,symbolization,and PCB design guidelines are available at https://www.wendangku.net/doc/155141433.html,/sc/package.
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GQL OR ZQL PACKAGE
(TOP VIEW)
J H G F E D C B A 213465K
GRD OR ZRD PACKAGE
(TOP VIEW)
J
H G F E D C B A 21346
5SN54LVTH16244A,SN74LVTH16244A 3.3-V ABT 16-BIT BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SCBS142Q–MAY 1992–REVISED OCTOBER 2005
TERMINAL ASSIGNMENTS (1)(56-Ball GQL/ZQL Package)
1
23456A 1OE NC NC NC NC 2OE B 1Y21Y1GND GND 1A11A2C 1Y41Y3V CC V CC 1A31A4D 2Y22Y1GND
GND
2A12A2E 2Y42Y32A32A4F 3Y13Y23A23A1G 3Y33Y4GND GND 3A43A3H 4Y14Y2V CC V CC 4A24A1J 4Y34Y4GND GND 4A44A3K 4OE
NC
NC
NC
NC
3OE
(1)
NC –No internal connection
TERMINAL ASSIGNMENTS (1)
(54-Ball GRD/ZRD Package)
1
23456A 1Y1NC 1OE 2OE NC 1A1B 1Y31Y2NC NC 1A21A3C 2Y11Y4V CC V CC 1A42A1D 2Y32Y2GND GND 2A22A3E 3Y12Y4GND GND 2A43A1F 3Y33Y2GND GND 3A23A3G 4Y13Y4V CC V CC 3A44A1H 4Y34Y2NC NC 4A24A3J
4Y4
NC
4OE
3OE
NC
4A4
(1)NC –No internal connection
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1OE
1A1
1A2
1A3
1A4
1Y11Y21Y3
1Y42OE
2A1
2A2
2A3
2A4
2Y12Y22Y3
2Y43OE
3A1
3A2
3A3
3A4
3Y1
3Y2
3Y3
3Y4
4OE
4A1
4A2
4A3
4A4
4Y1
4Y2
4Y3
4Y4
Pin numbers shown are for the DGG, DGV, DL, and WD packages.
SN54LVTH16244A,SN74LVTH16244A
3.3-V ABT 16-BIT BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SCBS142Q–MAY 1992–REVISED OCTOBER 2005
FUNCTION TABLE (EACH 4-BIT BUFFER)
INPUTS OUTPUT
Y
OE A L H H L L L H
X
Z
LOGIC DIAGRAM (POSITIVE LOGIC)
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Absolute Maximum Ratings(1) Recommended Operating Conditions(1)SN54LVTH16244A,SN74LVTH16244A 3.3-V ABT16-BIT BUFFERS/DRIVERS
WITH3-STATE OUTPUTS SCBS142Q–MAY1992–REVISED OCTOBER2005
over operating free-air temperature range(unless otherwise noted)
MIN MAX UNIT V CC Supply voltage range–0.5 4.6V
V I Input voltage range(2)–0.57V
V O Voltage range applied to any output in the high-impedance or power-off state(2)–0.57
V V O Voltage range applied to any output in the high state(2)–0.5V CC+0.5
SN54LVTH16244A96
I O Current into any output in the low state V
SN74LVTH16244A128
SN54LVTH16244A48
I O Current into any output in the high state(3)V
SN74LVTH16244A64
I IK Input clamp current V I<0–50mA
I OK Output clamp current V O<0–50mA
DGG package70
DGV package58θJA Package thermal impedance(4)DL package63°C/W
GQL/ZQL package42
GRD/ZRD package36 T stg Storage temperature range–65150°C
(1)Stresses beyond those listed under"absolute maximum ratings"may cause permanent damage to the device.These are stress ratings
only,and functional operation of the device at these or any other conditions beyond those indicated under"recommended operating
conditions"is not implied.Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2)The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
(3)The current flows only when the output is in the high state and V O>V CC.
(4)The package thermal impedance is calculated in accordance with JESD51-7.
SN54LVTH16244A SN74LVTH16244A
UNIT
MIN MAX MIN MAX V CC Supply voltage 2.7 3.8 2.7 3.8V
V IH High-level input voltage22V
V IL Low-level input voltage0.80.8V
V I Input voltage 5.5 5.5V
I OH High-level output current–25–32mA
I OL Low-level output current4864mA
?t/?v Input transition rise or fall rate Outputs enabled1010ns/V
?t/?V CC Power-up ramp rate200200μs/V
T A Operating free-air temperature–55125–4085°C
(1)All unused inputs of the device must be held at V CC or GND to ensure proper device operation.Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs,literature number SCBA004.
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Electrical Characteristics
SN54LVTH16244A,SN74LVTH16244A
3.3-V ABT 16-BIT BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SCBS142Q–MAY 1992–REVISED OCTOBER 2005
over recommended operating free-air temperature range (unless otherwise noted)
SN54LVTH16244A SN74LVTH16244A PARAMETER TEST CONDITIONS
UNIT MIN TYP (1)
MAX MIN
TYP (1)
MAX V IK
V CC =2.7V,I I =–18mA –1.2
–1.2
V
V CC =2.7V to 3.6V,
I OL =–100μA V CC –0.2
V CC –0.2
V CC =2.7V,I OH =–8mA 2.4 2.4
V OH
V
I OH =–24mA 2
V CC =3V I OH =–32mA 2
I OL =100μA 0.20.2V CC =2.7V
I OL =24mA 0.50.5I OL =16mA 0.40.4V OL
V
I OL =32mA 0.50.5V CC =3V
I OL =48mA 0.55
I OL =64mA
0.55V CC =0or 3.6V,
V I =5.5V 5010Control V CC =3.6V,V I =V CC or GND ±1±1inputs I I
μA V I =V CC 11Data V CC =3.6V inputs
V I =0
–5–5I off
V CC =0,V I or V O =0to 4.5V ±100
μA V I =0.8V 7575V CC =3V Data V I =2V –75
–75
I I(hold)
μA
inputs
500V CC =3.6V (2),V I =0to 3.6V –750
I OZH V CC =3.6V,V O =3V 55μA I OZL V CC =3.6V,
V O =0.5V
–5–5μA V CC =0to 1.5V,V O =0.5V to 3V,I OZPU ±100(3)±100μA OE =don't care
V CC =1.5V to 0,V O =0.5V to 3V,I OZPD
±100(3)
±100μA
OE =don't care Outputs high 0.190.19V CC =3.6V,I CC
I O =0,
Outputs low 55mA
V I =V CC or GND
Outputs disabled
0.190.19V CC =3V to 3.6V,One input at V CC –0.6V,?I CC (4)0.2
0.2
mA Other inputs at V CC or GND C i V I =3V or 0V 44pF C o V O =3V or 0V
9
9
pF
(1)All typical values are at V CC =3.3V,T A =25°C.
(2)This is the bus-hold maximum dynamic current.It is the minimum overdrive current required to switch the input from one state to another.
(3)On products compliant to MIL-PRF-38535,this parameter does not apply.
(4)
This is the increase in supply current for each input that is at the specified TTL voltage level,rather than V CC or GND.
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Switching Characteristics SN54LVTH16244A,SN74LVTH16244A 3.3-V ABT16-BIT BUFFERS/DRIVERS
WITH3-STATE OUTPUTS SCBS142Q–MAY1992–REVISED OCTOBER2005
over recommended operating free-air temperature,C
L
=50pF(unless otherwise noted)(see Figure1)
SN54LVTH16244A SN74LVTH16244A
FROM TO V CC=3.3V V CC=3.3V
PARAMETER V CC=2.7V V CC=2.7V UNIT
(INPUT)(OUTPUT)±0.3V±0.3V
MIN MAX MIN MAX MIN TYP(1)MAX MIN MAX
t PLH 1.1 4.4 4.6 1.2 2.3 3.2 3.7
A Y ns
t PHL 1.1 3.6 3.9 1.22 3.2 3.7
t PZH 1.1 4.6 5.4 1.2 2.645
OE Y ns t PZL 1.1 5.4 6.2 1.2 2.745
t PHZ 1.6 5.7 6.2 2.2 3.3 4.55
OE Y ns t PLZ 1.25 4.72 3.1 4.2 4.4
t sk(o)0.5ns
(1)All typical values are at V CC=3.3V,T A=25°C.
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PARAMETER MEASUREMENT INFORMATION
From Output Under Test
C L LOA
D CIRCUIT
Data Input
Timing Input
2.7 V
0 V
Input
VOLTAGE WAVEFORMS SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS PULSE DURATION
V OH
V OH
V OL
V OL
2.7 V
0 V
Input
Output Control Output Waveform 1S1 at 6 V (see Note B)
Output Waveform 2S1 at GND (see Note B)
V OL
V OH 3 V
0 V
≈0 V 2.7 V
VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING
Output
Output
t PLH /t PHL t PLZ /t PZL t PHZ /t PZH
Open 6 V GND
TEST S1NOTES: A.C L includes probe and jig capacitance.
B.Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C.All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z O = 50 ?, t r ≤ 2.5 ns, t f ≤ 2.5 ns.
D.The outputs are measured one at a time, with one transition per measurement.
Open SN54LVTH16244A,SN74LVTH16244A
3.3-V ABT 16-BIT BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SCBS142Q–MAY 1992–REVISED OCTOBER 2005
Figure 1.Load Circuit and Voltage Waveforms
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PACKAGING INFORMATION
Orderable Device Status(1)Package
Type Package
Drawing
Pins Package
Qty
Eco Plan(2)Lead/Ball Finish MSL Peak Temp(3)
5962-9668501QXA ACTIVE CFP WD481TBD Call TI Level-NC-NC-NC 5962-9668501VXA ACTIVE CFP WD481TBD Call TI Level-NC-NC-NC
74LVTH16244ADGGRE4ACTIVE TSSOP DGG482000Green(RoHS&
no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
74LVTH16244ADGGRG4ACTIVE TSSOP DGG482000Green(RoHS&
no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
74LVTH16244ADGVRE4ACTIVE TVSOP DGV482000Green(RoHS&
no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
74LVTH16244ADLRG4ACTIVE SSOP DL481000Green(RoHS&
no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
SN74LVTH16244ADGGR ACTIVE TSSOP DGG482000Green(RoHS&
no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
SN74LVTH16244ADGVR ACTIVE TVSOP DGV482000Green(RoHS&
no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
SN74LVTH16244ADL ACTIVE SSOP DL4825Green(RoHS&
no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
SN74LVTH16244ADLG4ACTIVE SSOP DL4825Green(RoHS&
no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
SN74LVTH16244ADLR ACTIVE SSOP DL481000Green(RoHS&
no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM SN74LVTH16244AGQLR ACTIVE VFBGA GQL561000TBD SNPB Level-1-240C-UNLIM SN74LVTH16244AGRDR ACTIVE LFBGA GRD541000TBD SNPB Level-1-240C-UNLIM SN74LVTH16244AZQLR ACTIVE VFBGA ZQL561000Green(RoHS&
no Sb/Br)
SNAGCU Level-1-260C-UNLIM
SN74LVTH16244AZRDR ACTIVE LFBGA ZRD541000Green(RoHS&
no Sb/Br)
SNAGCU Level-1-260C-UNLIM SNJ54LVTH16244AWD ACTIVE CFP WD481TBD Call TI Level-NC-NC-NC (1)The marketing status values are defined as follows:
ACTIVE:Product device recommended for new designs.
LIFEBUY:TI has announced that the device will be discontinued,and a lifetime-buy period is in effect.
NRND:Not recommended for new designs.Device is in production to support existing customers,but TI does not recommend using this part in a new design.
PREVIEW:Device has been announced but is not in production.Samples may or may not be available.
OBSOLETE:TI has discontinued the production of the device.
(2)Eco Plan-The planned eco-friendly classification:Pb-Free(RoHS)or Green(RoHS&no Sb/Br)-please check https://www.wendangku.net/doc/155141433.html,/productcontent for the latest availability information and additional product content details.
TBD:The Pb-Free/Green conversion plan has not been defined.
Pb-Free(RoHS):TI's terms"Lead-Free"or"Pb-Free"mean semiconductor products that are compatible with the current RoHS requirements for all6substances,including the requirement that lead not exceed0.1%by weight in homogeneous materials.Where designed to be soldered at high temperatures,TI Pb-Free products are suitable for use in specified lead-free processes.
Green(RoHS&no Sb/Br):TI defines"Green"to mean Pb-Free(RoHS compatible),and free of Bromine(Br)and Antimony(Sb)based flame retardants(Br or Sb do not exceed0.1%by weight in homogeneous material)
(3)MSL,Peak Temp.--The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications,and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided.TI bases its knowledge and belief on information provided by third parties,and makes no representation or warranty as to the accuracy of such information.Efforts are underway to better integrate information from third parties.TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals.TI and TI suppliers consider certain information to be proprietary,and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s)at issue in this document sold by TI
to Customer on an annual basis.
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