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VerilogHDL与SystemC的语法等效性

VerilogHDL与SystemC的语法等效性
VerilogHDL与SystemC的语法等效性

 第37卷 第9期

2004年9月

天 津 大 学 学 报

Journal of Tianjin U niversity

Vol.37 No.9

Sep.2004

 

V erilog H DL与SystemC的语法等效性Ξ

张雅绮,王 琨,崔志刚

(天津大学电子信息工程学院,天津300072)

摘 要:针对电子系统设计中使用不同语言制约设计效率的问题,研究了SystemC2.0与Verilog HDL的语法在基本语法结构、时间模型、等待和事件模型、调度模型等方面的等效性,得出如下结论:对于门级以上级别的描述,所有的Verilog HDL的描述总可以在SystemC中找到对应描述;开发EDA设计工具,实现从Verilog HDL描述的知识产权自动转换到SystemC描述是可行的.

关键词:系统级描述语言;Verilog HDL;SystemC;语法等效性

中图分类号:TN492 文献标志码:A 文章编号:049322137(2004)0920842205

Syntax Equivalence of V erilog H DL and SystemC

ZHAN G Ya2qi,WAN G Kun,CU I Zhi2gang

(School of Electronic Information Engineering,Tianjin University,Tianjin300072,China)

Abstract:The syntax equivalence of Verilog HDL and SystemC2.0is discussed in detail regard to basic syntax structure,timing model,wait and event module and scheduler module.It is concluded that for gate or upper abstract level of Verilog HDL description,there always exists corresponding SystemC description,and it is fea2 sible to develop an EDA design tool to automatically convert Verilog2based IP to SystemC2based IP.

K eyw ords:system level description language;Verilog HDL;SystemC;syntax equivalence

随着片上系统(SoC)[1]设计的复杂程度增加,传统的设计方法已经不能够满足电子系统设计的要求,原因在于系统设计、硬件设计和软件设计使用不同语言,无法进行软硬件协同验证,系统验证成为制约设计效率的主要因素.因而迫切需要一种通用语言,能够完成由软件到硬件、系统到门级各个层次的设计描述和验证,这就是先进的系统设计语言(system level de2 scription language,SLDL).

当前系统设计语言的发展方向为:一是扩展传统的硬件描述语言V HDL和Verilog HDL[2],使其支持抽象数据类型,并具有系统描述能力,这方面最突出的研究成果有Co2Design Automation公司所倡导的Su2 perlog,该语言的创始人之一是Verilog HDL的创建者和黄金仿真器Verilog2XL的设计者Phil Moorby;二是扩展传统的软件语言C和C++,使其支持硬件描述,这方面工作最突出的是SystemC[3].近年来,SystemC 在Synopsys等大公司的支持下得到了很大的发展,并推出了SystemC Compiler,支持SystemC的综合.

由于SystemC具有开放性,可完成软硬件在不同精度级别上的协同设计,这种系统设计语言已经受到各国电子工程师的重视,出现了一些有关V HDL与SystemC[4,5]以及Verilog HDL与SystemC[6,7]的对比与转换的研究.随着SystemC的发展,将有越来越多的硬件设计者希望学习和掌握SystemC,并将Sys2 temC与传统硬件描述语言如V HDL或者Verilog HDL进行对比.更为重要的是希望能够设计出传统硬件描述语言与SystemC之间的自动转换工具,将现有的Verilog HDL或者V HDL完成的设计自动地转换成SystemC模型,使设计事半功倍.

SystemC2.0增强了SystemC的系统级描述功能,主要体现在系统可包含软件、硬件以及两者的混合结构,支持用特定的设计方法以及软核来创建模型库并进行模拟,但它仍然不能完成如同Verilog HDL的开关级模拟.因此,有必要深入研究SystemC2.0与Ver2

Ξ收稿日期:2003206204;修回日期:2004203211. 作者简介:张雅绮(1945— ),女,教授.

ilog HDL的等效性,开发自动转换工具,实现已有的HDLs设计转换.本文探讨了SystemC2.0与Verilog HDL的语法在基本语法结构、时间模型、等待和事件模型、调度模型等方面的等效性,提出了设计和研究Verilog HDL描述的知识产权(IP)自动转换到Sys2 temC描述的可行性.

1 基本结构的等效性

Verilog HDL的基本组成结构是模块module,对应的SystemC描述是sc-module.与模块之间相联系的是端口信号的定义.Verilog HDL的输出信号也可以作为输入,而SystemC的断口定义了数据转移的方向,所以对于同样作为输入的Verilog HDL输出信号output,在SystemC中必须定义为inout.Verilog HDL 不支持浮点型的输出,而SystemC则支持,这在Ver2 ilog HDL到SystemC转换的时候不会产生问题,反之则不可以.对于Verilog HDL中的连续赋值语句assign 和always语句,都对应于SystemC的进程process. SytemC的进程有3种:方法进程、线程和钟控线程.方法进程用来进行组合逻辑模拟,线程可用来模拟测试平台,而钟控线程用来模拟同步有限状态机.后两种都是行为模型,至少需要行为级综合工具才能综合.由于方法进程可以用来描述寄存器传输级电路,一般将Verilog HDL中的assign和always语句翻译成方法进程.在always中,可能同时存在对多个寄存器(reg)型变量的阻塞或者非阻塞赋值,但可综合的代码只允许对同一寄存器变量进行非阻塞赋值或者阻塞赋值.对于一个always语句中的所有阻塞赋值语句,应该映射到一个SystemC进程中.对于不同变量的非阻塞赋值,应该映射为不同的SystemC进程.

Verilog HDL的initial语句等效于SystemC进程的构造函数;parameter可以用SystemC的类模板实现;文献[6]中建议使用C++的宏来实现门级电路,还提出了一种“信号处理器引擎”方法用以在SystemC中选择支持Ver2 ilog HDL的范围.对于子模块的例化,Verilog HDL和Sys2 temC都支持端口对应和位置映射.

2 时间模型的等效性

Verilog HDL与SystemC在定时时间和时钟定义方面差异较大,但都能完成硬件描述中的时序描述.

首先是时钟.在Verilog HDL中没有专门的时钟,用户需要定义一个reg信号来模拟时钟,而SystemC 中则直接定义了结构sc-clock用于定义时钟,例如下述代码1.

代码1 V erilog H DL与SystemC时钟定义的等效性

Code1 Equivalence of V erilog H DL and SystemC

on clock def inition

//Verilog HDL//SystemC

module(clk);//define a20MHz

 clock

sc-clock clk(“clk”,50,0.5,5,

 false);

initial clk=#50;always#25

 clk=~clk;

endmodule

在Verilog HDL中,用timescale定义缺省的时间单位,在SystemC中使用了sc-set-time-resolution()和sc-set-default-time-unit(),这在功能上与timescale等效.若将时间单位设置为1ns,分辨率为1ps,则代码2描述了时间单位的等效性.

代码2 V erilog H DL与SystemC时间单位和

时间分辨率定义的等效性

Code2 Equivalence of V erilog H DL and SystemC

on unit and resolution of time

//Verilog HDL//SystemC

‘timescale1ns/1ps

sc-set-time-resolution(1,

 SC-PS)

sc-set-default-time-unit(1,

 SC-NS)

3 等待(w ait)与事件(event)的等效性

为了支持行为级动态建模,Verilog HDL与Sys2 temC都定义了wait函数和事件,当它被执行时将产生时间,触发等待在该事件上的进程继续执行.在Sys2 temC中,wait()只能在线程或者钟控线程内使用,在方法进程内须用与wait()等效的函数next-trigger()描述延迟,如下述的代码3,它描述的是一个延迟器件.值得注意的是,在代码3中,左边的Verilog HDL 代码实际上描述的是传输延迟,右边SystemC描述的是惯性延迟.惯性延迟可能造成极短脉冲的消失,而传输延迟则不会.

在使用next-trigger()描述时序逻辑延迟时,需要将输入信号(代码3中的din)延迟一个时钟周期,仿真结果才会是预期的,但由此会造成综合结果不正确,所

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 2004年9月 张雅绮等:Verilog HDL与SystemC的语法等效性

以不建议在时序逻辑中使用next-trigger(),这是使用高级语言描述硬件的缺点,SystemC尚不能够描述惯性延迟.

代码3 V erilog H DL与SystemC延迟描述的等效性

Code3 Equivalence of V erilog H DL and SystemC

on delay description

//Verilog HDL//SystemC

‘define DL Y2#define DL Y2

module dff(clk,din,dout);#include“systemc.h”

input clk,din;SC-MODUL E(delayer){

output dout;sc-indin;

assign sc-outdout;

dout<=#‘DL Y din; endmodule void do it(){next-trigger(DL Y, SC-NS);

dout=din;};

SC-CTOR(dff)

{SC-METHOD(do it);

sensitiveνdin;

}};

在SystemC中,Event定义一种事件对象,能够激活因遇到wait()或者wait-until()而等待的线程或者钟控线程,wait()函数只在线程或者钟控线程内使用,通常与event对象搭配,如代码4所示.

代码4 V erilog H DL的event对象与SystemC的

sc-event的等效性(准代码)

Code4 Equivalence of event object in V erilog H DL

and sc-event in SystemC

//Verilog HDL//SystemC

module tb();#include“systemc.h”

event reseted;SC-MODUL E(tb){

initial begin sc-event reseted;

//code for reset void tb-do-others(){//some reseted; code

end wait(reseted);

initial begin//code for after reset disposal};

//some code……void tb-rst(){//codes for reset

@(reseted);reseted.notify();}

//code for after reset SC-STOR(tb);

//disposal……{SC-THREAD(tb-do-others);

end//sensitivity list……

endmodule SC-THREAD(tb-rst);

//sensitivity list……}};

由代码4可以看出,Verilog的动态事件event可以映射到SystemC的对应事件sc-event,SystemC的wait函数支持多种不同的重载参数,如代码5所示.

代码5 V erilog H DL和SystemC的w ait()函数

Code5 w ait()functions in V erilog

H DL and SystemC

//Verilog HDL wait-statement//SystemC wait-function

wait(expression)等待条件表达

式为真

wait();等待敏感表中的事件发

wait(e1);等待事件e1发生

wait(e1|e2|e3);等待事件发生

wait(e1&e2&e3);等待事件

 e1,e2,e3之一发生

wait(200,SC-NS);等待事件

 e1,e2,e3同时发生

wait(200,SC-NS,e1);等待事

 件e1发生,直到200ns

wait(SC-ZERO-TIME);等待

 一个Δ周期

代码5列出了部分SystemC的wait()函数支持的重载参数类型.Verilog HDL的wait()函数比较简单,进程执行到wait语句时进入等待状态,直至条件表达式为真时,重新开始启动进程.可以看出,SystemC的wait()函数功能比Verilog HDL更强大.

4 仿真调度模型的等效性

仿真调度模型(Scheduler)涉及到代码如何执行,理解它对于Verilog HDL到SystemC的代码转换有重要意义.为了支持寄存器传输级的并行描述,SystemC 采用了与Verilog HDL基本相同的调度模型———基于Δ(delta)延迟.一个Δ周期包括求值和更新两个阶段,在一个时间点上,这样的Δ周期会持续出现,直到在求值前后的结果不再发生变化,而在宏观上,时间并没有前进.代码6中的Verilog HDL程序段在VCS和Verilog2XL不同仿真器环境下,可能得到不一致的仿真结果.

代码6中有可能先执行赋值,也有可能先执行$display.在默认选项下,在Verilog2XL显示的addr 值为x(仿真命令为verilog example.v),VCS中的结果为1(仿真命令为vcs2o example.out example.v,然后执行example.out).仿真结果不同的原因是Verilog2 XL执行完整个initial语句后才对addr赋值,而VCS

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?天 津 大 学 学 报 第37卷 第9期 

是在last-addr被赋值后中断initial语句,在执行完对addr赋值后返回initial.如果将代码6中第三和第四行合并为wire addr=last-addr+1,则仿真结果相同.然而依Verilog HDL21995标准,这两种赋值并没有区别,标准中并没有定义initial和assign执行的先后顺序.由于SystemC基于C++,构造函数先于其他成员函数执行,所以不会产生问题.对于SystemC2.0调度模型,在初始化阶段(notify()),所有进程包括方法进程和线程都将被执行一次,这与Verilog HDL和V HDL的调度模型一致.

代码6 一段在V CS和V erilog2X L

仿真结果不一样的代码

Code6 A procedure of having different simulation results using V CS and V erilog

2X L tools

//Verilog HDL-file:Example.v

module example

integer last-addr;

wire[31:0]addr;assign addr=last-addr+1;

initial begin last-addr=0;$display(“at time:”,$time,“;the addr changed to:%d”,addr);end

endmodule 5 等效性举例

根据上述等效性讨论可知,SystemC继承了C+ +类的语法结构,Verilog HDL则是结构化的硬件描述语言.下面举一个简单的例子,来说明用两种语言对同一逻辑电路进行描述的雷同与差异.一个具有逻辑与、或、或非和取反功能的算术逻辑单元(AL U)的原理如图1所示,两种描述代码示于代码7中.从中可以清楚地看出SystemC与Verilog HDL描述的等效性.

图1 一个简单的算术逻辑单元

Fig.1 Schematic of a simple A L U

代码7 简单的算术逻辑单元代码

Code7 Example of descriptions to a simple A L U using V erilog H DL and SystemC

//Verilog Code for a simple ALU//SystemC Code for a simple ALU

module alu-complete(dout,din-a,din-b,enable,opcode)void alu::operate()

 input[3:0]din-a,din-b;{

 input[2:0]opcode;sc-mvres;//res与操作数宽度相同 input enable;switch(din-sel.read to Int())//读din-sel并转换成整数 output dout;{

 reg[3:0]alu-reg;//寄存器数据类型case0://或操作

 assign dout=(enable==1)?alu-reg:4’b0;res=din-a.read()|din-b.read();break;

 always@(opcode or din-a or din-b)case1://异或操作

case(opcode)res=din-a.read()^din-b.read();break;

3’b001:alu-reg=din-a|din-b;//或操作case2://与操作

3’b001:alu-reg=din-a^din-b;//异或操作res=din-a.read()&din-b.read();break;

3’b001:alu-reg=din-a&din-b;//与操作case3://取反操作

3’b001:alu-reg=~din-b;//取反操作res=~din-b.read();break;

default:alu-reg=4’b0;//opcode为其他值}

 end case dout-res.write(res);//写输出结果

endmodule}

6 结 语

为了开发从传统硬件描述语言描述的知识产权(IP)到新一代描述语言SystemC的代码转换,必须首先研究其等效性.本文研究了Verilog HDL与Sys2 temC2.0从门级描述到系统级描述的语法等效性,并通过一个简单的例子说明了这种等效性.综合上面的

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 2004年9月 张雅绮等:Verilog HDL与SystemC的语法等效性

讨论和前人的工作可以看出,对于门级以上级别的Verilog HDL 描述,在SystemC 中几乎有所有的对应

描述,因此可以设计开发出一种能完成Verilog HDL

描述的IP 到SystemC 描述的转换工具.参考文献:

[1] Michael K eating ,Pierre Bricaud.Reuse Methodology M an 2

ual f or S ystem 2on 2a 2chip Designs.[M ].2nd ed.Boston :

K luwer Academic Publishers ,1999.

[2] IEEE Standard Hardware Description Language Based on

the Verilog Hardware Description Language[S].IEEE Std 1364—1995,http :∥https://www.wendangku.net/doc/1510981819.html,/reading/ieee/std/dasc/1364—1995.pdf ,2003..

[3] Stuart Swan.An Introduction to System 2Level Modeling in

SystemC 2.0,http ://https://www.wendangku.net/doc/1510981819.html,/white papers/Systemc-wp20.pdf ,2001207.

[4] Agliada N ,Fin A ,Fummi F ,et al.On the Reuse of VHDL

Modules into SystemC Designs ,http :/eda.sci.univr.it/pub 2lications/sdl01.pdf ,2001.

[5] Bollano G ,G arino P ,Turolla M ,et al.S ystemC ’s Impact

on the Development of IP Libraries ,https://www.wendangku.net/doc/1510981819.html,.pdf/Ipooe.pdf ,2000.

[6] Leila Mahmoudi ,Ayough Ali.Verilog2SC :A Methodology

for Converting Verilog HDL to SystemC[EB/OL ],http ://https://www.wendangku.net/doc/1510981819.html,/projects/sitedocs/document/Verilog2SC -tech/en/1.pdf ,2003201225.

[7] Synopsys Inc.Describing Synthesizable RTL in SystemC ,

http ://https://www.wendangku.net/doc/1510981819.html,/products /sld/rtl-systemc.pdf ,2003201215.

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?648?天 津 大 学 学 报 第37卷 第9期 

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名词性从句 在句子中起名词作用的句子叫名词从句。名词从句的功能相当于名词词组,名词从句又可分为主语从句、宾语从句、表语从句和同位语从句。 一.主语从句 1.作句子主语的从句叫主语从句。主语从句通常由从属连词that,whether, if和连接代词what, who, which, whatever,whoever以及连接副词how, when, where, why等词引导。that在句中无词义,只起连接作用。连接代词和连接副词在句中既保留自己的疑问含义、又起连接作用,在从句中充当从句的成分。主语从句要求使用陈述句语序。 What surprised me most was that the little girl could play the violin so well. How he was successful is still a puzzle. That he is going aboard made him excited. Where the English party will be held has not yet been announced. 注:有时为避免句子头重脚轻,常用形式主语it代替主语从句作形式主语放于句首,而把主语从句置于句末。主语从句后的谓语动词一般用单数形式。 It is interesting that you like him. It is a pity that you can not go to the party tonight. 2.连接词的选用 (1)that和what的选用 that和what都可引导主语从句。what除起连接作用外,还在名词性从句中充当某些成分,可作从句的主语、宾语或表语。而that在名词性从句中不充当任何成分,无词义,只起连接词作用。 What he wants is a book. 他想要的是一本书。 That light travels in straight lines is known to all. 众所周知,光线沿直线运行。 (2)if和whether的选用

英语名词性从句语法100题练习

英语名词性从句语法练习100题 1. I’m sorry I have no idea ___. a. what does this word mean b. what’s the meaning of this word c. what this word means d. what meaning of this 2. ___is known that she is a famous doctor. A. That b. This b. It d. She 3. The reason for his absence was ___his mother was ill. A. because b. that c. why d. what 4. I haven’t seen you for ages. Can you tell me ____ a. where have you gone b. where you have gone c. where have you been d. where you have been 5. ___we will have a good harvest this year is still unknown. A. If b. That c. Which 6. ____wasn’t quite clear. a. Why did she do it b. Why she did it c. What did she do d. What she did it 7. ___do you think is the top student in your class a. Whom b. Who c. Whose d. Which 8. ___might do harm to other people. a. That you have done b. What you have done c. What have you done d. Which have you done 9. ____gets hone first starts cooking. A. Anyone b. Whoever c. Who d. Those 10. Is this ___looking for a. what are you b. what you are c. that were you d. that you were ’ll give this book to ___likes to have it . a. whomever b. whichever c. whatever d. whoever idea ___we should finish the work ahead of time was accepted. A. that b. whether c. if d. which is all ____our teacher explained to us in class. a. what b. that c. which d. of want to know ___. a. where are the experimental plots b. where are the experimental plots. c. where the experimental plots are d. where the experimental plots are thing to do is _____everyone is doing here. a. the thing what b. which the thing c. which d. what 16. It doesn’t matter ___to day or tomorrow. a. whether you come b. how you come c. when you come d. why you come 17. After graduation she asked to be sent to ___. a. where she was mostly needed b. where she was most needed c. where was she needed d. where she needed 18. I don’t know if she ____tomorrow; if he ____, I’ll let you know. a. comes, will come b. will come, will come c. will come, comes d. comes, comes 19. ____happens, don’t be afraid. A. What b. Anything c. Wh ich d. Whatever 20. He didn’t pass the exam, ___hard he had tried. A. how b. whatever c. however d. wherever 21. She did live far from ___I am living. A. the place that b. the place which c. where d. the place 22. It worried her a bit ___her hair was turning grey . a. while b. if c. that d. for 23. ____he is a millionaire is known to all in the city. a. Since b. because c. That d. / 24. ___the 2008 Olympic Games will be held in Beijing is known to all . a. Whenever b. That c. If d. Whether 25. The reason why I burst into tears is ____I’m unwilling to part with my parents. a. that b. because c. which d. / 26. The problem lies _____I have no money. a. that b. in that c. in the fact d. in the fact that want to know _do to convince him. a. what can I B. how can I C. which I can d. what I can 28. __comes back fist is supposed to win the prize. a. whoever b. The one c. Those who d. Anyone 29. The old gentleman never fails to help ____is in need of his help.

th语法专题名词性从句

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例句展示 ◆That they will win the game is certain. →It is certain that they will win the game. ◆Whether the task can be finished on time is still unknown. →It is still unknown whether the task can be finished on time. ◆Why he didn’t come here is not clear to anyone. →It is not clear to anyone why he didn’t come here. ◆Whoever breaks the law should be punished. ◆What he said at the meeting is important. 例句展示 ★Can you tell me when and how I can get to the city? ★I don’t understand what he means. ★I am not sure whether he would help me. ★He said that he had visited his former English teacher several times.

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what引导名词性从句的五种用法

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英语语法名词性从句用法小结

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英语《名词性从句》语法知识及英语学习方法

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之后,如think, make, consider等,可以用it作形式宾语。 (2)That从句一般不能充当介词宾语,偶尔可作except, in 的宾语。 3、表语从句(that不可省略) 4、同位语从句 连词that引导同位语从句时,应在某些抽象名词之后,如:fact, hope, desire, thought, suggestion, idea, news, problem, possibility等,对前面的名词起补充说明的作用,that在从句中不担当任何成分,不能省略。 二、whether/if从句 1、在表语从句和同位语从句中只能用whether不能用if;当主语从句放于句首时,只能用whether不用if;当it作形式主语,主语从句放在句末时用whether或if 均可;discuss后引导宾语从句时,必须用whether。 2、在宾语从句中: (1)及物动词后:whether从句中不能有否定式,宾语从句为否定句时用if;if 不能与or not连用,但可以用whether or not;whether后可以加不定式。 (2)介词后:只能用whether,不用if。 三、特殊疑问词引导的从句 1、主语从句:特殊疑问词引导主语从句时,常用it作形式主语。 2、宾语从句 (1)常见的能接特殊疑问词引导的宾语从句的动词有see, tell, ask, answer, know, decide, find out, imagine, suggest, doubt, wonder, show, discuss, understand, inform, advise等。 (2)作介词宾语。 3、同位语从句、表语从句

英语语法从句讲解

从句 从句按其在主句中的句法功能可分为三类: 即名词性从句、形容词性从句(即定语从句)和副词性从句(即状语从句)。 引导从句的词称作关联句. 一、名词性从句 引导这些名词性从句的关联词包括: 从属连词that, if, whether; 连接代词 who,whoever,whom,whomever,which,whichever,what,whatever,wh ose; 连接副词where, when, why, how。 其中, 从属连词只起连接作用, 在从句中不充当任何句法成分, 而连接代词和连接副词既起连接作用, 在从句中又充当一定的成分. That Owen should have married his cousin is not at all surprising. The fact is that he didn't go to the dinner party. I don't know if he will attend the meeting. Have you heard the news that Mary is going to marry Tom? 你听说玛丽要和汤姆结婚的消息了吗?(that引导同位语从句) [提示]

1. 在含有主语从句的复合句中, 为保持句子平衡, 常用it作形式主语,而将真正的主语从句置于句末. It's well-known that water is indispensable to life.(形式主语) 2. 为保持句子平衡, that引导的宾语从句也常用it代替, 而将真正的宾语从句置于主句句末。这常常出现在主句有形容词或分词作宾语补足语的情况下。 He made it quite clear that he preferred to live here. 3. 从属连词whether和if都作“是否…”解, 但if不可引导主语从句和表语 从句。whether可与or(not)连用, 而if不可以。 I don't know whether (if) she is at home. Whether she comes or not makes no difference. 4. that和what引导名词性从句的区别: that在从句中不充当成分,而what在从句中充当一定的成分, 如主语、表语、宾语等。that可省略, what则不可省。 He always means what he says. She suggested (that) he do it at once. 5. 同位语从句大多由从属连词that引导, 常跟在下列名词后面, 如fact, idea, opinion, news, hope, belief等, that不可省。同位语从句一般用来解释说明这些名词的具体含义和内容。 We are familiar with the idea that all matter consists of atoms. The news that we are invited to the conference is very encouraging.

名词性从句语法填空

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