电子科技大学模电课程设计V2015

Project 1

Power Supplies

Objective: This project will show some of the basic principles of power supplies using fullwave rectifier, Zener diode, and fixed-voltage regulator circuits.

Components: Bridge Rectifier (50 PIV, 1 A), Zener diode (10 V at 500 mW), 7805 regulator

Introduction:

Most of the direct current (DC) power used in electronic devices is derived by converting 60 Hz, 115 V alternating current (AC) power to direct current power. This AC to DC conversion usually involves a

step-down transformer, rectifier, filter, and a regulator. The step-down transformer is used to decrease the AC line voltage from 115 V RMS to an RMS value near the DC voltage needed. The output of the step-down transformer is then fed into a diode rectifier circuit that only outputs positive halves of the input sinusoid. A filter is then used to smooth the rectifier output to achieve a nearly constant DC voltage level. A regulator can be added after the filter to ensure a constant output voltage in spite of changes in load current and input voltages.

Two different types of voltage regulators will be used in this project. The first involves a Zener diode circuit and the second involves a voltage regulator circuit. A Zener diode can be used as a voltage regulator when the diode is reverse biased and operated in the breakdown region. To maintain voltage regulation, the Zener diode must be operated in the breakdown region at a current greater than the "knee" current (I ZK). For currents greater than I ZK, the Zener diode characteristic curve is nearly vertical and the voltage across the diode changes very little. Of course there is a maximum current the diode can tolerate, so good regulation is provided when the diode is reverse biased with currents between I ZK and I ZMAX. Zener diodes are available with a wide variety of breakdown voltages. Another type of voltage regulator is available with the 7800 series regulators. This series of fixed-voltage regulators is numbered 78xx, where xx corresponds to the value of the output voltage. Output voltages from 5 to 24 volts are available. These regulators are easy to use and work very well.

Design:

1. Find approximations for the DC voltage level and AC peak to peak ripple voltage for the bridge rectifier and filter circuit of Figure 1-1.

2. For the Zener diode regulator circuit of Figure 1-2 assume that the Zener diode will regulate at 10 V over a current range of 5 mA to 25 mA. Assuming that the current flowing through R is always between 5 mA and 25 mA and the Zener diode is regulating at 10 V, find the minimum values of R and R L required. You may assume the forward diode drop for the two diodes is 1 V.

Lab Procedure:

1. Construct the bridge rectifier circuit of Figure 1-1 without the capacitor. Use the Variac with the step-down transformer for the input voltage to the bridge rectifier. With the transformer plugged into the Variac, adjust the Variac until the secondary voltage from the transformer equals 12 V RMS. BE CAREFUL not to short the secondary terminals!Observe the secondary waveform on the oscilloscope. Put the oscilloscope on DC coupling and observe the load voltage waveform V L. Remember that both the input source and the load cannot share a common ground terminal.

2. Remove power from the circuit. Insert the capacitor as shown in Figure 1-1 being sure to observe the correct polarity. Energize the circuit. With the oscilloscope on DC coupling

observe V L. Measure the DC voltage level using the digital voltmeter. With the oscilloscope on AC coupling observe the ripple voltage V R. Compare these measured values with the calculated values.

3. Observe the effect of loading on the circuit by changing the load resistor from 1 kΩ

to 500 Ω. Measure the DC voltage level with the digital voltmeter. Observe the ripple voltage with the oscilloscope set on AC coupling. Compare these values with the previously recorded values.

4. Record the Zener diode characteristic curve from the digital curve tracer. Note the value of the breakdown voltage in the breakdown region. Also note the value of the "knee" current I ZK.

5. After verifying your designed values for R and R L with the instructor, construct the Zener diode regulator circuit of Figure 1-2. Measure the DC voltage level with the digital voltmeter for the minimum value of R L along with several values above and below the minimum value. Be careful not to overload the Zener diode. Comment on the circuit's operation for these different load resistances.

6. Construct the 7805 regulator circuit of Figure 1-3 being careful to observe the correct pin configuration of the regulator. Measure the load voltage for R L equal to 300 Ω, 200 Ω, and 100 Ω. Calculate the current for each of these cases. Does the value of the load resistor affect the output voltage?

7. Using R L equal to 200 Ω, record the 7805 regulator input voltage (pin 1) and output voltage (pin 3). Decrease the regulator input voltage by decreasing the setting of the Variac. For each decrease in amplitude, record the regulator input and output voltages. Continue decreasing the amplitude until the output of the regulator drops a measurable amount below 5 V. What is the minimum input voltage needed for the 7805 regulator to produce a 5 V output?

Questions:

1. Why can't the input source and load have a common ground in the bridge rectifier circuit?

2. Can the Zener diode be used as a conventional diode? Explain your answer and verify with a curve from the curve tracer.

3. Would the value of the output filter capacitor have to increase, decrease, or remain the same to maintain the same ripple voltage if the bridge rectifier were changed to a half-wave rectifier? Explain your answer.

4. How would increasing the frequency of the input source affect the ripple voltage assuming all components remained the same?

Project 2

Analog Applications of the Operational Amplifier

Objective:This project will demonstrate some of the analog applications of an operational amplifier through a summing circuit and a bandpass filter circuit.

Components: 741 op-amp

Introduction:

Figure 2-1 shows a weighted summer circuit in the inverting configuration. This circuit can be used to sum individual input signals with a variable gain for each signal. The virtual ground at the inverting input terminal of the op-amp keeps the input signals isolated from each other. This isolation makes it possible for each input to be summed with a different gain.

The bandpass filter shown in Figure 2-2 uses an op-amp in combination with resistors and capacitors. Since the op-amp can increase the gain of the filter, the filter is classified as an active filter. This bandpass filter circuit is extremely useful because the center frequency can be changed by varying a resistor instead of changing the values of the capacitors. The center frequency is given by:

The center frequency can be changed by varying the variable resistor R3. Increasing R3 decreases the center frequency while decreasing R3 increases the center frequency. The bandwidth is given by:

Notice that the bandwidth is independent of the variable resistor R3 so the center frequency may be varied without changing the value of the bandwidth. The gain at the center frequency of the bandpass filter is given by:

Design:

1. Find the relationship between the output and inputs for the weighted summer circuit of Figure 2-1.

2. Design a bandpass filter with a center frequency of 2.0 kHz and a bandwidth of 200 Hz. Let the voltage gain at the center frequency be 20. Check your design with PSPICE?. Use ± 15 V supplies for the op-amp. Use R L = 2.4 k .

Figure 2 - 1: Weighted Summer

Figure 2 - 2: Bandpass Filter

Lab Procedure:

1. Construct the summing amplifier of Figure 2-1. Design for the transfer function to be V O = -2 V IN1 - V IN

2. Use ± 15 V supplies for the op-amp. Use R L = 2.4 kΩ.

2. Let V IN1be a 1 V peak sine wave at 1 kHz and V IN2equal to 5 V DC. Verify the amplifier's operation by monitoring the output waveform on the oscilloscope.

3. Construct the bandpass filter of Figure 2-2. Use the designed values for the resistors and capacitors. Use ±15 V supplies for the op-amp. Use R L = 2.4 kΩ.

4. Record and plot the frequency response (you may want to use computer control for the sweep and data collection). Find the center frequency, corner frequencies, bandwidth, and center frequency voltage gain to verify that the specifications have been met.

5. Change R3to lower the center frequency from 2.0 kHz to 1.0 kHz. Repeat part 4 for the new frequency response. Verify that the new center frequency is 1.0 kHz. What is the new bandwidth? What is the new center frequency voltage gain? Compare with the measurements of Procedure 4.

Questions:

1. Could the summer circuit be used with the inputs connected to the noninverting terminal and produce the same affect without the inversion? Explain.

2. What is/are the benefit(s) of using an op-amp circuit to produce a bandpass filter over using an RLC circuit with a noninverting op-amp at the output of the RLC circuit?

Project 3

Analog Computer Applications using the Operational Amplifier

Objective:This project will focus on the use of the operational amplifier in performing the mathematical operations of integration and differentiation. The design of a simple circuit (analog computer) to solve a differential equation will also be included.

Components: 741 op-amp

Introduction:

Figures 3-1 and 3-2 illustrate two op-amp based circuits designed to perform differentiation and integration respectively. The operations are performed "real-time" and can be helpful in observing both initial transients and steady state response. The analysis of the circuits is based on the "ideal" op-amp assumptions and performed in the time domain. The resistor R I shown in the two circuits is included to help with stability and for general circuit protection. The value for R I is nominally set equal to the feedback resistor (Figure 3-1) or the input resistor (Figure 3-2). The purpose of the optional resistor is left for student investigation in conjunction with the summary questions.

The differentiator and integrator circuits may be combined with "standard" inverting and non-inverting op-amp circuits to provide the building blocks for analog computers. The resultant analog computer circuits are designed to solve differential and/or integral/differential equations in a real time environment. The ability to easily include, and

change, initial conditions and forcing functions are additional benefits of the analog computers. Figure 3-3 illustrates a circuit designed to solve the second order differential equation KY - Y = 0 with the initial condition Y(0) = - V X and K = R1R2C1C2. The initial condition is "set" by using the momentary contact switch to force the output to equal the applied voltage at t = 0 (the time the switch is closed).

While the major advances in digital computers and digital signal processing have reduced the use of these three circuits, they are still a fast and relatively inexpensive method for process control and stability/operation analysis for systems that can be represented in terms of differential equations.

Design:

1. Derive the expressions relating the input and output signals for the circuits shown in Figures 3-1 and 3-

2.

2. Design an analog computer to solve with y(0) = 2.

Solve the differential equation when f(t) = 0 and verify your results using PSpice?.

Figure 3 - 1: Differentiator

Figure 3 - 2: Integrator

Figure 3 - 3: Analog Computer (linear, second order, homogenous

differential equation)

Lab Procedure:

1. Construct the circuit shown in Figure 3-1. Use ± 15 V supplies for the op-amp and a load resistance of ≈

2.4 kΩ.

2. Verify the operation of the circuit using a 500 mV peak, 50 Hz sinewave as the input signal. Be sure to design the "gain" such that the output does not saturate.

3. Repeat step 2 with a sinewave frequency of 500 Hz. Does the circuit still operate correctly? What changes need to be made to prevent output saturation?

4. Repeat steps 2 and 3 using a triangle wave and then using a square wave with the same magnitudes and frequencies as used in steps 2 and 3.

5. Construct the circuit shown in Figure 3-2. Again, use ± 15 V supplies for the op-amp and a load resistance of ≈ 2.4 kΩ.

6. Repeat steps 2 through 4 for this circuit. Be sure to adjust your "gain" as necessary to maintain an output signal within the saturation limits of ≈± 12 V.

7. Construct the circuit designed to solve the differential equation in part 2 of the design section. Verify the operation of the design using three different input waves (sine, triangle, and square). Determine the operation for at least three different

frequencies -- 10 Hz, 1 kHz, and 100 kHz. Explain any differences in operation of the circuit. What affect does the initial condition have on the result?

Questions:

1. How could you use the differentiator to obtain an estimate of the slew rate for the op-amp?

2. Why should you include a resistor in parallel with the capacitor in the integrator?

3. What is the purpose of the resistor in series with the input capacitor in the differentiator?

4. Is it possible to design a circuit to perform the differentiation and integration functions using the non-inverting input? Explain your answer.

Project 4

Common Emitter Amplifier

(designed for two lab periods)

Objective: This project will show how the h-parameters for a BJT can be measured and used in an equivalent circuit model for the BJT. A CE small signal amplifier will be biased and designed to specifications along with both low and high frequency response and adjustment. Series-series feedback will also be used to control the bandwidth and input impedance of the CE amplifier.

Components: 2N2222 BJT

Introduction:

In order for circuits involving transistors to be analyzed, the terminal behavior of the transistor must be characterized by a model. Two of the models often used for a BJT are the hybrid-π and the h-parameter models. The complete hybrid-πcircuit model for the BJT is shown in Figure 9-1. This model includes the internal capacitances and output resistance of the BJT. Inclusion of the internal transistor capacitances makes the hybrid-π model valid throughout the entire frequency range of the transistor. Typical data sheet values of Cπ and Cμ are 13 pF and 8 pF respectively. These values are so small that Cπ and Cμ may be considered open circuits for midband frequencies. The resistance r x typically has a value in the tens of ohms and can be considered a short circuit while rμand r o are usually extremely large in value and can be considered open circuits.

The h-parameter small signal model for the BJT is characterized by the four h-parameters and is shown in Figure 9-2. Unlike the hybrid-πmodel, the h-parameter model does not ordinarily include frequency related effects and components and is therefore generally valid only at midband frequencies and below . However the h-parameter model is very useful since the h-parameters can be easily measured for a BJT. The value of h re is usually on the order of 10-4 and can be considered a short circuit. The value of h oe is usually on the order of 10-5 S making 1/h oe effectively an open circuit for most circuit configurations and biases. Making the same assumptions, the hybrid-π and h-parameter models are equivalent at midband frequencies.

For a transistor to operate as an amplifier, it must have a stable bias in the active region. To bias a transistor, a constant DC current must be established in the collector and emitter. This current should be as insensitive as possible to variations in temperature and β (or h fe). The voltage across the base-emitter junction decreases about 2 mV for each 1 °C rise in temperature, therefore it is important to stabilize V BE to ensure that the transistor does not overheat. The circuit shown in Figure 9-3 is the biasing scheme most often used for discrete transistor circuits. For this circuit, the base is supplied with a fraction of the supply voltage V CC through the voltage divider R B1, R B2. For ease of circuit analysis, the Thevenin equivalent circuit shown in Figure 9-4 can replace the voltage divider network. To ensure that the emitter current is insensitive to variations in β and V BE, V BB should be much greater than V BE and R BB should be much less than βR E. R BB is usually 20-30% of the product βR E. The voltage across R E is also usually 2-3 volts for good β

stabilization. This same biasing scheme can be used for all three of the BJT amplifier configurations (CB, CC, CE).

The BJT CE amplifier is shown in Figure 9-5. The signal source and resistive load are capacitively coupled to the amplifier. The coupling capacitors C1and C2, emitter bypass capacitor C E, and internal transistor capacitances shape the frequency response of the amplifier. A typical amplifier frequency response curve is shown in Figure 9-6. The low half power corner frequency F L is controlled by the input and output coupling capacitors and the emitter bypass capacitor. The high half power corner frequency F H is controlled by the internal transistor capacitances and any separate load capacitor. The bandwidth is the difference between the high and low corner frequencies (F H - F L). As the signal frequency drops below midband, the impedance of the coupling capacitors C1 and C2 and emitter bypass capacitor C E increases. The coupling capacitors drop more signal voltage and the emitter bypass capacitor begins to open up and causes increased series-series feedback resulting in a reduction of the gain. One method of relating C1, C2, and C E to the low cutoff frequency is the short circuit time constant method. The time constant method is advantageous because it provides an approximate value for the cutoff frequencies without exactly finding all the poles and zeros of a circuit. The time constant method also helps show which capacitors are dominant in determining the corner frequencies. The short circuit time constant method relates F L and circuit capacitors by:

where F L is the low half power frequency, n c is the number of coupling and bypass capacitors in the circuit, and C i is the value, in Farads, of the ith capacitor. R is is the resistance facing the ith capacitor with the ith capacitor removed and all other coupling and bypass capacitors replaced by short circuits and the input signal reduced to zero. This resistance calculation is repeated for each coupling and bypass capacitor in the circuit.

The internal capacitances of a transistor have values in the picofarad (pF) range that begin to decrease the gain of the amplifier for frequencies above midband. A method of relating the internal transistor capacitances C and C m to the high cutoff frequency is the open circuit time constant method. This method relates F H and the internal transistor capacitances by:

where F H is the high half power frequency, n c is the number of internal transistor capacitors in the circuit, and C i is the value, in Farads, of the ith capacitor. R io is the resistance facing

the ith capacitor with the ith capacitor removed and all internal transistor capacitors replaced by open circuits and the input signal reduced to zero. This resistance calculation is repeated for each internal transistor capacitor in the circuit.

When the emitter resistor of the CE amplifier is left unbypassed, the input current signal flows through the unbypassed emitter resistor as does the output signal current. This unbypassed emitter resistor in the CE amplifier produces series-series feedback. The feedback resistor is R E. Feedback is used in amplifiers to control input and output impedances, extend bandwidth, enhance signal-to-noise ratio, and reduce parameter sensitivity. These feedback performance improvements are all at the expense of gain in the amplifier.

Figure 4 - 1: Hybrid- BJT Model

Figure 4 - 2: h Parameter BJT Model

Figure 4 - 3: BJT Typical Biasing Circuit

Figure 4 - 4: Thevenin Equivalent Biasing Circuit

Figure 4 - 5: Common Emitter Amplifier

Figure 4 - 6: Typical Amplifier Frequency Bode Diagram

Design:

Design a common emitter amplifier with R E [R E1 + R E2] completely bypassed with the following specifications:

1. use a 2N2222 BJT and a 12 volt DC supply

2. midband gain V O/V S≥ 50

3. low cutoff frequency F L between 100 Hz and 200 Hz

4. input impedance as seen by the source ≥ 1 kΩ

5. V O symmetric swing ≥ 2.0 volts peak (4 V p-p)

6. load resistor R L = 1.5 kΩ

7. source resistance R S = 50 Ω (this is in addition to the function generator's

internal resistance)

Lab Procedure: (steps 1 and 2 may be omitted if done prior to this lab period and the same BJT is used)

1. From the digital curve tracer, find the value of βDC and βAC at the designed Q-point of the CE amplifier. Remember βDC= I C/I B and βAC= ?I C/?I B. How do the two β values compare?

2. Determine the values of h oe and h ie from the digital curve tracer. The slope of the transistor I C-V CE curves in the active region is h oe. Find h ie by looking at the base-emitter junction as a diode on the curve tracer. The tangent slope of the I B-V BE curve at the I BQ point is 1/h ie.

3. Construct the CE amplifier of Figure 9-5. Remember R S is installed in addition to the internal 50 Ωresistance of the function generator. Note that (R E1+ R E2) should equal the designed value for R E and R E1≈R E2. Verify that the specifications have been met by measuring the Q-point, midband voltage gain, and peak symmetric output voltage swing. Note any distortion in the output signal.

4. Observe the loading affect by replacing R L first by 150 Ω and then by 15 kΩ. Note any changes in the output signal and comment on the loading affect.

5. Use computer control to record and plot the frequency response. Find the corner frequencies and bandwidth to verify that the specifications have been met.

6. Measure the input impedance seen by the source [look at the current through R S and the node voltage on the transistor side of R S] and the output impedance seen by the load resistor [look at the open circuit voltage and the current through and voltage

across R L = 1.5 kΩ]. Verify that the input impedance specification has been met.

7. Now adjust the bypass capacitor C E so that R E1 is not bypassed (which is a series-series feedback configuration). Measure the Q-point and midband voltage gain. Note any distortion in the output signal.

8. Repeat steps 4 - 6.

9. Remove the bypass capacitor C E completely. Measure the Q-point and midband voltage gain. Note any distortion in the output signal.

10. Repeat steps 4 - 6.

Questions:

1. Compare the measurements in Lab Procedures 3-10 to the theoretical predictions such as those obtained using PSPICE?. Note how increasing the feedback affects the gain, bandwidth, and input and output impedances.

2. Can you think of a way to vary the amount of feedback (gain) using a potentiometer of a value equal to R E without affecting the Q point?

3. How can F H be reduced using external components?

4. Why is the value of F H measured in the lab generally different from (lower than) the value of F H determined using PSPICE? or manual calculations?

Project 5

Common Collector Amplifier

Objective:This project will show the biasing, gain, frequency response, and impedance properties of a common collector amplifier.

Components: 2N2222 BJT

Introduction:

The common collector amplifier as shown in Figure 10-1 is one of the most useful small-signal amplifier configurations. The same biasing scheme and frequency response approximation technique as used for the common emitter amplifier can also be used for the common collector amplifier. The only change that needs to be made in biasing is that the voltage across the emitter resistor R E is usually larger for the common collector to allow a greater output voltage swing. The collector resistor is also usually omitted in the common collector configuration. The main characteristics of the common collector amplifier are high input impedance, low output impedance, less than unity voltage gain, and high current gain. This amplifier is most often used as a buffer or isolation amplifier to connect a high impedance source to a low impedance load without loss of signal. The load seen by the amplifier's signal source is the input impedance of the amplifier. With a high input impedance, the CC amplifier loads the source very lightly. Therefore the signal source is largely isolated or buffered from the rest of the circuit. The maximum current gain for the CC amplifier is β+ 1. This high current gain allows the CC amplifier to increase the power of the signal. These power and current gains make the CC amplifier a practical choice as an output stage amplifier driving several devices and/or low impedance loads.

Design:

Design a common collector amplifier with the following specifications:

1. use a 2N2222 BJT and a 12 volt DC supply

2. midband gain V O/V S≥ 0.5

3. low cutoff frequency F L between 100 Hz and 200 Hz

4. input impedance seen by the source ≥ 10 kΩ

5. V O symmetric swing ≥ 3.0 volts peak (6 V p - p)

6. load resistor R L = 200 Ω

7. source resistance R S = 50 Ω (this is in addition to the function generator's internal resistance)

Figure 5- 1: Common Collector Amplifier

Lab Procedure:

1. Construct the CC amplifier of Figure 10-1. Remember R S is installed in addition to the internal 50 Ω resistance of the function generator. Verify the amplifier operation by measuring the Q-point and midband voltage gain. Monitor the output on the oscilloscope to make sure the waveform is not clipped. Note any distortion in the output signal.

2. Adjust the input signal level to get a

3.0 volt peak symmetric output voltage swing.

3. Determine the midband current gain I L/I S[measure I S by looking at the current through R S] What is the overall power gain?

4. Observe the loading affect by replacing R L first by ≈ 50 Ω and then by ≈750 Ω. Note any changes in the output signal and comment on the loading affect.

5. Use computer control to record and plot the frequency response. Find the corner frequencies and bandwidth to verify that the specifications have been met.

6. Measure the input impedance seen by the source [look at the current through R S and the node voltage on the transistor side of R S] and the output impedance seen by the load resistor [look at the open circuit voltage and the current through and voltage

across R L]. Verify that the input impedance specification has been met.

Questions:

1. How can you achieve maximum power transfer from the input signal source to the amplifier circuit? Is the load resistance a factor in the answer?

2. What value of load resistance results in maximum voltage gain? What load resistance results in maximum power transfer to the load?

3. Compare the results of the current gain found in Lab Procedure 3 with the maximum possible gain of β +1. Comment on any differences.

4. Compare the measurements in Lab Procedures 1-6 to the theoretical predictions such as those obtained using PSPICE?. Note that you must adjust the circuit file to determine the output impedance.

5. What other method could be used to measure R O?

Project 6

Cascade Amplifier

Objective: This project will show the overall gain, frequency response, and coupling of a common emitter - common collector cascade amplifier.

Components: 2N2222 BJT

Introduction:

Multistage amplifiers are made up of single transistor amplifiers connected in cascade. The first stage usually provides a high input impedance to minimize loading the source (transducer). The middle stages

usually account for most of the desired voltage gain. The final stage provides a low output impedance to prevent loss of signal (gain) and to be able to handle the amount of current required by the load. In analyzing multistage amplifiers, the loading effect of the next stage must be considered since the input impedance of the next stage acts as the load for the current stage. Therefore, the AC analysis of a multistage amplifier is usually done starting with the final stage. The individual stages are usually coupled by either capacitor or direct coupling. Capacitor coupling is most often used when the signals being amplified are AC signals. In capacitor coupling the stages are separated by a capacitor which blocks the DC voltages between each stage. This DC blocking prevents the bias point of each stage from being upset.

The CE-CC cascade two stage amplifier is a good multistage configuration because the CE and CC amplifiers together provide some very desirable characteristics. The CE amplifier makes up the first stage and is capable of providing high voltage gain. The input impedance of the CE is a function of h ie(r ) and can be moderately low for high bias currents, but several kilohms for low current operating points. The output impedance of the CE is approximately equal to R C, which is usually in the kilohm range. The CC amplifier makes up the second stage and has the haracteristic of high input impedance, low output impedance, high current gain, and a less than unity voltage gain.

In a cascade configuration, the overall voltage and current gains are given by:

A V overall = A V first stage * A V second stage

A I overall = A I first stage * A I second stage

Design:

1. Find the overall voltage gain for the CE-CC cascade amplifier using the circuits from either labs 9 and 10, or from lab 11. Remember to take into account that the load resistances and input impedances are now different for the multistage amplifier.

2. Find a suitable value for C12to capacitively couple the first and second stages. Think of C12 as an output coupling capacitor for the first stage and make sure that C12 does not cause a dominant pole by making: