DSP56857BU120中文资料

The 56857 offers a rich feature set and on-chip memory in a 100-pin LQFP . It includes 80 KB of on-chip program SRAM and 48 KB of on-chip data SRAM. With two enhanced serial synchronous serial interfaces (ESSIs), this device can provide outputs for 5.1-channel surround sound. The 56857can be designed into multi-processor systems to provide internet audio and speech processing

functionalities.

BENEFITS

?Easy to program with flexible application development tools ?Supports multiple processor connections

?16-bit quad timer module (with four external pins) that allows

capture/compare functionality, and can be cascaded ?Quad timer module can also be used for simple digital-to-analog conversion functionality ?Enhanced synchronous serial interface with enhanced network and audio modes ?Time of Day for applications requiring clock display

?Flexible 6-Channel Direct Memory Access (DMA) allows both internal and external memory transfers with almost no CPU interruption ?Serial peripheral interface with master and slave mode supporting connection to other processors or serial memory devices ?Two enhanced synchronous serial interfaces with three transmitters per module provide support for

5.1 channel surround sound for audio applications

56857 16-BIT DIGITAL SIGNAL PROCESSORS

?120 MIPS at 120MHz

?80 KB Program SRAM ?48 KB Data SRAM ?2 KB Boot ROM

?Six independent channels of DMA ?Two Enhanced Synchronous Serial Interfaces (ESSI)?Two Serial Communication Interfaces (SCI)?Serial Peripheral Interface (SPI)

?Four dedicated GPIO

?8-bit parallel Host Interface

?General purpose 16-bit Quad Timer ?JTAG/Enhanced On-Chip Emulation (OnCE?) for unobtrusive, real-time debugging ?Computer Operating Properly (COP)/Watchdog Timer ?Time of Day (TOD)?100-pin LQFP package ?Up to 47 GPIO

ENERGY INFORMATION

?Fabricated in high-density CMOS with 3.3V, TTL-compatible digital inputs

?Wait and Stop modes available

F r e e s c a l e S e m i c o n d u c t o r , I

For More Information On This Product,

Go to: https://www.wendangku.net/doc/2813813955.html,

n c .

Motorola and the stylized M Logo are registered in the U.S. Patent and Trademark Office. This product incorporates SuperFlash ?technology licensed from SST . All other product or service names are the property of their respective owners. ? Motorola, Inc. 2003

DSP56857PB/D REV 3

HYBRID MCU/DSP

56857

56800E CORE FEATURES

The 56800E core is based on a Harvard-style architecture consisting of three execution units operating in parallel, allowing as many as six operations per instruction cycle. The microprocessor-style programming model and optimized instruction set allow

F r e e s c a l e S e m i c o n d u c t o r , I

For More Information On This Product,

Go to: https://www.wendangku.net/doc/2813813955.html,

n c .