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APL5320

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?Wide Operating Voltage: 2.5~6V

?Low Dropout Voltage: 290mV@3V/300mA ?Fixed Output Voltages: 1.2~3.6V with Step 100mV,and 2.85V

?Guaranteed 300mA Output Current ?High PSRR: 70dB ?Current-Limit Protection

?Controlled Short Circuit Current: 50mA ?Over-Temperature Protection

?Stable with 1μF Capacitor for Any Load ?Excellent Load/Line Transient

?SOT-23-5, SC-70-5, VTDFN1.2x1.6-4, and TDFN1.6x1.6-6 Packages

Lead Free and Green Devices Available (RoHS Compliant)

The APL5320 is a P-channel low dropout linear regulator which needs only one input voltage from 2.5 to 6V, and delivers current up to 300mA to set output voltage. It also can work with low ESR ceramic capacitors and is ideal for using in the battery-powered applications such as note-book computers and cellular phones. Typical dropout volt-age is only 290mV at 300mA loading.

The APL5320 provides several versions of fixed output voltages ranging from 1.2 to 3.6V with step 100mV and 2.85V. Current limit with current foldback and thermal shut-down functions protects the device against current over-loads and over temperature. The APL5320 is available in SOT-23-5, SC-70-5, VTDFN1.2x1.6-4, and TDFN 1.6x1.6-6 packages.

Features

General Description

Applications

?Cellular Phones

?Portable and Battery-Powered Equipments ?Laptops, Palmtops, Notebook Computers ?Wireless LANs

?Portable Information Appliances ?

GPSes

Pin Configuration

Simplified Application Circuit

GND 2 5 VOUT SHDN 3

4 NC

VIN 1SOT23-5/SC-70-5

(Top View)

V OUT

TDFN1.6x1.6-6(Top View)

VTDFN1.2x1.6-4

(Top View)

VOUT = Exposed Pad

(connected to ground plane for better heat dissipation)

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Ordering and Marking Information

Note : ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish; which are fully compliant with RoHS. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J-STD-020D for MSL classification at lead-free peak reflow temperature. ANPEC defines “Green” to mean lead-free (RoHS compliant)and halogen free (Br or Cl does not exceed 900ppm by weight in homogeneous material and total of Br and Cl does not exceed 1500ppm by weight).

SOT-23-5

Note: X - Code.

SC-70-5

TDFN1.6x1.6-6

APL5320

Package Code

B : SOT-23-5 S5 : SC-70-5 QB : TDFN1.6x1.6-6 QF: VTDFN1.2x1.6-4

Operating Ambient Temperature Range I : -40 to 85 o C Handling Code

TR : Tape & Reel Voltage Code

12 : 1.2V 3.6 : 3.6V Assembly Material

G : Halogen and Lead Free Device

Handling Code Temperature Range Package Code

Assembly Material Voltage Code

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Ordering and Marking Information (Cont.)

TDFN1.6x1.6-6 (Cont.)

Note: X - Code.

VTDFN1.2x1.6-4

Note : X - Code.

Absolute Maximum Ratings (Note 1)

N ote 1 : Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

Thermal Characteristics

Note 2 : θJA is measured with the component mounted on a high effective thermal conductivity test board in free air.

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Recommended Operating Conditions (Note 3)

Note 3 : Refer to the typical application circuit Electrical Characteristics

Unless otherwise specified, these specifications apply over V IN =V OUT +1V, C IN =C OUT =1μF and T A =-40~85 o C. Typical values are at T A =25o C.

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5Electrical Characteristics (Cont.)

Unless otherwise specified, these specifications apply over V IN =V OUT +1V, C IN =C OUT =1μF and T A =-40~85 o C. Typical values are at T A =25o C.

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6Typical Operating Characteristics

Quiescent Current vs. Temperature

Q u i e s c e n t C u r r e n t (μA )

363738

39404142Temperature (o

PSRR vs. Frequency

Dropout Voltage vs. Output Current

P S R R (d B )

Frequency (Hz)

-80-60-40

-200

D r o p o u t V o l t a g e (m V )

Output Current (mA)

100150200250300350400Output Noise

Current Limit Threshold vs. Input Voltage

-200

-100

100

200

Time (ms)

O u t p u t N o i s e (μV )

Quiescent Current vs. Supply Voltage

Supply Voltage (V)

2345

050100150200250300350Q u i e s c e n t C u r r e n t (μA )

2.5

3.54

4.55

5.5400450

500550600650700C u r r e n t L i m i t (m A )

Input Voltage (V)

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7Typical Operating Characteristics (Cont.)

Current Limit Threshold vs. Temperature

Quiescent Current vs. Output Current

Output Current (mA)

Q u i e s c e n t C u r r e n t (μA

)

42.54343.54444.545C u r r e n t L i m i t (m A )

Temperature (o C)

300

350400450500550600650700-40-25

255075100

125

SHDN Pin Threshold Voltage vs.

Supply Voltage

E N P i n T h r e s h o l d (V )

Supply Voltage (V)

0.40.50.60.70.80.91.01.11.21.31.41.5

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8Operating Waveforms

The test condition is V IN =4.2V, T A = 25o C unless otherwise specified.

Load Transient Response CH1: V OUT , 50mV/Div, DC, Offset=1.2V TIME: 20μs/Div

V IN =4.2V, V OUT =1.2V, C IN =C OUT =1μF,

I OUT =10mA to 300mA to 10mA (Rise/Fall time=1μσ)CH2: I OUT , 200mA/Div, DC Load Transient Response

V OUT

CH1: V OUT , 50mV/Div, DC, Offset=1.2V TIME: 20μs/Div

V IN =4.2V, V OUT =1.2V, C IN =C OUT =1μF,

I OUT =10mA to 150mA to 10mA (Rise/Fall time=1μσ)CH2: I OUT , 100mA/Div, DC

Load Transient Response I OUT

V OUT

I OUT

CH1: V OUT , 20mV/Div, DC, Offset=1.2V TIME: 20μs/Div

V IN =4.2V, V OUT =1.2V, C IN =C OUT =1μF,

I OUT =10mA to 50mA to 10mA (Rise/Fall time=1μσ)CH2: I OUT , 50mA/Div, DC

Line Transient Response

V IN

V OUT

CH1: V IN , 500mV/Div, DC, Offset=3.8V TIME: 20μs/Div

V IN =3.8V to 4.8V to 3.8V (Rise/Fall time=4μσ),V OUT =1.2V, C IN =C OUT =1μF, I OUT =100mA CH2: V OUT , 20mV/Div, DC, Offset=1.2V

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9Operating Waveforms (Cont.)

The test condition is V IN =4.2V, T A = 25o C unless otherwise specified.

Line Transient Response Line Transient Response

V IN

V OUT

V IN

V OUT

Exiting Shutdown Entering Shutdown

V SHDN

V OUT

V SHDN

V OUT

CH1: V IN , 500mV/Div, DC, Offset=3.8V TIME: 20μs/Div

V IN =3.8V to 4.8V to 3.8V (Rise/Fall time=4μσ),V OUT =1.2V, C IN =C OUT =1μF, I OUT =50mA CH2: V OUT , 20mV/Div, DC, Offset=1.2V CH1: V IN , 500mV/Div, DC, Offset=3.8V TIME: 20μs/Div

V IN =3.8V to 4.8V to 3.8V (Rise/Fall time=4μσ),V OUT =1.2V, C IN =C OUT =1μF, I OUT =10mA CH2: V OUT , 20mV/Div, DC, Offset=1.2V CH1: V SHDN , 2V/Div, DC TIME: 20μs/Div

V IN =4.2V, V OUT =1.2V, C IN =C OUT =1μF,I OUT =10mA

CH2: V OUT , 500mV/Div, DC TIME: 10μs/Div

CH2: V OUT , 500mV/Div, DC CH1: V SHDN , 2V/Div, DC V IN =4.2V, V OUT =1.2V, C IN =C OUT =1μF,I OUT =10mA

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10Pin Description

Block Diagram

Typical Application Circuit

Shutdown

APL5320

GND

SHDN VOUT

VIN

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11Function Description

Internal Soft-Start

An internal soft-start function controls rising rate of the output voltage to limit the surge current at start-up. The typical soft-start interval is about 60μs.Thermal Shutdown

A thermal shutdown circuit limits the junction tempera-ture of APL5320. When the junction temperature exceeds +160o C, a thermal sensor turns off the output PMOS, al-lowing the device to cool down. The regulator regulates the output again through initiation of a new soft-start cycle after the junction temperature cools by 40o C.The thermal shutdown is designed with a 40o C hysteresis to lower the average junction temperature during continuous ther-mal overload conditions, extending lifetime of the device.For normal operation, device power dissipation should be externally limited so that junction temperature will not exceed 125o C.

Current-Limit with Current Foldback

The APL5320 monitors the current via the output PMOS and limits the maximum current. When the output current reaches the current limit threshold, current limit with cur-rent foldback circuit starts to work to prevent load and APL5320 from damages during overload or short-circuit conditions. Typical foldback current is about 50mA.Shutdown Control

The APL5320 has an active-low shutdown function. Forc-ing SHDN high (>1.5V) enables the V OUT low (<0.4V) disables the V OUT . The SHDN can not be left floating. If it is not used, connect it to VIN for normal operation.

Under-Voltage Lock Out (UVLO)

The APL5320 monitors the input voltage to prevent wrong logic control. The UVLO function initiates a soft-start pro-cess after input voltage exceeds its rising UVLO thresh-old during power on. The UVLO function also shuts off the output when the input voltage falls below it’s falling threshold.

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12Application Information

The APL5320 requires proper input capacitors to supply surge current during stepping load transients to prevent the input rail from dropping. Because the parasitic induc-tor from the voltage sources or other bulk capacitors to the VIN limit the slew rate of the surge current, place the Input capacitors near VIN as close as possible. Input capacitors should be larger than 1μF and a minimum ceramic capacitor of 1μF is necessary.Output Capacitor

The APL5320 needs a proper output capacitor to main-tain circuit stability and improve transient response over temperature and current. In order to insure the circuit stability, the proper output capacitor value should be larger than 1μF. With X5R and X7R dielectrics, 1μF is sufficient at all operating temperatures. Large output capacitor value can reduce noise and improve load-transient re-sponse and PSRR, Figure 1 shows the curves of allow-able ESR range as the function of load current for various output capacitor values.

Output Current (mA)

R e g i o n o f S t a b l e C O U T E S R (?)

Region of Stable C OUT ESR vs. Output Current

050100150200250300

0.001

0.01

0.1

10Figure1. Stable C OUT ESR Range

Operation Region and Power Dissipation

The APL5320 maximum power dissipation depends on the thermal resistance and temperature difference be-tween the die junction and ambient air. The TDFN1.6x1.6-6package power dissipation P D across the device is:P D = (T J - T A ) / θJA

where (T J - T A ) is the temperature difference between the junction and ambient air. θJA is the thermal resistance between Junction and ambient air. Assuming the T A =25o C and maximum T J =160o C (typical thermal limit threshold),the maximum power dissipation is calculated as:P D (max)=(160-25)/165=0.81(W)

For normal operation, do not exceed the maximum junc-tion temperature rating of T J =125o C. The calculated power dissipation should be less than:

P D =(125-25)/165=0.6(W)

The GND provides an electrical connection to the ground and channels heat away. Connect the GND to the ground by using a large pad or a ground https://www.wendangku.net/doc/2b17176295.html,yout Consideration

Figure 2 illustrates the layout. Below is a checklist for your layout:

1. Please place the input capacitors close to the VIN.

2. Ceramic capacitors for load must be placed near the load as close as possible.

3. To place APL5320 and output capacitors near the load is good for performance.

4. Large current paths, the bold lines in figure 2, must have wide tracks.

Figure2. Large Current Paths Shown as Bold Lines

V OUT

Input capacitor

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Package Information

SOT-23-5

MAX.0.0570.0510.0240.0060.0090.0200.012L 0.300

e e1E1E D c b 0.080.300.600.0120.95 BSC 1.90 BSC 0.220.500.037 BSC 0.075 BSC

0.003MIN.

MILLIMETERS S Y M B O L A1A2A 0.000.90SOT-23-5

MAX.1.450.151.30MIN.0.0000.035INCHES

8°

0°8°

VIEW A

GAUGE PLANE SEATING PLANE

SEE VIEW A

1.40

2.60 1.80

3.002.70 3.100.1220.071

0.1180.1020.055

0.106Note : 1. Follow JEDEC TO-178 AA.

2. Dimension D and E1 do not include mold flash, protrusions or gate burrs. Mold flash, protrusion or gate burrs shall not exceed 10 mil per side.

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14Package Information

SC-70-5

S Y M B O L MIN.MAX.1.100.000.080.250.10A A1c D E E1e e1L MILLIMETERS

b 0.150.300.65 BSC SC-70-5

0.150.45

0.026 BSC MIN.MAX.INCHES

0.0430.0000.0310.0400.0030.0100.0060.0180

0o 8o

0.004A20.80 1.00

0.0060.0121.30 BSC

0.051 BSC

1.90

2.200.0750.0872.00 2.401.15

1.35

0.0790.0950.045

0.053

0.800.031Note : 1. Followed from JEDEC MO-223 AB.

2. Dimension D and E1 do not include mold flash, protrusions or gate burrs.

Mold flash, protrusion or gate burrs shall not exceed 6 mil per side.

VIEW A

GAUGE PLANE

SEATING PLANE

SEE VIEW A

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Package Information

TDFN1.6x1.6-6

MIN.MAX.0.800.00

0.200.300.95 1.050.05

0.55

A A1b D D2E E2e K MILLIMETERS A30.20 REF

TDFN1.6x1.6-6

0.20-0.65

0.008 REF

MIN.MAX.INCHES

0.0310.000

0.0080.0120.0370.0410.022

0.008-0.700.026

0.0280.002

0.50 BSC

0.020 BSC

S Y M B O L 1.55 1.650.0610.0651.55 1.650.0610.065L

0.190.29

0.007

0.011

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Package Information

VTDFN1.2x1.6-4

0.500.041

0.0200.60 BSC 0.024 BSC

1.55 1.650.0610.0651.15 1.250.0450.049L

0.10

0.30

0.004

0.012

S Y M B O L MIN.MAX.0.600.250.350.650.750.95

A b D D2E E2e MILLIMETERS VTDFN1.2x1.6-4

1.05

MIN.MAX.INCHES

0.0240.0100.0140.0260.0300.037

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17Carrier Tape & Reel Dimensions

SECTION B-B

SECTION A-A

(mm)

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(mm)

Carrier Tape & Reel Dimensions (Cont.)

Devices Per Unit

Taping Direction Information

SOT-23-5

SC-70-5

USER DIRECTION OF FEED

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19Taping Direction Information (Cont.)

TDFN1.6x1.6-6

VTDFN1.2x1.6-4

USER DIRECTION OF FEED

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Classification Profile

Classification Reflow Profiles