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MAX5520ETC-T中文资料

General Description

The MAX5520/MAX5521 are single, 10-bit, ultra-low-power, voltage-output, digital-to-analog converters (DACs) offering Rail-to-Rail ?buffered voltage outputs.The DACs operate from a 1.8V to 5.5V supply and con-sume less than 6μA, making them desirable for low-power and low-voltage applications. A shutdown mode reduces overall current, including the reference input current, to just 0.18μA. The MAX5520/MAX5521 use a 3-wire serial interface that is compatible with SPI?,QSPI?, and MICROWIRE?.

At power-up, the MAX5520/MAX5521 outputs are dri-ven to zero scale, providing additional safety for appli-cations that drive valves or for other transducers that must be off during power-up. The zero-scale outputs enable glitch-free power-up.

The MAX5520 accepts an external reference input. The MAX5521 contains an internal reference and provides an external reference output. Both devices have force-sense-configured output buffers.

The MAX5520/MAX5521 are available in a 4mm x 4mm x 0.8mm, 12-pin, thin QFN package and are guaranteed over the extended -40°C to +85°C temperature range.For 12-bit compatible devices, refer to the MAX5530/MAX5531 data sheet. For 8-bit compatible devices,refer to the MAX5510/MAX5511 data sheet.

Applications

Portable Battery-Powered Devices Instrumentation

Automatic Trimming and Calibration in Factory or Field

Programmable Voltage and Current Sources Industrial Process Control and Remote Industrial Devices

Remote Data Conversion and Monitoring Chemical Sensor Cell Bias for Gas Monitors Programmable Liquid Crystal Display (LCD) Bias

Features

?Single +1.8V to +5.5V Supply ?Ultra-Low 6μA Supply Current

?Shutdown Mode Reduces Supply Current to 0.18μA (max)?Small 4mm x 4mm x 0.8mm Thin QFN Package ?Flexible Force-Sense-Configured Rail-to-Rail Output Buffers ?Internal Reference Sources 8mA of Current (MAX5521)?Fast 16MHz 3-Wire SPI-/QSPI-/MICROWIRE-Compatible Serial Interface ?TTL- and CMOS-Compatible Digital Inputs with Hysteresis ?Glitch-Free Outputs During Power-Up

MAX5520/MAX5521

+1.8V to +5.5V , Ultra-Low-Power, 10-Bit,

Voltage-Output DACs

________________________________________________________________Maxim Integrated Products

Pin Configuration

Ordering Information

Selector Guide

19-3065; Rev 0; 1/04

For pricing, delivery, and ordering information,please contact Maxim/Dallas Direct!at 1-888-629-4642, or visit Maxim’s website at https://www.wendangku.net/doc/2318264956.html,.

Rail-to-Rail is a registered trademark of Nippon Motorola, Inc.SPI and QSPI are trademarks of Motorola, Inc.

MICROWIRE is a trademark of National Semiconductor Corp

*EP = Exposed paddle (internally connected to GND).

M A X 5520/M A X 5521

+1.8V to +5.5V , Ultra-Low-Power, 10-Bit, Voltage-Output DACs

ABSOLUTE MAXIMUM RATINGS

ELECTRICAL CHARACTERISTICS

(V DD = +1.8V to +5.5V, OUT unloaded, T A = T MIN to T MAX , unless otherwise noted. Typical values are at T A = +25°C.)

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

V DD to GND..............................................................-0.3V to +6V OUT to GND...............................................-0.3V to (V DD + 0.3V)FB to GND..................................................-0.3V to (V DD + 0.3V)SCLK, DIN, CS to GND ..............................-0.3V to (V DD + 0.3V)REFIN, REFOUT to GND ............................-0.3V to (V DD + 0.3V)Continuous Power Dissipation (T A = +70°C)

Thin QFN (derate 16.9mW/°C above +70°C).............1349mW

Operating Temperature Range ...........................-40°C to +85°C Storage Temperature Range.............................-65°C to +150°C Junction Temperature.....................................................+150°C Lead Temperature (soldering, 10s).................................+300°C

MAX5520/MAX5521

+1.8V to +5.5V , Ultra-Low-Power, 10-Bit,

Voltage-Output DACs

ELECTRICAL CHARACTERISTICS (continued)

M A X 5520/M A X 5521

+1.8V to +5.5V , Ultra-Low-Power, 10-Bit, Voltage-Output DACs 4_______________________________________________________________________________________

ELECTRICAL CHARACTERISTICS (continued)

MAX5520/MAX5521

+1.8V to +5.5V , Ultra-Low-Power, 10-Bit,

Voltage-Output DACs

_______________________________________________________________________________________5

TIMING CHARACTERISTICS

(V DD = +1.8V to +5.5V, T A = T MIN to T MAX , unless otherwise noted. Typical values are at T A = +25°C.)

Note 2:Offset is tested at code 24.

Note 3:Gain is tested at code 1000. FB is connected to OUT.Note 4:Guaranteed by design. Not production tested.Note 5:V DD must be a minimum of 1.8V.

Note 6:Outputs can be shorted to V DD or GND indefinitely, provided that the package power dissipation is not exceeded.Note 7:Optimal noise performance is at 2nF load capacitance.

Note 8:Thermal hysteresis is defined as the change in the initial +25°C output voltage after cycling the device from T MAX to T MIN .Note 9:All digital inputs at V DD or GND.

Note 10:Load = 10k ?in parallel with 100pF, V DD = 5V, V REF = 4.096V (MAX5520) or V REF = 3.9V (MAX5521).

M A X 5520/M A X 5521

+1.8V to +5.5V , Ultra-Low-Power, 10-Bit, Voltage-Output DACs 6_______________________________________________________________________________________

Typical Operating Characteristics

(V DD = 5.0V, V REF = 4.096V (MAX5520) or V REF = 3.9V (MAX5521), T A = +25°C, unless otherwise noted.)

SUPPLY CURRENT vs. SUPPLY VOLTAGE

(MAX5521)

M A X 5520 t o c 01

SUPPLY VOLTAGE (V)

S U P P L Y C U R R E N T (μA )

5.55.04.0 4.52.5 3.0 3.52.0123456789100

1.5 6.0

SUPPLY CURRENT vs. TEMPERATURE

(MAX5521)

M A X 5520 t o c 02

TEMPERATURE (°C)

S U P P L Y C U R R E N T (μA )

-15

123456789100

-40

SHUTDOWN SUPPLY CURRENT vs. TEMPERATURE (MAX5521)

M A X 5520 t o c 03

TEMPERATURE (°C)

S H U T D O W N S U P P L Y C U R R E N T (n A )

-15

100

10000.1

-40

STANDBY SUPPLY CURRENT vs. TEMPERATURE (MAX5521)

TEMPERATURE (°C)

S T A N D B Y S U P P L Y C U R R E N T (μA )

-15

0.51.01.52.02.53.03.5

4.04.5

5.00-40

SUPPLY CURRENT vs. CLOCK FREQUENCY

FREQUENCY (kHz)

S U P P L Y C U R R E N T (μA )

100001000100

0.1

100

1000

0.01

100000

SUPPLY CURRENT vs. LOGIC INPUT VOLTAGE

LOGIC INPUT VOLTAGE (V)

S U P P L Y C U R R E N T (m A )

4.54.03.0 3.51.0 1.5 2.0 2.50.50.5

1.01.5

2.02.5

3.03.5

4.04.5

5.0

INL vs. INPUT CODE (V DD = V REF = 1.8V)

DIGITAL INPUT CODE

I N L (L S B )

1000

800

200

400

600

-1.0-0.8-0.6-0.4-0.200.20.4-1.2

1200

INL vs. INPUT CODE (V DD = V REF = 5V)

DIGITAL INPUT CODE

I N L (L S B )

1000800200400600-1.0-0.8-0.6-0.4-0.200.20.4-1.2

01200

DNL vs. INPUT CODE (V DD = V REF = 1.8V)

M A X 5520 t o c 09

DIGITAL INPUT CODE

D N L (L S B )

1000800600400200-0.02-0.0100.010.020.030.040.050.06

-0.03

01200

MAX5520/MAX5521

+1.8V to +5.5V , Ultra-Low-Power, 10-Bit,

Voltage-Output DACs

_______________________________________________________________________________________7

DNL vs. INPUT CODE (V DD = V REF = 5V)

M A X 5520 t o c 10

DIGITAL INPUT CODE

D N L (L S B )

1000

800

600

400

200

-0.02-0.0100.010.020.030.04-0.03

1200

-1.0

-0.4-0.6

-0.8-0.200.20.40.60.81.0-40

-15

OFFSET VOLTAGE vs. TEMPERATURE

TEMPERATURE (°C)

O F F S E T V O L T A G E (m V )

-0.10

-0.04-0.06-0.08-0.0200.020.040.060.080.10

-4010-15356085

GAIN-ERROR CHANGE

vs. TEMPERATURE

TEMPERATURE (°C)

G A I N -E R R O R C H A N G E (L S B )DIGITAL FEEDTHROUGH RESPONSE

MAX5520 toc13

20μs/div

CS 5V/div SCLK 5V/div DIN 5V/div OUT 50mV/div

ZERO SCALE

DAC OUTPUT LOAD REGULATION

vs. OUTPUT CURRENT

DAC OUTPUT CURRENT (μA)

D A C O U T P U T V O L T A G

E (V )8006004002000-200-400-600-8000.6042

0.6044

0.6046

0.6048

0.6050

0.6040

-10001000

DAC OUTPUT LOAD REGULATION

vs. OUTPUT CURRENT

DAC OUTPUT CURRENT (mA)

D A C O U T P U T V O L T A G

E (V )8

-8

-6

-4

-2

1.9405

1.94101.94151.94201.94251.94301.94351.9440

1.9400

-1010

DAC OUTPUT VOLTAGE vs. OUTPUT SOURCE CURRENT

OUTPUT SOURCE CURRENT (mA)O U T P U T V O L T A G E (V )

1010.100.011

00.001

100

DAC OUTPUT VOLTAGE vs. OUTPUT SINK CURRENT

OUTPUT SINK CURRENT (mA)

D A C O U T P U T V O L T A G

E (V )

0.1

0.01

0.5

1.01.5

2.02.5

3.03.5

4.04.5

5.0

00.001

100

OUTPUT LARGE-SIGNAL STEP RESPONSE

(V DD = 1.8V, V REF = 1.2V)

MAX5520 toc18

100μs/div

V OUT

200mV/div

Typical Operating Characteristics (continued)

(V DD = 5.0V, V REF = 4.096V (MAX5520) or V REF = 3.9V (MAX5521), T A = +25°C, unless otherwise noted.)

M A X 5520/M A X 5521

+1.8V to +5.5V , Ultra-Low-Power, 10-Bit, Voltage-Output DACs 8_______________________________________________________________________________________

OUTPUT LARGE-SIGNAL STEP RESPONSE

(V DD = 5V, V REF = 3.9V)

MAX5520 toc19

200μs/div

V OUT

500mV/div

OUTPUT MINIMUM SERIES RESISTANCE

vs. LOAD CAPACITANCE

CAPACITANCE (μF)

M I N I M U M S E R I E S R E S I S T A N C E (?)

1010.10.010.001

100

200300400500600

0.0001100

POWER-UP OUTPUT VOLTAGE GLITCH

MAX5520 toc21

20ms/div

V OUT 10mV/div

V DD 2V/div

MAJOR CARRY OUTPUT VOLTAGE GLITCH

(CODE 7FFh TO 800h)(V DD = 5V, V REF = 3.9V)

MAX5520 toc22

100μ

s/div

V OUT

AC-COUPLED 5mV/div

3.900

3.9053.9103.9153.9203.9253.9303.9353.940-40

-15

REFERENCE OUTPUT VOLTAGE

vs. TEMPERATURE

TEMPERATURE (°C)

R E F E R E N C E O U T P U T V O L T A G E (V

)

REFERENCE OUTPUT VOLTAGE vs. REFERENCE OUTPUT CURRENT

REFERENCE OUTPUT CURRENT (μA)

R E F E R E N C E O U T P U T V O L T A G E (V )

7500

5500

3500

1500

1.2151.2161.2171.2181.2191.220

1.214

-500

REFERENCE OUTPUT VOLTAGE vs. REFERENCE OUTPUT CURRENT

REFERENCE OUTPUT CURRENT (μA)

R E F E R E N C E O U T P U T V O L T A G E (V )

14,500

12,00095007000

4500

2000

3.89

3.90

3.91

3.92

3.88

-500

REFERENCE OUTPUT VOLTAGE

vs. SUPPLY VOLTAGE

SUPPLY VOLTAGE (V)

R E F E R E N C E O U T P U T V O L T A G E (V ) 5.55.04.0 4.52.5 3.0 3.52.01.21732

1.217341.217361.217381.217401.217421.217441.217461.217481.21750

1.21730

1.5 6.0

Typical Operating Characteristics (continued)

(V DD = 5.0V, V REF = 4.096V (MAX5520) or V REF = 3.9V (MAX5521), T A = +25°C, unless otherwise noted.)

MAX5520/MAX5521

+1.8V to +5.5V , Ultra-Low-Power, 10-Bit,

Voltage-Output DACs

_______________________________________________________________________________________9

REFERENCE LINE-TRANSIENT RESPONSE

(V REF = 3.9V)

MAX5520 toc28

100μs/div

5.5V V DD 4.5V V REF

500mV/div 3.9V

REFERENCE LOAD TRANSIENT

(V DD = 1.8V)

MAX5520 toc29

200μs/div REFOUT SOURCE CURRENT 0.5mA/div V REFOUT 500mV/div

REFERENCE LOAD TRANSIENT

(V DD = 5V)

MAX5520 toc30

200μs/div

REFOUT SOURCE CURRENT 0.5mA/div

V REFOUT 500mV/div 3.9V

REFERENCE LOAD TRANSIENT

(V DD = 1.8V)

MAX5520 toc31

200μs/div REFOUT SINK CURRENT 50μA/div

V REFOUT 500mV/div

REFERENCE LOAD TRANSIENT

(V DD = 5V)

MAX5520 toc32

200μs/div

REFOUT SINK CURRENT 100μA/div

V REFOUT 500mV/div 3.9V

REFERENCE LINE-TRANSIENT RESPONSE

(V REF = 1.2V)

MAX5520 toc27

100μs/div 2.8V V DD 1.8V V REF

500mV/div

Typical Operating Characteristics (continued)

(V DD = 5.0V, V REF = 4.096V (MAX5520) or V REF = 3.9V (MAX5521), T A = +25°C, unless otherwise noted.)

M A X 5520/M A X 5521

+1.8V to +5.5V , Ultra-Low-Power, 10-Bit, Voltage-Output DACs 10______________________________________________________________________________________

Typical Operating Characteristics (continued)

(V DD = 5.0V, V REF = 4.096V (MAX5520) or V REF = 3.9V (MAX5521), T A = +25°C, unless otherwise noted.)

REFERENCE PSRR vs. FREQUENCY

FREQUENCY (kHz)P O W E R -S U P P L Y R E J E C T I O N R A T I O (d B )

100

0.1

102030405060708000.01

1000

REFERENCE PSRR

vs. FREQUENCY

FREQUENCY (kHz)

P O W E R -S U P P L Y R E J E C T I O N R A T I O (d B )

100

0.1

1020304050607080

00.01

1000

REFERENCE OUTPUT NOISE

(0.1Hz TO 10Hz) (V DD = 1.8V, V REF = 1.2V)

MAX5520 toc35

1s/div

100μV/div

REFERENCE OUTPUT NOISE

(0.1Hz TO 10Hz) (V DD = 5V, V REF = 3.9V)

MAX5520 toc36

1s/div

100μV/div

MAX5520/MAX5521

+1.8V to +5.5V , Ultra-Low-Power, 10-Bit,

Voltage-Output DACs

______________________________________________________________________________________11

MAX5520 Functional Diagram

M A X 5520/M A X 5521

+1.8V to +5.5V , Ultra-Low-Power, 10-Bit, Voltage-Output DACs 12______________________________________________________________________________________

Detailed Description

The MAX5520/MAX5521 single, 10-bit, ultra-low-power,voltage-output DACs offer Rail-to-Rail buffered voltage outputs. The DACs operate from a 1.8V to 5.5V supply and require only 6μA (max) supply current. These devices feature a shutdown mode that reduces overall current, including the reference input current, to just 0.18μA. The MAX5521 includes an internal reference that saves additional board space and can source up to 8mA, making it functional as a system reference. The 16MHz, 3-wire serial interface is compatible with SPI,QSPI, and MICROWIRE protocols. When V DD is applied, all DAC outputs are driven to zero scale with virtually no output glitch. The MAX5520/MAX5521 out-put buffers are configured in force sense allowing users to externally set voltage gains on the output (an output-amplifier inverting input is available). These devices come in a 4mm x 4mm thin QFN package.

Digital Interface

The MAX5520/MAX5521 use a 3-wire serial interface compatible with SPI, QSPI, and MICROWIRE protocols (Figures 1 and 2).

The MAX5520/MAX5521 include a single, 16-bit, input shift register. Data loads into the shift register through the serial interface. CS must remain low until all 16 bits are clocked in. Data loads MSB first, D9–D0. The 16bits consist of 4 control bits (C3–C0), 10 data bits (D9–D0), and 2 sub-bits (see Table 1). D9–D0 are the DAC data bits and S1 and S0 are the sub-bits. The sub-bits must be set to zero for proper operation. The control bits C3–C0 control the MAX5520/MAX5521, as outlined in Table 2.

Each DAC channel includes two registers: an input reg-ister and a DAC register. The input register holds input data. The DAC register contains the data updated to the DAC output.

The double-buffered register configuration allows any of the following:

?Loading the input registers without updating the DAC registers

?Updating the DAC registers from the input registers ?Updating all the input and DAC registers simultaneously

MAX5521 Functional Diagram

MAX5520/MAX5521

+1.8V to +5.5V , Ultra-Low-Power, 10-Bit,

Voltage-Output DACs

______________________________________________________________________________________13

Figure 1. Timing Diagram

Figure 2. Register Loading Diagram

Table 1. Serial Write Data Format

M A X 5520/M A X 5521

+1.8V to +5.5V , Ultra-Low-Power, 10-Bit, Voltage-Output DACs 14______________________________________________________________________________________

Table 2. Serial-Interface Programming Commands

*Standby mode can be entered from normal operation only. It is not possible to enter standby mode from shutdown.

MAX5520/MAX5521

+1.8V to +5.5V , Ultra-Low-Power, 10-Bit,

Voltage-Output DACs

______________________________________________________________________________________15

Power Modes

The MAX5520/MAX5521 feature two power modes to conserve power during idle periods. In normal opera-tion, the device is fully operational. In shutdown mode,the device is completely powered down, including the internal voltage reference in the MAX5521. The MAX5521 also offers a standby mode where all circuitry is powered down except the internal voltage reference.Standby mode keeps the reference powered up while the remaining circuitry is shut down, allowing it to be used as a system reference. Standby mode also helps reduce the wake-up delay by not requiring the refer-ence to power up when returning to normal operation.Shutdown Mode

The MAX5520/MAX5521 feature a software-program-mable shutdown mode that reduces the typical supply current and the reference input current to 0.18μA (max). Writing an input control word with control bits C[3:0] = 1110 places the device in shutdown mode (Table 2). In shutdown, the MAX5520 reference input and DAC output buffers go high impedance. Placing the MAX5521 into shutdown turns off the internal refer-ence, and the DAC output buffers go high impedance.The serial interface remains active for all devices.Table 2 shows several commands that bring the MAX5520/MAX5521 back to normal operation. The power-up time from shutdown is required before the DAC outputs are valid.

Note: For the MAX5521, standby mode cannot be entered directly from shutdown mode. The device must be brought into normal operation before entering stand-by mode.

Standby Mode (MAX5521 Only)

The MAX5521 features a software-programmable standby mode that reduces the typical supply current to 6μA. Standby mode powers down all circuitry except the internal voltage reference. Place the device in standby mode by writing an input control word with control bits C[3:0] = 1100 (Table 2). The internal refer-ence and serial interface remain active while the DAC output buffers go high impedance. If the MAX5521 is coming out of standby, the power-up time from standby is required before the DAC outputs are valid.

For the MAX5521, standby mode cannot be entered directly from shutdown mode. The device must be brought into normal operation before entering standby mode. To enter standby from shutdown, issue the com-mand to return to normal operation, followed immedi-ately by the command to go into standby.

Table 2 shows several commands that bring the MAX5521back to normal operation.When transition-ing from standby mode to normal operation,only the DAC power-up time is required before the DAC outputs are valid.

Reference Input

The MAX5520 accepts a reference with a voltage range extending from 0 to V DD . The output voltage (V OUT ) is represented by a digitally programmable voltage source as:

V OUT = (V REF x N / 1024) x gain

where N is the numeric value of the DAC’s binary input code (0 to 1023), V REF is the reference voltage and gain is the externally set voltage gain for the MAX5520/MAX5521.

In shutdown mode, the reference input enters a high-impedance state with an input impedance of 2.5G ?(typ).

Reference Output

The MAX5521 internal voltage reference is software configurable to one of four voltages. Upon power-up,the default reference voltage is 1.214V. Configure the reference voltage using the D8 and D9 data bits (Table 3) when the control bits are as follows: C[3:0] = 1100,1101, or 1110 (Table 2). V DD must be kept at a mini-mum of 200mV above V REF for proper operation.

M A X 5520/M A X 5521

+1.8V to +5.5V , Ultra-Low-Power, 10-Bit, Voltage-Output DACs 16

______________________________________________________________________________________

Applications Information

1-Cell and 2-Cell Circuit

See Figure 3 for an illustration of how to power the MAX5520/MAX5521 with either one lithium-ion battery or two alkaline batteries. The low current consumption of the devices makes the MAX5520/MAX5521 ideal for battery-powered applications.

Programmable Current Source

See the circuit in Figure 4 for an illustration of how to configure the MAX5520 as a programmable current source for driving an LED. The MAX5520 drives a stan-dard NPN transistor to program the current source. The current source (I LED ) is defined in the equation in Figure 4.

Voltage Biasing a Current-Output

Transducer

See the circuit in Figure 5 for an illustration of how to con-figure the MAX5520 to bias a current-output transducer.In Figure 5, the output voltage of the MAX5520 is a func-tion of the voltage drop across the transducer added to the voltage drop across the feedback resistor R.

Self-Biased Two-Electrode Potentiostat Application

See the circuit in Figure 6 for an illustration of how to use the MAX5520 to bias a two-electrode potentiostat on the input of an ADC.

Unipolar Output

Figure 7 shows the MAX5520 in a unipolar output con-figuration with unity gain. Table 4 lists the unipolar out-put codes.

Bipolar Output

The MAX5520 output can be configured for bipolar operation, as shown in Figure 8. The output voltage is given by the following equation:

V OUT = V REF x [(N A - 512) / 512]

where N A represents the numeric value of the DAC’s binary input code. Table 5 shows digital codes (offset binary) and the corresponding output voltage for the circuit in Figure 4.

Configurable Output Gain

The MAX5520/MAX5521 have a force-sense output,which provides a connection directly to the inverting ter-minal of the output op amp, yielding the most flexibility.The advantage of the force-sense output is that specific gains can be set externally for a given application. The gain error for the MAX5520/MAX5521 is specified in a unity-gain configuration (op-amp output and inverting ter-minals connected), and additional gain error results from external resistor tolerances. Another advantage of the force-sense DAC is that it allows many useful circuits to be created with only a few simple external components.An example of a custom fixed gain using the force-sense output of the MAX5520/MAX5521 is shown in Figure 9. In this example R1 and R2 set the gain for V OUT .

V OUT = [(V REFIN x N A ) / 1024] x [1 + (R2 / R1)]

where N A represents the numeric value of the DAC input code.

Figure 3. Portable Application Using Two Alkaline Cells or One Lithium Coin Cell

MAX5520/MAX5521

+1.8V to +5.5V , Ultra-Low-Power, 10-Bit,

Voltage-Output DACs

Figure 4. Programmable Current Source Driving an LED

Figure 6. Self-Biased Two-Electrode Potentiostat Application

Figure 5. Transimpedance Configuration for a Voltage-Biased Current-Output Transducer

Figure 7. Unipolar Output Circuit

Table 4. Unipolar Code Table (Gain = +1)

Table 5. Bipolar Code Table (Gain = +1)

M A X 5520/M A X 5521

+1.8V to +5.5V , Ultra-Low-Power, 10-Bit, Voltage-Output DACs 18______________________________________________________________________________________

Power Supply and Bypassing

Considerations

Bypass the power supply with a 0.1μF capacitor to GND.Minimize lengths to reduce lead inductance. If noise becomes an issue, use shielding and/or ferrite beads to increase isolation. For the thin QFN package, connect the exposed paddle to ground.

Layout Considerations

Digital and AC transient signals coupling to GND can create noise at the output. Use proper grounding tech-niques, such as a multilayer board with a low-inductance ground plane. Wire-wrapped boards and sockets are not recommended. For optimum system performance, use printed circuit (PC) boards. Good PC board ground lay-out minimizes crosstalk between DAC outputs, reference inputs, and digital inputs. Reduce crosstalk by keeping analog lines away from digital lines.

Figure 8. Bipolar Output Circuit

Figure 9. Separate Force-Sense Outputs Create Unity and Greater-than-Unity DAC Gains Using the Same Reference

MAX5520/MAX5521

+1.8V to +5.5V , Ultra-Low-Power, 10-Bit,

Voltage-Output DACs

______________________________________________________________________________________19

Figure 10. Software-Configurable Output Gain

Chip Information

TRANSISTOR COUNT: 10,688PROCESS: BiCMOS

M A X 5520/M A X 5521

+1.8V to +5.5V , Ultra-Low-Power, 10-Bit, Voltage-Output DACs Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.

20____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600?2004 Maxim Integrated Products

Printed USA

is a registered trademark of Maxim Integrated Products.

Package Information

(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to https://www.wendangku.net/doc/2318264956.html,/packages .)