AT27C1024

Description

The AT27C1024 is a low-power, high performance 1,048,576 bit one-time program-mable read only memory (OTP EPROM) organized 64K by 16 bits. It requires only one 5V power supply in normal read mode operation. Any word can be accessed in less than 45 ns, eliminating the need for speed reducing WAIT states. The by-16organization make this part ideal for high-performance 16 and 32 bit microprocessor systems.

(continued)

Note: Both GND pins must be connected.

PDIP Top View

Note: PLCC Package Pins 1 and 23 are DON’T CONNECT.

PLCC Top View

Features

?Fast Read Access Time - 45 ns ?Low Power CMOS Operation

100 μA max. Standby

30 mA max. Active at 5 MHz ?JEDEC Standard Packages

40-Lead 600-mil PDIP 44-Lead PLCC

40-Lead TSOP (10 mm x 14 mm)

?Direct Upgrade from 512K (AT27C516) EPROM ?5V ± 10% Power Supply

?High Reliability CMOS Technology

2000V ESD Protection 200 mA Latchup Immunity

?Rapid ?Programming Algorithm - 100 μs/word (typical)?CMOS and TTL Compatible Inputs and Outputs ?Integrated Product Identification Code

?

Commercial and Industrial Temperature Ranges

TSOP Top View

Type 1

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In read mode, the AT27C1024 typically consumes 15 mA.Standby mode supply current is typically less than 10 μA.The AT27C1024 is available in industry standard JEDEC-approved one-time programmable (OTP) plastic PDIP,PLCC, and TSOP packages. The device features two-line control (CE, OE) to eliminate bus contention in high-speed systems.

With high density 64K word storage capability, the AT27C1024 allows firmware to be stored reliably and to be accessed by the system without the delays of mass stor-age media.

Atmel’s 27C1024 have additional features to ensure high quality and efficient production use. The Rapid ?Program-ming Algorithm reduces the time required to program the part and guarantees reliable programming. Programming time is typically only 100 μs/word. The Integrated Product Identification Code electronically identifies the device and manufacturer. This feature is used by industry standard programming equipment to select the proper program-ming algorithms and voltages.

Description (Continued)

Switching between active and standby conditions via the Chip Enable pin may produce transient voltage excur-sions. Unless accommodated by the system design, these transients may exceed data sheet limits, resulting in de-vice non-conformance. At a minimum, a 0.1 μF high fre-quency, low inherent inductance, ceramic capacitor should be utilized for each device. This capacitor should be connected between the V CC and Ground terminals of the device, as close to the device as possible. Additionally,to stabilize the supply voltage level on printed circuit boards with large EPROM arrays, a 4.7 μF bulk electrolytic capacitor should be utilized, again connected between the V CC and Ground terminals. This capacitor should be posi-tioned as close as possible to the point where the power

supply is connected to the array.

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AT27C1024

Operating Modes

Notes: 1.X can be V IL or V IH .

2. Refer to Programming characteristics.

3. V H = 12.0 ± 0.5V.

4.Two identifier words may be selected. All Ai inputs are held low (V IL ), except A9 which is set to V H and A0 which is tog-gled low (V IL ) to select the Manufacturer’s Identification word and high (V IH ) to select the Device Code word.

5.Standby V CC current (I SB ) is specified with V PP = V CC . V CC >V PP will cause a slight increase in I SB .

*NOTICE: Stresses beyond those listed under “Absolute Maxi-mum Ratings” may cause permanent damage to the device.This is a stress rating only and functional operation of the device at these or any other conditions beyond those indi-cated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.Notes: 1. Minimum voltage is -0.6V dc which may undershoot

to -2.0V for pulses of less than 20 ns. Maximum out-put pin voltage is V CC + 0.75V dc which may over-shoot to +7.0V for pulses of less than 20 ns.

Absolute Maximum Ratings*

Block Diagram

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AC Characteristics for Read Operation

Notes:

2, 3, 4, 5. - see AC Waveforms for Read Operation.

DC and Operating Characteristics for Read Operation

Notes: 1.V CC must be applied simultaneously or before V PP ,

and removed simultaneously or after V PP .

2.V PP may be connected directly to V CC , except during pro-gramming. The supply current would then be the sum of I CC

and I PP .

DC and AC Operating Conditions for Read Operation

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AT27C1024

Pin Capacitance (f = 1 MHz T = 25°C)

(1)

Note:

1.

Typical values for nominal supply voltage. This parameter is only sampled and is not 100% tested.

AC Waveforms for Read Operation (1)

Notes:1.Timing measurement reference level is 1.5V for -45

and -55 devices. Input AC drive levels are V IL =0.0V and V IH = 3.0V. Timing measurement refer-ence levels for all other speed grades are V OL =0.8V and V OH = 2.0V. Input AC drive levels are V IL = 0.45V and V IH = 2.4V.

2.OE may be delayed up to t CE - t OE after the falling edge of CE without impact on t CE .

3.OE may be delayed up to t ACC - t OE after the address is valid without impact on t ACC .

4.This parameter is only sampled and is not 100% tested.

5.Output float is defined as the point when data is no longer

driven.

Input Test Waveforms and Measurement Levels t R , t F < 5 ns (10% to 90%)

For -45, -55, and -70

Devices Only:

Output Test Load

Note: CL = 100 pF including jig

capacitance except -45, -55 and -70

devices, where CL = 30 pF.

t R , t F < 20 ns (10% to 90%)

For -85, -10, -12,

-15 Devices Only:

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Programming Waveforms (1)

Notes: 1.The Input Timing Reference is 0.8V for V IL and 2.0V for V IH.

2.t OE and t DFP are characteristics of the device but

must be accommodated by the programmer.3.When programming the AT27C1024 a 0.1 μF capacitor is

required across V PP and ground to suppress spurious volt-age transients.

DC Programming Characteristics TA = 25 ± 5°C, V CC = 6.5 ± 0.25V, V PP = 13.0 ± 0.25V

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AC Programming Characteristics

TA = 25 ± 5°C, V CC = 6.5 ± 0.25V, V PP = 13.0 ± 0.25V

*AC Conditions of Test:

Input Rise and Fall Times (10% to 90%)..............20 ns Input Pulse Levels.................................. 0.45V to 2.4V Input Timing Reference Level ..................0.8V to 2.0V Output Timing Reference Level ...............0.8V to 2.0V Notes: 1.V CC must be applied simultaneously or before V PP

and removed simultaneously or after V PP .

2.This parameter is only sampled and is not 100% tested. Output Float is defined as the point where data is no longer driven — see timing diagram.

3.Program Pulse width tolerance is 100 μsec ± 5%.

Atmel’s 27C1024 Integrated Product Identification Code

Rapid Programming Algorithm

A 100 μs PGM pulse width is used to program. The ad-dress is set to the first location. V CC is raised to 6.5V and

V PP is raised to 13.0V. Each address is first programmed with one 100 μs PGM pulse without verification. Then a verification / reprogramming loop is executed for each ad-dress. In the event a word fails to pass verification, up to 10 successive 100 μs pulses are applied with a verifica-tion after each pulse. If the word fails to verify after 10pulses have been applied, the part is considered failed.After the word verifies properly, the next address is se-lected until all have been checked. V PP is then lowered to 5.0V and V CC to 5.0V. All words are read again and com-pared with the original data to determine if the device

passes or fails.

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