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1/2inch MCCD Sens BG0601D Datasheet

General Descriptions

BG0601D is a m

BG0601D is a h video cameras compared with

Additionally, th remove fix patt

MCCD is main

MCCD Overview

MCCD denote implementing sensors, MCCD chip such conventional C MCCD int and direct MCCD wo need. MCCD int SPI Sl SPI M I2C M I2C Sl These int flexible im thanks to

2inch MCCD Sensor for PAL Color Vi Sensor for PAL Color Vide a member of Brigates MCCD product Series.

a high performance ? inch MCCD image senso as. This chip features high sensitivity and hig ith the conventional CCD image sensor. , this chip also has on-chip advanced signal pro attern noise and improve image quality dramati inly targeting high-end security & surveillance m tes a type of image sensor which is fabricated g compatible interface with CCD sensors. L CD is a passive sensor, taking pulsed & drivin as XV1~XV4, XH1, XH2, XSG, XSUB for the tim l CCD sensors ： ntegrates PGA & A/D converters on-chip. It doe ctly outputs digital signals. works with common CMOS 3.3V control signa ntegrated multiple interfaces for outside commu Slave: connect DSP for gain control Master: connect SPI flash for sensor calibration Master: connect EEPROM for initial setting. Slave: connect external host for internal register nterfaces enable MCCD to complete a variet image enhancement, gain control and etc. Thes the capability of the standard CMOS technolo or Video Cameras

Video Cameras

sor suitable for PAL color high dynamic range pixel rocessing modules which atically. e market. ed with CMOS technology . Like conventional CCD ing signals from the DSP timing & controls. Unlike oes not need external AFE

nals. So HV driver is not

munications.

n. r control. iety of functions such as ese functions are achieved logy.

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MCCD Camera Buildup

MCCD camera as the timing video signal fo

As mentioned

PGA and A/D C driver chips i interface for sy and powerful. applications.

Figure 1 Comm 2inch MCCD Sensor for PAL Color Vi Table 1 MCCD/CCD comparison

ra is used as the essential part of a camera syste g & control generator, image processor and e for monitor display. d above, MCCD works with CMOS 3.3V enviro Converters. There is no need to add analog fro in the application system. Besides, MCCD system control and data exchange which make Figure 1 shows the difference of the build up f Common Buildup of MCCD & CCD Application System or Video Cameras

stem which also need DSP

eventually output CVBS ronment and incorporates front end and high voltage D provides SPI and I2C e the system more flexible for both MCCD and CCD

ystem

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Table of Content

General Descriptions ............................MCCD Overview .........................MCCD Camera Buildup ...............Features ................................................Key Parameter ......................................Top-level Description ...........................Block-level Description .......................Image Sensor Array ......................I2C Master Interface ....................I2C Slave Interface .......................SPI Master Interface .....................SPI Slave Interface .......................Timing and Control ......................Gain Control ................................Digital Image Processing .............Initial Loader ................................Pin Outs ........................................Chip Control .........................................Gain ..............................................PLL ..............................................Chip Characteristics .............................Opto-electrical Characteristics .....Spectral Responsivity ...................I/O Timing ................................Electrical Specifications ...............Maximum Ratings ........................Power-up Sequence ......................

2inch MCCD Sensor for PAL Color Vi ........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................or Video Cameras

(1)

.................................................. 1 .................................................. 2 .................................................. 6 .................................................. 6 .................................................. 7 (10)

............................................... 10 ............................................. 10 ................................................ 11 .............................................. 12 ................................................ 12 ............................................... 12 ................................................ 12 ................................................ 12 ................................................ 13 ................................................ 13 (16)

................................................ 16 ................................................ 16 (17)

................................................ 17 ............................................ 18 ................................................ 19 ................................................ 19 ................................................ 20 .. (20)

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List of Figures

Figure 1 Common Buildup of MCCD &Figure 2 Block Diagram .......................Figure 3 Driving Signal Diagram .........Figure 4 Even and Odd Data Output Ti Figure 5 Typical Connection Diagram Figure 6 Pixel Array Read Out .............Figure 7 Color Filter Arrangements .....Figure 8 I2C Slave Write Operation .....Figure 9 I2C Slave Read Operation .....Figure 10 Serial Write Operation .........Figure 11 48-Pin PLCC Pinout Diagram Figure 12 Analog Processing and AD C Figure 13 Zone Definition of Video Sig Figure 14 Spectral Responsivity ..........Figure 15 I/O Timing Diagram ............Figure 16 Power-up Sequence ............. 2inch MCCD Sensor for PAL Color Vi CCD & CCD Application System ............................................................................................................................................................................................................................put Timing .........................................................................gram ..............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................iagram ............................................................................... AD Conversion ................................................................eo Signal Shading ...............................................................................................................................................................................................................................................................................................................................................

or Video Cameras

(2)

.................................................. 8 .................................................. 8 .................................................. 9 .................................................. 9 ................................................ 10 ................................................ 10 ................................................ 11 ................................................ 11 ................................................ 12 ................................................ 13 ................................................ 16 ................................................ 18 ................................................ 18 ................................................ 19 (20)

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List of Tables

Table 1 MCCD/CCD comparison ........Table 2 Key Specification ....................Table 3 IO Description .........................Table 5 Opto-electrical Characteristics Table 6 IO Timing ................................Table 7 Electrical Specification ...........Table 8 Maximum Ratings ...................

(2)

............................................... 6 ................................................ 13 ................................................ 17 ................................................ 19 ................................................ 19 .. (20)

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Features

CCD com High sen CMYG c Build-in Superio Enhanc Auto blac On-chip 2-wire s

Easy con

Key Parameter

2inch MCCD Sensor for PAL Color Vi ompatible control interface. ensitivity and high dynamic range pixel color filter array in PGA&AD converter. ior low light performance. ced NIR performance. lack level calibration. ip FPN removal. serial control interface. onnection with security DSP chip for conventio Table 2 Key Specification

or Video Cameras

tional CCD camera.

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Top-level Description

The functional

BG0601D is a M control circuit generate the co resetting and t bit-line, analo performed in each pixel.

Digital image (including colu removal. Besid output in para

Figure 3 shows

diagram.

BG0601D utiliz slave is used t connect off-ch should be con interface conn

Typical connec provides scan Under the con proper timing interface to ser through the I2slave interface slave need pull 2inch MCCD Sensor for PAL Color Vi al diagram of BG0601D is shown as Figure 2. MCCD image sensor with 768x582 active pixe itry receives frame reset and frame readout column/row driver signals, which sequence th then reading each row in turn. Once the pixel alog processing (providing CDS and gain) an n column parallel way. The output from the A e processing unit mainly deal with the fix pat lumn wise fix pattern noise and dark current n sides, digital gain is performed in this part. Aft arallel by the control of horizontal transfer signal ws the driving signal diagram, and Figure 4 show ilized SPI and I2C interface for system control to receive gain code for the gain control uni chip flash which serves the digital image proc onnected to the off-chip EEPROM to load the nects external host to access to the internal reg ection diagram is shown as Figure 5. Common an control signals, SPI slave bus signals and m ntrol of DSP, BG0601D will output 10-bit digita ng and gain. Off-chip FLASH is connected t serves the digital image processing unit. Off-chi I2C master interface to load the initial setting.ce can be connected for adjustment usage. B ull-up resistance.

or Video Cameras

xels array. The timing and t signals (XSUB, XSG) to through the rows of array, el data of a row is put onto and A/D conversion is ADC is a 10-bit value for attern noise cancellation noise) and row wise noise After that, image data will al (H1, H2). ows parallel output timing ol and data exchange. SPI nit. SPI master is used to ocessing unit. I2C master e initial setting. I2C slave egister file. n CCD DSP (i.e. NVP2040e) main clock of BG0601D. ital value of pixels with the through the SPI master hip EEPROM is connected Besides, BG0601D's I2C Both I2C master and I2C

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Read out transfer (Xsg)

Vertical transfer (V2,V4)

Horizontal transfer (H1,H2)

Data output

Exposure start (Xsub)2inch MCCD Sensor for PAL Color Vi Figure 2 Block Diagram

Figure 3 Driving Signal Diagram

or Video Cameras

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Valid pixe Figu

2inch MCCD Sensor for PAL Color Vi d pixel Signal Valid pixel Signal

Figure 4 Even and Odd Data Output Timing

Figure 5 Typical Connection Diagram

or Video Cameras

DSP

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Block-level Description

Image Sensor Array

The image sen dark columns complementar filter arrangem

I2C Master Interface

BG0601D utiliz It will read th EEPROM is 16K

2inch MCCD Sensor for PAL Color Vi ensor array contains 768 x 582 active pixels. Bes s as Figure 6 can be read out for special purp tary color filter of CYMG (cyan, yellow, magen ment (top right corner of array) is show in Figur

Figure 6 Pixel Array Read Out

Figure 7 Color Filter Arrangements

ilizes I2C master interface to load initial settings the off-chip EEPROM at the power up phr 6K size. or Video Cameras

esides, 6 dark rows and 36

rpose. BG0601D employs enta and green), the color ure 7.

gs from off-chip EEPROM. hrase. Maximum support

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I2C Slave Interface

BG0601D is pr 0x65 and writi MCCDSDA. M Figure 8 shows The sequence The maste The maste The slave device add The maste The slave s The maste The slave s The maste

SCL START

Figure 9 shows The sequence The maste The maste The slave s The maste The slave s The maste The maste

The slave s The slave s The maste The maste SCL SDA

START

ACK

2inch MCCD Sensor for PAL Color Vi programmable through I2C interface with read iting slave device address 0x64. The related IO MCCDSCL works as the serial clock and MCCD ws example of the write operation (Writing 0x2C e is defined as following: ter sends a start bit to the slave. ter sends the slave device address with write mo e sends an acknowledge bit to the master to i ddress. ter sends 8-bit register address to the slave. e sends an acknowledge bit after it receives the 8ter sends 8-bit register data to the salve. e sends an acknowledge bit after it receives the 8ter sends a stop bit to the slave.

ACK

Figure 8 I2C Slave Write Operation

ws example of the read operation (Writing 0x56 e is defined as following: ter sends a start bit to the slave. ter sends the slave device address with write mo e sends an acknowledge bit to the master. ter sends 8-bit register address to the slave. e sends an acknowledge bit to the master. ter sends a start bit to the slave. ter sends the slave device address with read mo e sends an acknowledge bit to the master. e sends 8-bit data to the master ter sends a no-acknowledge bit to the slave. ter sends a stop bit to the slave to stopping read ACK

ACK

Figure 9 I2C Slave Read Operation

or Video Cameras

ading slave device address

IO pin is MCCDSCL and D as the data line. 2C register with 0x56 data). ode. indicate receive its slave

e 8-bit data. e 8-bit data ACK

STOP

6 data from 0x2C register). ode. ode. ad.

ACK

STOP

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SPI Master Interface

BG0601D SPI m address by SF outputs addre SF_MISO to tran

SPI Slave Interface

Figure 10 show control.

1. AFE_SDA

2. System up

3. All 12 data bits, zeros

4. Test bit is f

AFE_DAT

A 1

AFE_SCK

AFE_SLD

Timing and Control

The timing an (XSUB, XSG) t the rows of arr

Gain Control

Gain control According to th

Digital Image Processing

Digital Image p wise fix pattern Row wise n Row wise correction then apply Column w To achieve Column w caused by 2inch MCCD Sensor for PAL Color Vi I master interface supports Dual IO Mode (cm SF_MOSI and SF_MISO, and Dual Output M ress by SF_MOSI only. Both of these two m transfer data.

ows serial write operation of SPI flash which tran A Bits are internally latched on the rising edges o update of loaded registers occurs on AFE_SLD ri ata bits D0-D11 must be written. If the register os should be used for the undefined bits. is for internal use only and must be set low.

D 3

D 4

D 7

Figure 10 Serial Write Operation

and control circuitry receives frame reset and ) to generate the column/row driver signals, w array, resetting and then reading each row in tur unit receives gain code through SPI slav the gain code, it assures the pixel output with p e processing unit focuses on three type of noise:rn noise and dark current noise. e noise correction:

e noise is handled automatically by the image on unit measures a set o

f optical black pixels at ly the average to the tied active pixels of the lin wise fix pattern noise correction:

ve fast frame rate, BG0601D uses column paral wise fix pattern noise correction unit is used t by the different column signal path. To use or Video Cameras

md=0xBB) which outputs

Mode (cmd=0x3B) which modes use SF_MOSI and transfer VGA code for gain s of AFE_SCK. rising edge. ter contains fewer than 12

D 9

D10

D 11

and frame readout signals , which sequence through urn.

ave interface from DSP. proper gain amplified.

se: row wise noise, column age sensor. Row wise noise at the start of each line and ine. arallel readout architecture. d to correct the difference e this feature, fix pattern

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column n capture th data. Spec Dark curre BG0601D precisely. provided t

Initial Loader

BG0601D use an The necessary

Pin Outs

2inch MCCD Sensor for PAL Color Vi noise should be measured first by set the in the image output. Besides, off chip flash is nee ecified tool is provided to process this operation rrent noise correction:

use dark current noise correction function . This feature also need calibration and off chi to process this operation.

e an initial loader to load the necessary setting ary setting is stored in the of

f chip EEPROM conn Figure 11 48-Pin PLCC Pinout Diagram

Table 3 IO Description

or Video Cameras

integration time to 0 and

eeded to storage the noise on. to remove dark current hip flash. Specified tool is g at the power up phrase. nected to the I2C master.

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2inch MCCD Sensor for PAL Color Vi

or Video Cameras

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_ _ _ _ _ _

2inch MCCD Sensor for PAL Color Vi

or Video Cameras

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Chip Control

Gain

BG0601D has gain. Gain con then VGA code Figure

PGA Gain:BG0601D column. P 00). The PG Gain pga = C The maxim Ramp Gai Ramp Gai 00.

Digital Ga Digital gai for digital gain.

PLL

The BG0601D 100MHz~250M

The PLL is con frequency (f out f out = f xclk *(PLM

Note:

1) PLM=0~1272inch MCCD Sensor for PAL Color Vi as three stages of gain, including PGA gain, AD ntrol unit receives gain code through SPI slave de is mapped into PGA gain, Ramp gain and dig PGA

Digital gain

igure 12 Analog Processing and AD Conversion

in:

has a column parallel architecture and it has . PGA gain can be controlled by register C s and PGA Gain is determined by: = C s / C f imum PGA gain is 16x. ain:

ain controls the slope of AD ramp. It's control ain:

ain can be controlled by register 0xb7 and 0xb8al gain setting is x_xxx_xxx.yyy_yyy_yy where 11D has an internal PLL, which can gen MHz. ontrolled through its PLM, PLN and PLK para ut ) has the following relationship to the input fre M+2)/( (PLN[5:0]+2)*PLLK) 7;

or Video Cameras

D Ramp gain and Digital

e interface from DSP. And igital gain.

as an analog gain stage per and C f (0xb4, 0xb5 on page l by register 0xb6 on Page b8 on page 00. The format 16'h0200 represents a 1x enerate PLL clock (f out ) arameters. The PLL output frequency (f xclk ):

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2) PLN=0~63; 3) PLK[1:0]=2’b PLK[1:0]=2’b PLK[1:0]=2’b PLK[1:0]=2’b

The input cloc PLN=3 and PLL The PLL takes not guaranteed

The PLL can b clock will be se

Chip Characteristics

Opto-electrical Characteristics

Δ Δ Δ

2inch MCCD Sensor for PAL Color Vi ;

2’b00: PLLK=2 ’b01: PLLK=4 ’b10: PLLK=8 ’b11: PLLK=16 lock should be 14.1M and the Default frequen LLK=2. s time to power up. During this time, the behav ed. be bypassed manually. When the PLL has be set as the main clock.

Table 4 Opto-electrical Characteristics

or Video Cameras

ency is 91M with PLM=63 avior of its output clock is been bypassed, the input

= ℃

= ℃ = ℃

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Notice: Due to the effect in dark signa remove this effect adopted in the app Figure

Spectral Responsivity

2inch MCCD Sensor for PAL Color Vi he cosmic radiation, pixels of CMOS image sensor may be d nals. This process happens slowly, but unfortunately curren t totally. It is recommended that automatic compensation sy plication.

gure 13 Zone Definition of Video Signal Shading

Figure 14 Spectral Responsivity

or Video Cameras

distorted and cause white point ent scientific technology can not system for white pixels should be

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I/O Timing

CLKIN

D[0-9]

] Electrical Specifications

2inch MCCD Sensor for PAL Color Vi

Table 5 IO Timing

]

Table 6 Electrical Specification

= =

= = =

or Video Cameras

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Maximum Ratings

Power-up Sequence

The recommen 1. Turn on V 2. After 10ms 3. Wait 10ms VDDA

VDDO

2inch MCCD Sensor for PAL Color Vi Table 7 Maximum Ratings

_ _ ℃

℃ ended power up sequence is show in Figure 16. VDDO, VDDA, VDD and VDDPIX power supply ms pull up RSTB. s to supply CLKIN.

Figure 16 Power-up Sequence

or Video Cameras

ly.