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SP3232EUCP中文资料

DESCRIPTION

■ Meets true EIA/TIA-232-F Standards from a +3.0V to +5.5V power supply ■ Interoperable with EIA/TIA - 232 and

adheres to EIA/TIA - 562 down to a +2.7V power source

■ 1μA Low-Power Shutdown with Receivers Active (SP3222EU )

■ Enhanced ESD Specifications: ±15kV Human Body Model

±15kV IEC1000-4-2 Air Discharge ±8kV IEC1000-4-2 Contact Discharge ■ 1000 kbps Minimum Transmission Rate ■ Ideal for Handheld, Battery Operated Applications SELECTION TABLE

L E D O M s e i l p p u S r e w o

P 232-S R s r e v i r D 232-S R s

r e v i e c e R l a n r e t x E s

t n e n o p m o C n

w o d t u h S L T T e t a t S -3f o .o N s n i P U E 2223P S V 5.5+o t V 0.3+224s e Y s e Y 02,81U

E 2323P S V

5.5+o t V 0.3+2

N o

N 6

1The SP3222EU and the SP3232EU are 2 driver, 2 receiver RS-232 transceiver solutions intended for portable or hand-held applications such as notebook or palmtop computers.Their data transmission rate of 1000 kbps meets the demands of high speed RS-232applications. Both ICs have a high-efficiency, charge-pump power supply that requires only 0.1μF capacitors in 3.3V operation. This charge pump allows the SP3222EU and the 3232EU to deliver true RS-232 performance from a single power supply ranging from +3.0V to +5.5V. The ESD tolerance of the SP3222EU/3232EU devices are over ±15kV for both Human Body Model and IEC1000-4-2 Air discharge test methods.

The SP3222EU device has a low-power shutdown mode where the devices' driver

outputs and charge pumps are disabled. During shutdown, the supply current falls to less than 1uA.

NOTE 1: V+ and V- can have maximum magnitudes of 7V, but their absolute difference cannot exceed 13V.

ABSOLUTE MAXIMUM RATINGS

These are stress ratings only and functional

operation of the device at these ratings or any other above those indicated in the operation sections of the specifications below is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability and cause permanent damage to the device.

V CC ......................................................-0.3V to +6.0V V+ (NOTE 1)......................................-0.3V to +7.0V V- (NOTE 1).......................................+0.3V to -7.0V V+ + |V-| (NOTE 1)...........................................+13V I CC (DC V CC or GND current).........................±100mA Input Voltages

TxIN, EN ............................................-0.3V to +6.0V RxIN (25)

Output Voltages

TxOUT.......................................................±13.2V RxOUT............. ..................-0.3V to (V CC + 0.3V)Short-Circuit Duration

TxOUT.................................................Continuous Storage Temperature.................-65°C to +150°C Power Dissipation Per Package

20-pin SSOP (derate 9.25mW/o C above +70o C)........750mW 18-pin PDIP (derate 15.2mW/o C above +70o C).......1220mW 18-pin SOIC (derate 15.7mW/o C above +70o C).......1260mW 20-pin TSSOP (derate 11.1mW/o C above +70o C)......890mW 16-pin SSOP (derate 9.69mW/o C above +70o C)........775mW 16-pin PDIP (derate 14.3mW/o C above +70o C).......1150mW 16-pin Wide SOIC (derate 11.2mW/o C above +70o C)....900mW 16-pin TSSOP (derate 10.5mW/o C above +70o C)......850mW 16-pin nSOIC (derate 13.57mW/°C above +70°C)......1086mW

SPECIFICATIONS

Unless otherwise noted, the following specifications apply for V CC = +3.0V to +5.5V with T AMB = T MIN to T MAX , C 1 to C 4=0.1μF PARAMETER

MIN.

TYP.

MAX.UNITS

CONDITIONS

DC CHARACTERISTICS Supply Current

0.3 1.0mA no load, T AMB = +25°C, V CC = 3.3V,TxIN = GND or V CC

Shutdown Supply Current

1.0

μA

SHDN = GND,T AMB = +25°C,V CC = +3.3V, TxIN = GND or V CC

LOGIC INPUTS AND RECEIVER OUTPUTS Input Logic Threshold LOW GND 0.8V TxIN, EN, SHDN, Note 2Input Logic Threshold HIGH 2.0V

V CC = 3.3V, Note22.4

V CC V CC = 5.0V, Note 2

Input Leakage Current ±0.01±1.0μA TxIN, EN, SHDN, T AMB = +25°C,VIN= 0V to V CC

Output Leakage Current ±0.05

±10μA receivers disabled, V OUT = 0V to V CC Output Voltage LOW 0.4

V I OUT = 1.6mA Output Voltage HIGH V CC -0.6

V CC -0.1

V I OUT = -1.0mA

DRIVER OUTPUTS Output Voltage Swing ±5.0±5.4

V 3k ? load to ground at all driver outputs,T AMB = +25°C

Output Resistance

300

?V CC = V+ = V- = 0V, T OUT = +2V Output Short-Circuit Current ±35

±60mA V OUT = 0V

Output Leakage Current

±25

μA

V OUT = +12V,V CC = 0V to 5.5V,drivers disabled

SPECIFICATIONS (continued)

Unless otherwise noted, the following specifications apply for V CC = +3.0V to +5.5V with T AMB = T MIN to T MAX , C 1 to C 4=0.1μF. Typical Values apply at V CC = +3.3V or +5.5V and T AMB = 25o C.NOTE 2: Driver input hysteresis is typically 250mV.

PARAMETER MIN.

TYP.

MAX.

UNITS

CONDITIONS

RECEIVER INPUTS Input Voltage Range -25+25

V Input Threshold LOW 0.6 1.2V V CC =3.3V 0.8

1.5V V CC =5.0V Input Threshold HIGH 1.5

2.4V V CC =

3.3V 1.8 2.4V V CC =5.0V

Input Hysteresis 0.3V Input Resistance

7k ?

TIMING CHARACTERISTICS Maximum Data Rate 1000

kbps R L =3k ?, C L =250pF, one driver switching

Receiver Propagation Delay 0.15μs t PHL , RxIN to RxOUT, C L =150pF 0.15t PLH , RxIN to RxOUT, C L =150pF

Receiver Output Enable Time 200ns Receiver Output Disable Time 200ns Driver Skew 100ns | t PHL - t PLH |, T AMB = 25°C Receiver Skew

50ns | t PHL - t PLH |

Transition-Region Slew Rate

V/μs

V CC = 3.3V, R L = 3K ?, T AMB = 25°C,measurements taken from -3.0V to +3.0V or +3.0V to -3.0V

Figure 1. Transmitter Output Voltage vs Load Capacitance for the SP3222EU and the SP3232EU Figure 2. Slew Rate vs Load Capacitance for the SP3222EU and the SP3232EU

Figure 3. Supply Current vs Load Capacitance when Transmitting Data for the SP3222EU and the SP3232EU TYPICAL PERFORMANCE CHARACTERISTICS

Unless otherwise noted, the following performance characteristics apply for V CC = +3.3V, 1000kbps data rates, all drivers loaded with 3k ?, 0.1μF charge pump capacitors, and T AMB = +25°C.

Figure 4. Supply Current vs Supply Voltage for the SP3222EU and the SP3232EU

Figure 5. Transmitter Output Voltage vs Supply Voltage for the SP3222EU and the SP3232EU Figure 6. Transmitter Skew vs Load Capacitance for the SP3222EU and the SP3232EU

M A N N

O I T C N U F R

E B M U N N I P U E 2223P S U

E 2323P S O

S /P I D P

O S S P

O S S T N E .

n o i t a r e p o l a m r o n r o f W O L c i g o l y l p p A .e l b a n E r e v i e c e R .)e t a t s Z -h g i h (s t u p t u o r e v i e c e r e h t e l b a s i d o t H G I H c i g o l y l p p A 11-+1C .r o t i c a p a c p m u p -e g r a h c r e l b u o d e g a t l o v e h t f o l a n i m r e t e v i t i s o P 221+V .

p m u p e g r a h c e h t y b d e t a r e n e g V 5.5+332-1C .r o t i c a p a c p m u p -e g r a h c r e l b u o d e g a t l o v e h t f o l a n i m r e t e v i t a g e N 443+2C .r o t i c a p a c p m u p -e g r a h c g n i t r e v n i e h t f o l a n i m r e t e v i t i s o P 554-2C .r o t i c a p a c p m u p -e g r a h c g n i t r e v n i e h t f o l a n i m r e t e v i t a g e N 665-V .p m u p e g r a h c e h t y b d e t a r e n e g V 5.5-776T U O 1T .t u p t u o r e v i r d 232-S R 517141T U O 2T .t u p t u o r e v i r d 232-S R 887N I 1R .t u p n i r e v i e c e r 232-S R 416131N I 2R .t u p n i r e v i e c e r 232-S R 998T U O 1R .t u p t u o r e v e i c e r S O M C /L T T 315121T U O 2R .t u p t u o r e v e i c e r S O M C /L T T 01019N I 1T .t u p n i r e v i r d S O M C /L T T 213111N I 2T .t u p n i r e v i r d S O M C /L T T 112101D N G .

d n u o r G 618151V C C e

g a t l o v y l p p u s V 5.5+o t V 0.3+719161N D H S .n o i t a r e p o e c i v e d l a m r o n r o f H G I H e v i r D .t u p n I l o r t n o C n w o d t u h S -n o e h t d n a )t u p t u o Z -h g i h (s r e v i r d e h t n w o d t u h s o t W O L e v i r D .y l p p u s r e w o p d r a o b 8102-.

C .N .

t c e n n o C o N -4

1,11-

Table 1. Device Pin Description

DESCRIPTION

The SP3222EU and SP3232EU are 2 driver/ 2receiver devices ideal for portable or hand-held applications. The SP3222EU features a 1μA shutdown mode that reduces power consumption and extends battery life in portable systems. Its receivers remain active in shutdown mode, allowing external devices such as modems to be monitored using only 1μA supply current.

The SP3222EU/3232EU transceivers meet the EIA/TIA-232 and V.28/V.24 communication protocols They feature Sipex's proprietary on-board charge pump circuitry that generates 2 x

CC for RS-232 voltage levels from a single

+3.0V to +5.5V power supply. The

SP3222EU/3232EU drivers operate at a minimum data rate of 1000kbps.

THEORY OF OPERATION

The SP3222EU/3232EU series are made up of three basic circuit blocks: 1. Drivers, 2. Receivers, and 3. the Sipex proprietary charge pump.

Drivers

The drivers are inverting level transmitters that convert TTL or CMOS logic levels to ±5.0V EIA/TIA-232 levels inverted relative to the input logic levels. Typically, the RS-232 output voltage swing is ±5.5V with no load and at least ±5V minimum fully loaded. The driver outputs are protected against infinite short-circuits to ground without degradation in reliability. Driver outputs will meet EIA/TIA-562 levels of ±3.7V with supply voltages as low as 2.7V.

The drivers have a minimum data rate of 1000kbps fully loaded with 3K? in

parallel with 250pF, ensuring compatibility with PC-to-PC communication software.Figure 11 shows a loopback test circuit used to the RS-232 drivers. Figure 12 shows the test results of the loopback circuit with all drivers active at 250kbps with RS-232 loads in parallel with 1000pF capacitors. Figure 13 shows the test results where one driver was active at 1000kbps and all drivers loaded with an RS-232 receiver in parallel with a 250pF capacitor.

The SP3222EU driver's output stages are tristated in shutdown mode. When the power is off, the SP3222EU device permits the outputs to be driven up to ±12V. Because the driver's inputs do not have pull-up resistors, unused inputs should be connected to V

or GND.

In the shutdown mode, the supply current is less than 1μA, where SHDN = LOW. When the SP3222EU device is shut down, the device's driver outputs are disabled (tri-stated) and the charge pumps are turned off with V+ pulled down to V

and V- pulled to GND. The time required to exit shutdown is typically 100μs. Connect SHDN to V

if the shutdown mode is not used.

Receivers

The receivers convert EIA/TIA-232 levels to TTL or CMOS logic output levels. The

SP3222EU receivers have an inverting tri-state output. Receiver outputs (RxOUT) are tri-stated when the enable control EN = HIGH.

In the shutdown mode, the receivers can be TxOUT. The truth table logic of the

SP3222EU driver and receiver outputs can be found in Table 2.

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Figure 12. Driver Loopback Test All Drivers at 250kbps Figure 13. Driver Loopback Test One Driver 1Mbps

Since receiver input is usually from a trans-mission line where long cable lengths and

system interference can degrade the signal and inject noise, the inputs have a typical hyster-esis margin of 300mV. Should an input be left unconnected, a 5k ? pulldown resistor to ground will commit the output of the receiver to a HIGH state.Charge Pump

The charge pump is a Sipex –patented design (5,306,954) and uses a unique approach

compared to older less–efficient designs. The charge pump still requires four external capacitors, but uses a four–phase voltage shifting technique to attain symmetrical 5.5V power supplies. The internal power supply consists of a regulated dual charge pump that provides output voltages 5.5V regardless of the input voltage (V CC ) over the +3.0V to +5.5V range.

In most circumstances, decoupling the power supply can be achieved adequately using a 0.1μF bypass capacitor at C5 (refer to Figures 9 and 10). In applications that are sensitive to power-supply noise, decouple V CC to ground with a capacitor of the same value as charge-pump capacitor C1. Physically connect bypass capacitors as close to the IC as possible.

The charge pumps operate in a discontinuous mode using an internal oscillator. If the

output voltages are less than a magnitude of 5.5V, the charge pumps are enabled. If the output voltage exceed a magnitude of 5.5V,the charge pumps are disabled. This oscillator controls the four phases of the voltage

shifting. A description of each phase follows.Phase 1

— V SS charge storage — During this phase of the clock cycle, the positive side of capacitors C 1 and C 2 are initially charged to V CC . C l + is then switched to GND and the charge in C 1– is transferred to C 2–. Since C 2+ is connected to V CC , the voltage potential across capacitor C 2is now 2 times V CC .

Phase 2

— V SS transfer — Phase two of the clock

connects the negative terminal of C 2 to the V SS storage capacitor and the positive terminal of C 2 to GND. This transfers a negative gener-ated voltage to C 3. This generated voltage is regulated to a minimum voltage of -5.5V.Simultaneous with the transfer of the voltage to C 3, the positive side of capacitor C 1 is switched to V CC and the negative side is connected to GND.

Phase 3

— V DD charge storage — The third phase of the clock is identical to the first phase — the charge transferred in C 1 produces –V CC in the negative terminal of C 1, which is applied to the negative side of capacitor C 2. Since C 2+ is at V CC , the voltage potential across C 2 is 2times V CC .

Phase 4

— V DD transfer — The fourth phase of the clock connects the negative terminal of C 2 to GND, and transfers this positive generated voltage across C 2 to C 4, the V DD storage

capacitor. This voltage is regulated to +5.5V.At this voltage, the internal oscillator is disabled. Simultaneous with the transfer of the voltage to C 4, the positive side of capaci-tor C 1 is switched to V CC and the negative side

Table 2. SP3222EU Truth Table Logic for Shutdown and Enable Control

N D H S N E T U O x T T U O x R 00e t a t s -i r T e v i t c A 01e t a t s -i r T e t a t s -i r T 10e v i t c A e v i t c A 1

v i t c A e

t a t s -i r T 元器件交易网https://www.wendangku.net/doc/3f17137937.html,

is connected to GND, allowing the charge pump cycle to begin again. The charge pump cycle will continue as long as the operational conditions for the internal oscillator are present.

Since both V+ and V– are separately generated

from V

CC ; in a no–load condition V+ and V–

will be symmetrical. Older charge pump approaches that generate V– from V+ will show a decrease in the magnitude of V–compared to V+ due to the inherent inefficien-cies in the design.

The clock rate for the charge pump typically operates at 250kHz. The external capacitors can be as low as 0.1μF with a 16V breakdown voltage rating.

ESD Tolerance

The SP3222EU/3232EU series incorporates ruggedized ESD cells on all driver output and receiver input pins. The ESD structure is improved over our previous family for more rugged applications and environments sensitive to electrostatic discharges and associated

transients. The improved ESD tolerance is at least ±15kV without damage nor latch-up. There are different methods of ESD testing applied:

a) MIL-STD-883, Method 3015.7

b) IEC1000-4-2 Air-Discharge

c) IEC1000-4-2 Direct Contact

The Human Body Model has been the generally accepted ESD testing method for semiconductors. This method is also speci-fied in MIL-STD-883, Method 3015.7 for ESD testing. The premise of this ESD test is to simulate the human body’s potential to store electrostatic energy and

discharge it to an integrated circuit. The simulation is performed by using a test model as shown in Figure 20. This method will test the IC’s capability to withstand an ESD transient during normal handling such as in manufacturing areas where the ICs tend to be handled

frequently.

The IEC-1000-4-2, formerly IEC801-2, is generally used for testing ESD on equipment and systems. For system manufacturers, they must guarantee a certain amount of ESD protection since the system itself is exposed to the outside environment and human presence. The premise with IEC1000-4-2 is that the system is required to withstand an amount of static electricity when ESD is applied to points and surfaces of the equipment that are accessible to personnel during normal usage. The transceiver IC receives most of the ESD current when the ESD source is applied to the connector pins. The test circuit for IEC1000-4-2 is shown on Figure 21. There are two methods within IEC1000-4-2, the Air Dis-charge method and the Contact Discharge method.

With the Air Discharge Method, an ESD voltage is applied to the equipment under

test (EUT) through air. This simulates an electrically charged person ready to connect a cable onto the rear of the system only to find an unpleasant zap just before the person touches the back panel. The high energy potential on the person discharges through

an arcing path to the rear panel of the system before he or she even touches the system. This energy, whether discharged directly or through air, is predominantly a function of the discharge current rather than the discharge voltage.

Variables with an air discharge such as approach speed of the object carrying the ESD potential to the system and humidity will tend to change the discharge current. For example, the rise time of the discharge current varies with the approach speed.

The Contact Discharge Method applies the ESD current directly to the DUT.

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Figure 17. Charge Pump Waveforms

This method was devised to reduce the unpredictability of the ESD arc. The dis-charge current rise time is constant since the energy is directly transferred without the air-gap arc. In situations such as hand held systems, the ESD charge can be directly discharged to the equipment from a person already holding the equipment. The current is transferred on to the keypad or the serial port of the equipment directly and then travels through the PCB and finally to the IC.The circuit models in Figures 20 and 21

represent the typical ESD testing circuits used for all three methods. The C S is initially charged with the DC power supply when the first switch (SW1) is on. Now that the

capacitor is charged, the second switch (SW2)is on while SW1 switches off. The voltage stored in the capacitor is then applied through R S , the current limiting resistor, onto the device under test (DUT). In ESD tests, the SW2 switch is pulsed so that the device under test receives a duration of voltage.

Figure 20. ESD Test Circuit for Human Body Model

Figure 21. ESD Test Circuit for IEC1000-4-2

Figure 22. ESD Test Waveform for IEC1000-4-2

30A

I ?

15A

t=30ns

t ?

t=0ns

For the Human Body Model, the current

limiting resistor (R S ) and the source capacitor (C S ) are 1.5k ? an 100pF, respectively. For IEC-1000-4-2, the current limiting resistor (R S ) and the source capacitor (C S ) are 330?an 150pF, respectively.

The higher C S value and lower R S value in the IEC1000-4-2 model are more stringent than the Human Body Model. The larger storage capacitor injects a higher voltage to the test point when SW2 is switched on. The lower current limiting resistor increases the current charge onto the test point.

Device Pin Human Body IEC1000-4-2

Tested Model Air Discharge Direct Contact Level

Driver Outputs ±15kV ±15kV ±8kV 4Receiver Inputs ±15kV

±15kV

±8kV

Table 3. Transceiver ESD Tolerance Levels

PACKAGE:PLASTIC SHRINK

PACKAGE:PLASTIC

DUAL–IN–LINE (NARROW)

PACKAGE:PLASTIC

SMALL OUTLINE (SOIC)(NARROW)

PACKAGE:PLASTIC THIN

SMALL OUTLINE

(TSSOP)

DIMENSIONS

in inches (mm) Minimum/Maximum

Symbol14 Lead16 Lead20 Lead24 Lead28 Lead38 Lead D0.193/0.2010.193/0.2010.252/0.2600.303/0.3110.378/0.3860.378/0.386

(4.90/5.10)(4.90/5.10)(6.40/6.60)(7.70/7.90)(9.60/9.80)(9.60/9.80)

e0.026 BSC0.026 BSC0.026 BSC0.026 BSC0.026 BSC0.020 BSC

(0.65 BSC)(0.65 BSC)(0.65 BSC)(0.65 BSC)(0.65 BSC)(0.50 BSC)

ORDERING INFORMATION

Model Temperature Range Package Type SP3222EUCA

..........................................0?C to +70?C ..........................................20-Pin SSOP SP3222EUCP ..........................................0?C to +70?C ............................................18-Pin PDIP SP3222EUCT .......................................... 0?C to +70?C ........................................ 18-Pin W SOIC SP3222EUCY ..........................................0?C to +70?C ........................................20-Pin TSSOP SP3232EUCA ..........................................0?C to +70?C ..........................................16-Pin SSOP SP3232EUCP ..........................................0?C to +70?C ............................................16-Pin PDIP SP3232EUCT .......................................... 0?C to +70?C ........................................ 16-Pin WSOIC SP3232EUCY .......................................... 0?C to +70?C ........................................ 16-Pin TSSOP SP3232EUCN...........................................0?C to +70?C .........................................16-Pin nSOIC

Corporation

SIGNAL PROCESSING EXCELLENCE

Sipex Corporation reserves the right to make changes to any products described herein. Sipex does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights nor the rights of others.

Sipex Corporation Headquarters and Sales Office 22 Linnell Circle Billerica, MA 01821TEL: (978) 667-8700FAX: (978) 670-9001e-mail: sales@https://www.wendangku.net/doc/3f17137937.html, Sales Office

233 South Hillview Drive Milpitas, CA 95035TEL: (408) 934-7500FAX: (408) 935-7600

Please consult the factory for pricing and availability on a Tape-On-Reel option.