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Handbook for Robustness Validation

Electronic Components

and Systems Handbook for Robustness Validation

of Semiconductor Devices

in Automotive Applications

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Preface

Can you imagine hiking on a steep mountain trail in the black of night not knowing how close to the

edge of the cliff you are? Would you feel safe?

Electronic components, such as semiconductors, have technical limits that might be very close to

the edge of the customer’s speci? cation. When this occurs, the semiconductor can malfunction and

possibly cause an operational failure of a critical vehicle system.

As in the hiking analogy, wouldn’t it be better to have the information as to how close the

semiconductor actually performs with regard to the speci? cation limits, or better yet, to know

that there is a the safety zone, or guard band, between to semiconductor’s performance and the

speci? cation limits?

The basic philosophy behind the Robustness Validation methodology described in this Handbook is to

gain knowledge about the size of the guard band by testing the semiconductor to failure, or end-of-

life. The goal of Robustness Validation is to achieve lower ppm-failure rates by ensuring adequate

guard band between the “real-life” operating range of the semiconductor and the points at which the

semiconductor fails.

The current “test-to-pass” statistical method used to select and qualify semiconductor devices does

not provide information regarding the amount of guard band. This is very similar to hiking in the

dark without knowing where the edge of the cliff is.

The safer way is to use Robustness Validation approach. Please read on.

Sincerely

Yours

Helmut Keller

Chairman ZVEI Robustness Validation Committee

Jack Stein

Chairman SAE Automotive Electronics Reliability Committee

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No part of this publication may be reproduced, stored in a retrieval system or transmitted in any form

or by any means (print, electronic, mechanical, photocopying) or otherwise without the prior permission

of ZVEI. Every effort is made to ensure that the information given herein is accurate, but no legal

responsibility is accepted for any errors, omissions or misleading statements in this information.

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Foreword

The quality of the vehicles we buy and the competitiveness of the automotive industry depend on

being able to make quality and reliability predictions. Quali? cation measures must provide useful

and accurate data to provide added value. Increasingly, manufacturers of semiconductor components

must be able to show that they are producing meaningful results for the reliability of their products

under de? ned mission pro? les from the whole supply chain.

Reliability is the probability that a semiconductor component will perform in accordance with

expectations for a predetermined period of time in a given environment. To be ef? cient reliability

testing has to compress this time scale by accelerated stresses to generate knowledge on the time to

fail. To meet any reliability objective requires comprehensive knowledge of the interaction of failure

modes, failure mechanisms, the mission pro? le and the design of the product.

10 years ago you could read: “Quali? cation tests of prototypes must ensure that quality and

reliability targets have been reached”.

This approach is no longer suf? cient to guarantee robust electronic products for a failure free life

of the car, which is the intention of the Zero-Defect-Approach. The emphasis has now shifted from

merely the detection of failures to their prevention.

We started this way by introducing screening methods after the product had been produced after

product has successfully survived a standard quali? cation. Then the focus shifted to reliability

methodologies applied on technology level during development.

Now product quali? cation again changes from the detection of defects based on prede? ned sample

sizes towards the generation of knowledge by generating failure mechanisms speci? c data, combined

with the knowledge from the technology ? eld. Now we can generate real knowledge on the robustness

of products.

Quali? cation focuses on intrinsic topics of products and technologies, requiring only small sample

sizes. Defectivity issues now put a big load on monitoring measures, which are now needed to

demonstrate manufacturability and the control of extrinsic defects.

This handbook should give guidance to engineers how to apply robustness validation during

development and quali? cation of semiconductor components. It was made possible because many

companies, semiconductor manufacturers, component manufacturers (Tier1) and car manufacturers

(OEMs) worked together in a joint working group to bring in the knowledge of the complete supply

chain.

I would like to thank all teams, organizations and colleagues for actively supporting the robustness

validation approach.

Andreas Preussger

Core Team Leader RV Group

Editor in Chief

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Ito Masuo, Nissan Motor Company Ltd

Jendro Brian, Siemens VDO and AEC Member

Kanekawa Nobuyasu, Hitachi Ltd.

Kanemaru Kenji, Tokai Rika Co Ltd.

Klauke Martin, Renesas Technology

Knoell Bob, Visteon Corporation and AEC Member

Koch Herbert, Robert Bosch GmbH

Liang Zhongning, NXP and AEC Member

Lycoudes Nick, Freescale Semiconductor and AEC Member

Maier Reinhold, BMW AG

Mori Satoshi, Tokai Rika Co Ltd.

Nakaguro Kunio, Nissan Motor Co., Ltd.

Narumi Kenji, TRAM Inc.

Petersen Frank, Elmos Semiconductor AG

Schilde Bernd, Brose Fahrzeugteile GmbH & Co

Schmidt Ernst, BMW AG

Senske Wilhelm, Daimler Chrysler Corporation

Takasu Yuji, Tokai Rika Co Ltd.

Unger Walter, Daimler Chrysler Corporation

Vanzeveren Vincent, Melexis

Wilson Peter, On Semiconductor

Wulfert Friedrich-W., Freescale Semiconductor

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Contents

1Introduction – Objectives of the Handbook 10

2Scope 11

3Terms, De? nitions, and Abbreviations 12

3.1 Terms and De? nitions

3.2 Abbreviations

4De? nition and Description of Robustness Validation 15

4.1 Robustness Validation Flow

4.2 De? nition of Robustness Validation

4.3 Robustness Diagrams

4.4 Difference between Robustness Validation Approach

and Stress Test Driven Quali? cation Standards

5Mission Pro? le / Vehicle Requirements 21

6Technology Development 26

7Product Development 28

8Potential Risks and Failure Mechanisms 29

8.1 The Knowledge Matrix

8.2 How to Use the Knowledge Matrix

9Creation of the Quali? cation Plan 32

9.1 Reliability Test Plan

9.2 De? nition of a Quali? cation Family

9.2.1 Wafer Fab

9.2.2 Assembly Processes

9.3 Quali? cation Envelope

9.4 Characterization Plan

9.4.1 Process Characterization

9.4.2 Device (Semiconductor Component) Characterization

9.4.3 Production Part Lot Variation Characterization

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10Stress and Characterization 38

11Robustness Assessment 39

11.1 Lifetime t P as a Function of Stress Value S i

11.2 Determine Boundary of the Safe Operating Area

11.3 Determine Robustness Target and Area

11.4 Determine Robustness Margin

12Improvement 44

13Monitoring 47

13.1 Planning

13.2 High Volume Production

14Reporting 49

14.1 Content, Structure

14.2 Documents for Communication, Handouts and General Remarks

15Examples 50

15.1 Examples of the Lack of or Poor Quali? cation

15.1.1 Delamination between Mould Compound and Die/lead Frame

15.1.2 Quali? cation of a New Lead Frame Finish

15.1.3 Via-problems in Semiconductor Component Metallization

15.2 Integrated Capacitor Design

15.3 Requirement Temperature Cycles

16Annex Knowledge Matrix 55

17Annex Reporting Template 55

18References and Additional Reading 56

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1 Introduction – Objectives of the Handbook

Members of SAE International Automotive Electronic Systems Reliability Standards Committee, ZVEI

(German Electrical and Electronic Manufacturers` Association), AEC (Automotive Electronics Council)

and JSAE (Japanese Society of Automotive Engineers) formed a joint task force and met to update

SAE Recommended Practice J1879-October-1988 (General Quali? cation and Production Acceptance

Criteria for Integrated Circuits in Automotive Applications). This version did not describe methods

to demonstrate that a device under test would meet the customer demand for failure levels in the

single-digit parts per million (ppm) range. Additionally, with the old quali? cation “test-to-pass”

approach, there is very little knowledge generated about the relevant component failure mechanisms

that may occur at the boundaries of the speci? cation limits. Extending the old approach to single-

digit ppm levels is unfeasible with respect to both economics and time. A new knowledge-based

approach to understanding and preventing the occurrence of the relevant component failure

mechanisms was required.

The joint task force concluded that the J1879 Recommended Practice should be revised to encompass

a Robustness Validation approach and that an Automotive Electronics Robustness Validation

Handbook should be published. This handbook is based on information from a wide number of

sources including international Automotive OEMs and their full supply chain, engineering societies,

and other related organizations.

This Robustness Validation Handbook provides the automotive electronics community with a common

quali? cation methodology to demonstrate acceptable reliability. The Robustness Validation approach

requires testing the component to failure, or end-of-life (EOL), without introducing invalid failure

mechanisms, and evaluation of the Robustness Margin between the outer limits of the customer

speci? cation and the actual performance of the component.

The principles de? ned in this handbook are also applicable to automotive electronic modules and

systems. Publications addressing these topics are currently under development by the SAE/ZVEI Joint

Task Force.

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2 Scope

This document will primarily address intrinsic reliability of electronic components for use in

automotive electronics. Where practical, methods of extrinsic reliability detection and prevention

will also be addressed. This document primarily deals with integrated circuit issues, but can easily be

adapted for use in discrete or passive component quali? cation with the generation of a list of failure

mechanisms relevant to those devices. Component quali? cation is the main scope of this document.

Other procedures addressing extrinsic defects are speci? cally addressed in the monitoring chapter.

This document is to be used within the context of achieving Zero Defect in component manufacturing

and product use. If the handbook is adopted as a standard, the term “shall” indicates a binding

requirement.

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