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CWP180中文资料

IXYS reserves the right to change limits, test conditions and dimensions Contents

Page Symbols and Definitions 2Nomenclature

2General Information 3A ssembly Instructions

4FRED, Rectifier Diode and Thyristor Chips in Planar Design

IGBT Chips

V CES

I C

G-Series, Low V CE(sat) B2 Types 600 ...1200 V

7 ... 20 A 6G-Series, Fast C2 Types

600 V 7 ... 20 A 6S-Series, SCSOA Capability, Fast Types 600 V

10 ... 20 A 6E-Series, Improved NPT3 technology

1200 ... 1700 V

20 ... 150 A

MOSFET Chips

V DSS

R DS(on)

HiPerFET TM Power MOSFET

70 ...1200 V 0.005 ... 4.5 ?8-10PolarHT TM MOSFET, very Low R DS(on)55 ... 300 V 0.015 ... 0.135 ?

11P-Channel Power MOSFET

-100 ...-600 V 0.06 ... 1.2 ?12N-Channel Depletion Mode MOSFET 500 ...1000 V

30 ... 110 ?

12Layouts

13-17

Bipolar Chips

V RRM / V DRM

I F(AV)M / I T(AV)M Rectifier Diodes 1200 ... 1800 V 12 ... 416 A 18-19FREDs

600 ... 1200 V 8 ... 244 A 20-21Low Leakage FREDs 200 ... 1200 V 9 ... 148 A 22-23SONIC-FRD TM Diodes 600 ... 1800 V 12 ... 150 A 24-25GaAs Schottky Diodes 100 ... 600 V 3.5 ... 25 A 26-27Schottky Diodes

8 ... 200 V 28 ... 145 A 28-31Phase Control Thyristors 800 ... 2200 V 15 ... 540 A 32-33Fast Rectifier Diodes

1600 ... 1800 V

10 ... 26 A

Direct Copper Bonded (DCB), Direct Alu Bonded (DAB) Ceramic Substrates

What is DCB/DAB?35DCB Specification

Symbols and Definitions

C ies Input capacitance of IGBT C iss Input capacitance of MOSFET

-di/dt Rate of decrease of forward current I C DC collector current I D Drain current

I F

Forward current of diode

I F(AV)M Maximum average forward current at specified T h I FSM Peak one cycle surge forward current I GT Gate trigger current I R Reverse current

I RM Maximum peak recovery current I T

Forward current of thyristor

I T(AV)M Maximum average on-state current of a thyristor at specified T h

I TSM Maximum surge current of a thyristor R DS(on)Static drain-source on-state resistance R thjc Thermal resistance junction to case r T

Slope resistance of a thyristor or diode (for power loss calculations) T case Case temperature T h Heatsink temperature

t fi

Current fall time with inductive load T j , T (vj)Junction temperature

T jm , T (vj)m Maximum junction temperature t rr

Reverse recovery time of a diode V CE(sat)Collector-emitter saturation voltage V CES Maximum collector-emitter voltage V DRM Maximum repetitive forward blocking voltage of thyristor

V DSS Drain-source break-down voltage V F Forward voltage of diode V R Reverse voltage

V RRM Maximum peak reverse voltage of thyristor or diode

V T On-state voltage of thyristor

V T0

Threshold voltage of thyristors or diodes (for power loss calculation only)

Chip and DCB Ceramic Substrates Data book Edition 2004

Published by IXYS Semiconductor GmbH Marketing Communications

Edisonstra?e 15, D-68623 Lampertheim

? IXYS Semiconductor GmbH All Rights reserved As far as patents or other rights of third parties are concerned, liability is only assumed for chips and DCB parts per se, not for applications, processes and circuits implemented with components or assemblies. Terms of delivery and the right to change design or specifications are reserved.

Nomenclature

IGBT and MOSFET Discrete

IXSD 40N60A (Example)IX IXYS

Die technology E NPT 3 IGBT

F HiPerFETTM Power MOSFET

G Fast IGBT

S IGBT with SCSOA capability T Standard Power MOSFET D Unassembled chip (die)40Current rating, 40 = 40 A N N-channel type P

P-channel type

60Voltage class, 60 = 600 V

xx MOSFET

A Prime RDS(on) for standard MOSFET Q Low gate charge die

Q2Low gate charge die, 2nd generation P PolarHTTM Power MOSFET L Linear Mode MOSFET IGBT

--No letter, low VCE(sat)A Or A2, std speed type B Or B2, high speed type

Or C2, very high speed type W-CWP 55-12/18(Thyristor Example)W

Package type

C Chip function

C = Silicon phase control thyristor W Unassembled chip P

Process designator

P = Planar passivated chip cathode on top

55Current rating value of one chip in A 12/18

Voltage class, 12/18 = 1200 up to 1800 V

Diode and Thyristor Chips

C-DWEP 69-12(Diode Example)C Package type

D Chip function

D = Silicon rectifier diode W Unassembled chip

Process designator

EP = Epitaxial rectifier diode

N = Rectifier diode, cathode on top P = Rectifier diode, anode on top

FN = Fast Rectifier diode, cathode on top FP = Fast Rectifier diode, anode on top

69Current rating value of one chip in A -12

Voltage class, 12 = 1200 V 001947 TS2/765/17557Registration No.:

001947

IXYS reserves the right to change limits, test conditions and dimensions General Informations for Chips

When mounting Power Semiconductor chips to a header, ceramic substrate or hybrid thick film circuit, the solder system and the chip attach process are very important to the reliability and performance of the final product. This brochure provides several guidelines that describe recommended chip attachment pro-cedures. These methods have been used successfully for many years at IXYS.Available forms of chip packings

IXYS offers various options.

Please order from one of the following possibilities:Packaging Options Delivery form

C-...*Chips in tray (Waffle Pack);Electrically tested

T-...*Chips in wafer, unsawed;Bipolar = 5" (125 mm ?) wafer;Electrically tested, rejects are inked W-...*

Chips in wafer on foil, sawed;

Bipolar = 5" (125 mm ?) wafer;Electrically tested, rejects are inked

...* must be amended by the exact chip type designation.

Packing, Storage and Handling

Chips should be transported in their original containers. All chip transfer to other containers or for assembly should be done only with rubber-tipped vacuum pencils. Contact with human skin (or with a tool that has been touched by hand) leaves an oily residue that may adversely impact subsequent chip attach or reliability.

At temperatures below 104°F (40°C), there is no limitation on storage time for chips in sealed original packages. Chips removed from original packages should be assembled immediately. The wetting ability of the contact metallization with solder can be preserved by storage in a clean and dry nitrogen atmosphere.

The IGBT and MOSFET Chips are electrostatic discharge (ESD) sensitive. Normal ESD precautions for handling must be observed.Prior to chip attach, all testing and handling of the chips must be done at ESD safe work stations according to DIN IEC 47(CO) 701.Ionized air blowers are recommended for added ESD protection.

Contamination of the chips degrades the assembly results.Finger prints, dust or oily deposits on the surface of the chips have to be absolutely avoided.

Rough mechanical treatment can cause damage to the chip.

Electrical Tests

The electrical properties listed in the data sheet presume correctly assembled chips. Testing of

non-assembled chips requires the following precautions:

-High currents have to be supplied homogeneously to the whole metallized contact area.-Kelvin probes must be used to test voltages at high currents

-Applying the full specified blocking or reverse voltage may cause arcing across the glass passivated junction termination, because the electrical field on top of the passivation glass causes ionization of the surrounding air. This phenomenon can be avoided by using

inert fluids or by increasing the pressure of the gas surrounding the chip to values above 30 psig (2 bars).

General Rules for Assembly

The linear thermal expansion coefficient of silicon is very small compared to usual contact metals. If a large area metallized silicon chip is directly soldered to a metal like copper, enormous shear stress is caused by temperature changes (e.g. when cooling down from the solder temperature or by heating during working conditions) which can disrupt the solder mountdown.

If it is found that larger chips are cracking during mountdown or in the application, then the use of a low thermal expansion coefficient buffer layer, e.g. tungsten, molybdenum or Trimetal ?, for strain relief should be considered. An alternative solution is to soft-solder these larger chips to DCB ceramic substrates because of their matching thermal expansion coefficients.

MOS/IGBT Chips

Recommended Solder System

IXYS recommends a soft solder chip attach using a solder composition of 92.5 % Pb, 5 % Sn and 2.5 % Ag. The maximum chip attach temperature is 460°C for MOSFET and 360°C for HiPerFET TM and IGBT.Wire Bonding

It is recommended to use wire of diameter not greater than 0.38 mm (0.015") for bonding to the source emitter and gate pads. Multiple wires should be used in place of thicker wire to handle high drain or emitter currents. See tables for number of recommended wire bonds. At smaller gate pads 0.15 mm is recommended.Thermal Response Testing

To assure good chip attach processing, thermal response testing per MIL STD 750, Method 3161 or equivalent should be performed.

Bipolar Chips

Assembling

IXYS bipolar semiconductor chips have a soft-solderable, multi-layer metallization (Ti/Ni/Ag) on the bottom side and, on top, either the same metallization scheme or an alumunium layer sufficiently thick for ultrasonic bonding. Note that the last layer of metal for soldering is pure silver.

Regardless of their type all chips possess the same glass passivated junction termination system on top of the chip. For that reason they can be easily chip bonded or they can all be simply soldered to a flat contacting electrode in accordance to the General Rules on Page 3. All kinds of the usual soft solders with melting points below 660°F (350°C) can be used thanks to their pure silver top metal.Solders with high melting points are preferable due to their better power cycling capability, i.e. they are more resistant to thermal fatigue.

Soldering temperature should not exceed 750°F (400°C). The maximum temperature should not be applied for more than five minutes.

As already mentioned above the electrical properties quoted in the data sheets can only be obtained with properly assembled chips.This is only possible when all contact materials to be soldered together are well wetted and the solder is practically free of voids.A simple means to achieve good solder connections is to use a belt furnace running with a process gas containing at least 10 %Hydrogen in Nitrogen.

Other approved methods are also allowed, provided that the above mentioned temperature-time-limits are not exceeded and temperature shocks above 930°F/min (500 K/min) are avoided.We do not recommend the use of fluxes for soldering!Ultrasonic Wire Bonding

Chips provided with a thick aluminium layer are designed for ultrasonic wire bonding. Wire diameters up to 500 μm can be used dependent on chip types. Setting wires in parallel and application of stitch bonding lead to surge current ratings comparable to soldered chips.Coating

Although the chips are glass passivated, they must be protected against arcing and environmental influences. The coating material that is in contact with the chip surface must have the following properties:- elasticity (to prevent mechanical stress)

- high purity, no contamination with alkali metals - good adhesion to metals and glass passivation.

Assembly Instructions

IXYS reserves the right to change limits, test conditions and dimensions

FRED, Rectifier Diode and Thyristor Chips in Planar Design

Fast Recovery Epitaxial Diodes (FRED)

Power switches (IGBT, MOSFET, BJT, GTO) for applications in electronics are only as good as their associated free-wheeling diodes. At increasing switching frequencies, the proper functioning and efficiency of the power switch, aside from conduction losses,is determined by the turn-off behavior of the diode (characterized by Q rr , I RM and t rr - Fig. 1.Rectifier Diode and Thyristor Chips

The figures 3 a-c show cross sectional views of the diode and thyristor chips in the passivation area. All thyristor and diode chips (DWN, DWFN,CWP) are fabricated using separation diffusion processes so that all junctions terminate on the topside of the chip. Now the entire bottom surfaces of all chips are available for soldering onto a DCB or other ceramic substrate without a molybdenum strain buffer. The elimination of the strain buffer and its solder joint reduces thermal resistance and increases blocking voltage stability. The junction termination areas are passivated with glass, whose thermal expansion coefficient matches that of silicon. All silicon chips increasingly use planar technology with guard rings and channel stoppers to reduce electric fields on the chip surface.

The contact areas of the chips have vapor deposited metal layers which contribute substantially to their high power cycle capability. All chips are processed on silicon wafers of 5" diameter and diced after a wafer sample test which auto-matically marks chips not meeting the electrical specification.The chip geometry is square or rectangular.

Fig. 3a-c

Cross sections of Chips in the passivation area a) Diode chip, type DWN, DWFN b) Diode chip, type DWP, DWFP c) Thyristor chip, type CWP

The reverse current character-istic following the peak reverse current I RM is another very im-portant property. The slope of the decaying reverse current di rr /dt results from design para- meters (technology and dif-fusion of the FRED chip Fig. 2. In a circuit this current slope, in conjunction with parasitic induc-tances (e.g. connecting leads, causes over-voltage spikes and high frequency interference vol-tages.The higher the di rr /dt ("hard recovery" or "snap-off" behavior) the higher is the resulting additional stress for both the diode and the paralleled switch. A slow decay of the reverse current ("soft recovery" behavior), is the most desirable characteristic, and this is designed into all FRED. The wide range of available blocking voltages makes it possible to apply these FRED as output rectifiers in switch-mode power supplies (SMPS) as well as protective and free-wheeling diodes for power switches in inverters and welding power supplies.

Metalization

Fig. 1:Current and voltage during turn-on and

turn-off

switching of fast diodes

Fig. 2:Cross section of glassivated planar epitaxial diode chip with seperation diffusion (type DWEP)

Epitaxie Sch ich t n -Sub stra t n+Katho

Ano

Guard ring

Substrate n+Epitaxy layer n-

Cathode

Anode Glasspassivation p n n +

Glasspassivation

Guard ring Metalization Fig. 3b)

Metalization

Channel-stopper

Glasspassivation

Guard ring Emitter

Fig. 3c)

Fig. 3a)

Rectifier Diodes

Type

V RRM

DWN 5800 -DWP 51200

DWN 21200 -

DWN 91800

DWN 17 DWP 17DWN 21DWP 21DWN 35DWP 35DWN 50DWP 50DWN 75DWP 75DWN 110DWP 110DWN 340DWN 1081600 -1Mounted on DCB

DWN

DWP

Rectifier Diodes

Type

DWN 5DWP 5DWN 2?DWN 9?DWN 17 ?DWP 17?

DWN 21?

DWP 21?DWN 35?DWP 35?DWN 50?DWP 50DWN 75?DWP 75?DWN 110?DWP 110?DWN 340?DWN 108?s o l d e r a b l e

iodes

Type

V RRM

DWEP 27-02200

DWEP 37-02

DWEP 77-02DWEP 8-06600

DWEP 12-06DWEP 15-06DWEP 23-06DWEP 25-06DWEP 35-06DWEP 55-06DWEP 75-06DWEP 3-101000DWEP 10-10DWEP 18-10DWEP 20-10DWEP 30-10DWEP 50-101 Mounted on DCB

iodes

Type

DWEP 27-02?DWEP 37-02?DWEP 77-02??DWEP 8-06?DWEP 12-06??DWEP 15-06

??DWEP 23-06??

DWEP 25-06??DWEP 35-06??DWEP 55-06?DWEP 75-06?

?DWEP 3-10?DWEP 10-10?DWEP 18-10?DWEP 20-10?DWEP 30-10?

?DWEP 50-10?s o l d e r a b l e

b o n d a b l e

Low Leakage Fast Recovery Epitaxial Diodes

Type

V RRM V

DWLP 4-02200

DWLP 15-02DWLP 15-02B DWLP 25-02DWLP 4-03300

DWLP 8-03DWLP 15-03DWLP 15-03A DWLP 23-03DWLP 23-03A DWLP 55-03DWLP 75-03DWLP 8-04400

DWLP 15-04DWLP 23-04DWLP 55-04DWLP 75-04DWLP 150-04DWLP 4-06600

1Mounted on DCB

Low Leakage Fast Recovery Epitaxial Diodes

Type

DWLP 4-02?DWLP 15-02?DWLP 15-02B ?DWLP 25-02?DWLP 4-03?DWLP 8-03?

DWLP 15-03?DWLP 15-03A ?

DWLP 23-03?DWLP 23-03A ?DWLP 55-03?

?DWLP 75-03?DWLP 8-04?DWLP 15-04?DWLP 23-04?DWLP 55-04??DWLP 75-04??DWLP 150-04?

?DWLP 4-06?s o l d e r a b l e

b o n d a b l e

Diodes

Type

V DWHP 8-06 F in design DWHP 15-06 F 600

DWHP 23-06 F

DWHP 56-06 F DWHP 69-06 F DWHP 150-06 F in design DWHFP 15-12 F 1200

DWHFP 23-12 F DWHFP 56-12 F DWHFP 56-12 S DWHFP 69-12 F DWHFP 69-12 S DWHFP 150-12 S DLFP 55-17 S 1700

DLFP 68-17 S DLFP 150-17 S DLFP 200-17 S 1Mounted on DCB

Diodes

Type

DWHP 8-06 F DWHP 15-06 F DWHP 23-06 F DWHP 56-06 F DWHP 69-06 F DWHP 150-06 F DWHFP 15-12 F DWHFP 23-12 F DWHFP 56-12 F DWHFP 56-12 S

DWHFP 69-12 F DWHFP 69-12 S DWHFP 150-12 S DLFP 55-17 S DLFP 68-17 S DLFP 150-17 S DLFP 200-17 S s o l d e r a b l e

GaAs Schottky Diodes

Type

V RRM

DWGS04-01A 100DWGS10-01C DWGS04-018A 180

DWGS04-018C

DWGS10-018A

DWGS10-018C DWGS20-018A DWGS20-018C DWGS04-025A 250

DWGS04-025C DWGS10-025A DWGS10-025C DWGS20-025A DWGS20-025C DWGS04-03A 300

DWGS04-03C DWGS10-03A

GaAs Schottky Diodes

D W GS04-01A D W GS10-01C

D W GS04-0

18A D W GS04-018C D W GS10-018A D W GS10-018C D W GS20-018A D W GS20-018C D W GS04-025A D W GS04-025C D W GS10-025A D W GS10-025C D W GS20-025A D W GS20-025C D W GS04-03A D W GS04-03C D W GS10-03A s o l d e r a b l e

Schottky Diodes

Type

V RRM

DWS 39-08D DWS 9-15B 15

DWS 19-15B DWS 29-15B DWS 7-30B 30

DWS 17-30B DWS 27-30B DWS 37-30B DWS 217-30B DWS 3-45B 45

DWS 4-45A DWS 13-45B DWS 14-45A DWS 23-45B DWS 24-45A DWS 33-45B 1Mounted on DCB

Schottky Diodes

Type

DWS 39-08D ?

DWS 9-15B ?DWS 19-15B ?DWS 29-15B ?DWS 7-30B ?DWS 17-30B ?DWS 27-30B

?DWS 37-30B ?DWS 217-30B

?DWS 3-45B ?DWS 4-45A ?DWS 13-45B ?DWS 14-45A ?DWS 23-45B ??DWS 24-45A ?DWS 33-45B ??s o l d e r a b l e

b o n d a b l e

Schottky Diodes

Type

V RRM

DWS 5-60A 60

DWS 15-60B

DWS 25-60B DWS 35-60B DWS 25-80B 80DWS 36-80A DWS 2-100A 100

DWS 12-100A DWS 22-100A DWS 32-100A DWS 1-150A 150

DWS 11-150A DWS 21-150A DWS 31-150A DWS 1-180A 1801 Mounted on DCB

Schottky Diodes

Type

DWS 5-60A ?DWS 15-60B ?DWS 25-60B ?DWS 35-60B ?DWS 25-80B ?DWS 36-80A ?DWS 2-100A ?DWS 12-100A ?DWS 22-100A ?

DWS 32-100A ?

?DWS 1-150A ?DWS 11-150A ?DWS 21-150A ?DWS 31-150A ?DWS 1-180A ?s o l d e r a b l e

b o n d a b l e

Phase Control Thyristors

Type

V DRM V RRM

CWP 7-CG 800 -CWP 8

1200

CWP 8-CG CWP 35CWP 16-CG 1200 -CWP 21-CG 1600 -

CWP 22-CG CWP 24CWP 25-CG CWP 411200 -CWP 501800

CWP 55CWP 71CWP 130CWP 180CWP 341CWP 3471Mounted on DCB