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The Next Generation Challenge for Software Defined Radio

The Next Generation Challenge for Software

De?ned Radio

Mark Woh1,Sangwon Seo1,Hyunseok Lee1,Yuan Lin1,Scott Mahlke1,Trevor Mudge1,Chaitali Chakrabarti2,and Krisztian Flautner3

1University of Michigan-Ann Arbor,Ann Arbor MI,USA

2Arizona State University,Tempe,AZ,USA

3ARM Ltd.,Cambridge,UK

Abstract.Wireless communication for mobile terminals has been a high

performance computing challenge.It requires almost super computer per-

formance while consuming very little power.This requirement is being

made even more challenging with the move to Fourth Generation(4G)

wireless communication.It is projected that by2010,4G will be available

with data rates from100Mbps to1Gbps.These data rates are orders of

magnitude greater than current3G technology and,consequently,will

require orders of magnitude more computation power.Leading forerun-

ners for this technology are protocols like802.16e(mobile WiMAX)and

3GPP LTE.

This paper presents an analysis of the major algorithms that comprise

these4G technologies and describes their computational characteristics.

We identify the major bottlenecks that need to be overcome in order to

meet the requirements of this new technology.In particular,we show that

technology scaling alone of current Software De?ned Radio architectures

will not be able to meet these requirements.Finally,we will discuss

techniques that may make it possible to meet the power/performance

requirements without giving up programmability.

1Introduction

The Third Generation Wireless age(3G)has provided an increase in data rate to the user which allows them to experience more than just voice over the air. Fourth Generation(4G)wireless networks is aimed at increasing that data rate by an order of magnitude in order to allow for users to experience richer con-tent and get true mobility,freeing themselves from the need for wires or WiFi networks.The International Telecommunications Union(ITU)released a recom-mendation ITU-R M.1645which sets data rate goals for4G.They proposed a maximum data rate of100Mbps for high mobility situations and1Gbps for sta-tionary and low mobility situations like hot spots.These targets are being used by most research on4G today.It is also envisioned that4G will include earlier standards and their protocols,and that they will work harmoniously together. SDR solutions can help reduce the cost of systems,which are required to support such a wide range of existing wireless technologies.

VBLAST LDPC code TX RX

Antenna

Fig.1.The physical layer for a4G terminal

Previous papers have characterized the computational requirments of3G[1]. There have been several proposals for SDR architectures capable of support-ing3G W-CDMA and802.11physical layers.Examples are Sandbridge’s Sand-blaster[2]and SODA[3].But these architectures are not able to handle the almost10-1000x increase in throughput required for4G systems.This paper outlines the4G physical layer.The aim is to show the requirements that are needed to process the new4G physical layer and also to identify computational patterns that might suggest an architecture that can support4G.

The4G system we will study is based on orthogonal frequency division mul-tiplexing(OFDM)that uses a1024-point FFT/IFFT,a4x416QAM multiple input multiple output(MIMO)antenna system,and a low density parity(LDPC) encoder and decoder.Detailed analysis of the major algorithms that make up these components and their computational characteristics show the following re-peated computational pattern:load data from a memory element(initially this is the received data),permuting that data,performing one or two ALU operations, and storing the processed data back to memory.These patterns are similar to those found in3G kernels.The architectures that are designed to support them, such as SODA,will not be able to meet the4G requirements through technology scaling alone.As we will show,other techniques will have to be enlisted such as wider SIMD engines,special purpose functional units,and special memory systems.

This paper is organized as follows.In the next section,we begin by present-ing a simpli?ed4G system and by describing some of major kernels:an OFDM modulator/demodulator,a MIMO modulator/demodulator,and a channel de-coder for LDPC.In section3,we give a brief overview of SODA and use it as a baseline to identify the dominate workload pro?les and common computational patterns of the kernels.In section4,we present programmable hardware support for implementing these kernels e?ciently to meet the high throughput required for4G.The summary and concluding remarks are given in section5.

24G Physical Layer

Figure1shows a4G wireless terminal.Like other wireless communication sys-tem,its major blocks are a channel encoder/decoder and a modulator/demodulator. The role of the channel encoder is forward error correction that enables receivers

(a)Data movement patterns

x[1]

x[0]

X[1]

X[0]

(b)Computation patterns

Fig.2.The data movement of an8point FFT and the computations in a2point FFT to correct errors without retransmission.Modulation maps input data sequence onto signal waveforms which are speci?cally designed for the wireless channel. Demodulation estimates the transmitted data sequence from the received wave-form,which have been corrupted by noise and interference when they traversed the wireless channel.

In order to satisfy the gigabit level throughput requirement,4G systems employ three techniques not found together in3G:1)orthogonal frequency di-vision multiple access(OFDMA);2)MIMO to support multiple antennas;and 3)LDPC codes for the channel encoder/decoder.

2.1OFDMA

OFDMA is a modulation scheme which transmits input signals over multiple narrow sub-channels.Both modulation and demodulation in OFDMA systems can be implemented with fast fourier transforms(FFT).Although additional synchronization procedures are required in OFDMA receivers,we can ignore them because their contribution is small.

FFT As shown in Figure1,the transmitter uses an inverse FFT(IFFT)for modulation and the receiver uses an FFT for demodulation.Because FFT and IFFT are almost identical,we will just analyze the FFT.

The FFT operation consists of a data movement followed by multiplication and addition on a complex number.If we assume an N point FFT,it consists of log2N stages.As an example,Figure2(a)shows the data movement pattern of an8point FFT.It consists of3stages.Each stage shows a di?erent but regular data movement pattern.The operation of each stage can be divided into several 2point FFT operation as depicted in Figure2(b).

The FFT allows wide data level parallelism because all2point FFT opera-tions required for proceeding from one stage to the next can be done in parallel. It is important to exploit this type of data level parallelism to meet power and performance requirements of4G system,because the FFT width of4G systems can be as large as2048.

(a)Transmission Matrix—the *in-

dicates complex conjugate.

x[0]x[1]x[0]

x[1]y[0]y[1]

y[0]y[1](b)Computation patterns of an STBC encoder

Estimation H 2[1], H 1Y*1[1], Y 1Y*2[1], Y 2[0]Receiver Antenna 1 and 2

X[1], X[0]

(c)Computation pattern of an STBC decoder

Fig.3.Transmission code matrix and computation patterns of the Alamouti 2x2STBC

2.2MIMO

MIMO is a technique that uses multiple antennas both for the transmission and reception.It can be used for two purposes:signal quality enhancement by transmitting identical signal through multiple antennas and channel capacity enhancement by transmitting di?erent signals on multiple antennas.Space time block codes (STBC)is a popular MIMO technique for the signal quality en-hancement and the vertical Bell Laboratories layered space-time (V-BLAST)technique is popular for channel capacity enhancement.

STBC This is used to increase the signal quality by transmitting the same signal multiple times through di?erent antennas.Signal quality is increased by receiving those redundant copies of the same signal and using the information from each receiver to optimally combine them to produce a better signal.The implementation we used is based on Alamouti’s 2x2scheme [4],which uses 2transmit and 2receive antennas.

STBC Encoder The encoder orders and transmits data based on the transmission matrix shown in ?gure 3(a).The operation consists of transmitting two di?erent symbols at the ?rst time instance,then transmitting the conjugate of the same two symbols with antennas switched (see the matrix in ?gure 3(a)).Figure 3(b)shows the computation needed to perform this operation.First the data is sent to each modulator and then the conjugate and negation are performed.This corresponds to a simple predication operation to obtain the real and imaginary

values.This is highly parallelizable,and a1024point FFT could be run in parallel on a1024wide SIMD(Single Instruction,Multiple Data)processor. STBC Decoder The decoder takes the transmitted data from both time instances and combines them together to create the original two symbols.The decoder operation consists of performing complex multiplications between each of the received signals and the channel estimation for each antenna and then summing the values.Figure3(c)shows this operation pattern.Calculating both symbols can be done at the same time with the least amount of data movement.Once again,because subcarriers are totally independent,this algorithm is highly data parallel,and a1024point FFT could be run in parallel on a1024wide SIMD.

V-BLAST This is one of the spatial multiplexing schemes that improves multi-plexing gain by transmitting independent data streams over di?erent antennas. This technique combines multipath signals to obtains higher data rate compared to STBC.The V-BLAST algorithm that was used was based on work from[5] which reduces the computational complexity of V-BLAST.

V-BLAST encoder The V-BLAST encoder is similar to the STBC encoder.It also uses a transmission matrix to decide ordering,conjugating and negating for a block of data.Therefore,the pattern of required operations is:load the real and imaginary received data,permute the data based on the transmission matrix, then negate and store the result before sending it to the OFDM modulators associated with the multiple antennas.The computation pattern would be the same as?gure3(b)except the matrix for V-BLAST is4x4.

V-BLAST decoder The decoding process of V-BLAST consists of two major steps:channel estimation and signal detection.The channel matrix is estimated based on pre-de?ned training symbols.The operations for channel estimation are relatively simple with shift and sign-change operations.Once the channel matrix has been estimated,the detection order is determined.The detection order is based on signal strength found among all the signals received.The strongest signal is selected and extracted from the received signal.This process is repeated for the remaining signals.This process is iterative and is referred to as successive interference cancelation.The signal detecting operations can be described by the following steps:1)load the received signal;2)vector multiplication for obtaining the stongest signal;3)vector multiplication and subtraction for canceling the strongest signal;and4)repeat.

2.3Channel Encoder/Decoder

4G systems are expected to use both Turbo codes and LDPC codes as channel coding schemes.We limit our discussion to the characteristics of the LDPC codes in this section,because Turbo codes have already been used in3G systems and their characteristics have been well documented elsewhere.

Bit Nodes

(a)Graphical representation of LDPC code

New

sign

}

{\)

(

}

{\)

(

min

)

(

New

1. Initialization

2. Bit Node Operation

3. Check Node Operation

4. Bit Update

(b)LDPC decoding in4steps

Fig.4.LDPC graphical representation and decoding operations

LDPC Figure1shows the channel encoder and decoder for LDPC.It is cur-rently used in IEEE802.16e and802.11n.The encoder for LDPC is trivial in the sense that for each LDPC code there are a set of codewords available.For di?erent data rates there are di?erent number of codewords.In order to trans-mit data a codeword is picked and sent through the transmitter.Because the operation is fairly simple we will only discuss the LDPC decoding operation.

Decoding is based on an architecturally aware design for LDPC codes given in[6].The code rates and the block sizes used were based on the IEEE802.16e standard[7]and picked in order to meet the100Mbps and1Gbps target data rate.

The graphical representation of LDPC is shown in?gure4(a).The check nodes represents the number of rows in the parity check code and the bit nodes represent the number of columns.The edges connecting the check nodes and bit nodes are the1’s in the parity check code matrix—all other values are0.The LDPC decoding operation is broken down into4stages as shown in?gure4(b). These four stages are the Initialization,Bit Node,Check Node,and Bit Update operation.This implementation is based on the Min-Sum algorithm.

The major operation in the implementation of LDPC is to?rst load the L n and E n,m values.The next step is to permute the L n’s so they align with the E n,m values.Then it is possible to compute L n,m by performing an subtraction. Finally we do a compare and select to?nd the?rst and second minimum.This operation performs the Bit Node operation and the Check Node operation.The Bit Update operation?rst loads the L n,then it does a comparison to determine whether the location of the minimum E n,m is the same as the L n position.If it is not,then it will use the?rst minimum as the minimum E n,m.Otherwise it will use the second minimum.Finally,it adds the new E n,m value to L n,updating the L n value.This operation is done for each block row of the code.After all block rows have been updated an iteration is complete.

LDPC exhibits considerable data level parallelism.For each E n,m we process one L n at a time.Potentially we can do an N SIMD wide operation for the Bit Node and Check Node operation where N is the number of Check Nodes.

Fig.5.SODA Architecture for SDR

3Computational Analysis

3.1Baseline Architecture

In order to calculate the workload characteristic we took an existing architecture for3G and programmed the4G algorithms onto it.The architecture we used is SODA.The SODA multiprocessor architecture is shown in Figure5.It consists of multiple processing elements(PEs),a scalar control processor,and global scratchpad memory,all connected through a shared bus.Each SODA PE consists of5major components:1)an SIMD pipeline for supporting vector operations;

2)a scalar pipeline for sequential operations;3)two local scratchpad memories for the SIMD pipeline and the scalar pipeline;4)an AGU(address generation unit)pipeline for providing the addresses for local memory access;and5)a programmable DMA unit to transfer data between memories and interface with the outside system.The SIMD pipeline,scalar pipeline and the AGU pipeline execute in VLIW-styled lock-step,controlled with one program counter.

The SIMD pipeline consists of a32-way16-bit datapath,with32arithmetic units working in lock-step.It is designed to handle computationally intensive DSP algorithms.Each datapath includes a2read-port,1write-port16entry reg-ister?le,and one16-bit ALU with multiplier.The multiplier takes two execution cycles when running at the targeted400MHZ.Intra-processor data movements are supported through the SSN(SIMD Shu?e Network).The SIMD pipeline can also take one of its source operands from the scalar pipeline.There are also sev-eral SIMD reduction operations that are supported,including vector summation,?nding the minimum and the maximum.

3.2Workload Pro?le

The breakdown of the major algorithms in our4G protocol is listed in table1. This analysis is based on the algorithms as they would be programmed for the

Algorithm Name 100Mbps Data Rate1Gbps Data Rate MCycle/s MCycle/s

FFT360360

IFFT360360

STBC240-

V-BLAST-1900

LDPC770018500

Table1.Cycle Count of Major4G Kernels on SODA

SODA architecture.We calculated the number of cycles per second needed to support the data rate shown.Referring back to the system diagram in?gure1: for the100Mbps rate we assume the STBC algorithm based on the Alamouti scheme which uses2transmit and2receive paths;and for the1Gbps rate we assume a4transmitter and4receiver multiplexing diversity scheme based on V-BLAST.In the STBC algorithm we require that each receiver performs one FFT but only one STBC decoder for all the receivers.Each receiver is independent of the other’s operation so both FFTs can run on separate processors.For the multiplexing diversity scheme each receiver processes separate data.That means that for the1Gbps data rate we have4independent streams of250Mbps being processed,but still only one V-BLAST decoder has to be performed.

From the table we can see that the channel coding algorithm is the dominate workload.Assuming we were processing each multiplexing diversity stream on one processor it would require us to run SODA at more than10GHz for the 100Mbps case and almost30Ghz for the1Gbps case.An alternative approach would be to have one processor for each kernel.This would mean we would need the maximum frequency of SODA to be8GHZ and20Ghz for the100Mbps and1Gbps cases respectively.Though it may seem that the FFT,IFFT,STBC and V-BLAST algorithms are somewhat negligible compared to the channel coding we should not forget that the workload of channel coding is related to the data rate.As the data rate decreases the workload of the channel coding also decreases but the other kernels do not.At low data rates the other algorithms become comparable in cycle count and the optimization for these algorithms will then be key to an e?cient design.

3.3Computational Patterns

Analysis of each algorithm reveals that there is a consistent computational pat-tern.Table2shows each kernel’s inner loop broken down into simpler operations. The pattern of loading the received data,permuting the data,performing an ALU operation,then a secondary ALU operation and?nally storing the result back is very common to all the algorithms.These patterns make up the majority of the cycle time and are repeated for all the data being streamed in.

Another point to the note is that the data is streamed through the operations. Once the data is consumed we do not refer back to it until the next iteration,

Algorithm Name Load Permute First ALU Op Secondary Op Store FFT X X X X IFFT X X X X STBC X X X X X V-BLAST X X X X X LDPC X X X X X

Table https://www.wendangku.net/doc/417797245.html,putational Pattern of 4G

algorithms

180nm 130nm 90nm 65nm 45nm 32nm 22nm F r e q u e n c y (M h z )P o w e r (W )(a)Technology Scaled SODA

(b)Vdd Voltage Scaling

Fig.6.Technology scaling from 180nm to 22nm with respect to Frequency,Power,Vdd on SODA for 4G

or a summation,or a max/min is performed.Often sequences of operations are performed before having to store results.This suggests that there is little temporal locality of the data.Once the data is consumed we do not expect it to be used again.This is true for most DSP applications [8].

Data alignment is a key problem in each of the algorithms.Each algorithm has to align data before any computation can be performed.In the SODA ar-chitecture we use the SSN which includes a perfect shu?e network to perform this operation.

4Architectural Implications

The frequency that the SODA processor would need to operate at in order to processes 4G was estimated at 20Ghz.Based on data from the ITRS roadmap

[9]and [10]we show in ?gure 6(a)that technology scaling will still leave us a factor of 3x behind in frequency for a given power budget at 22nm.The power budget was set at 3W/mm 2combined for all cores.It is set by limitations of cooling and packaging based on data from ITRS.At 22nm this would be around 1W.Until recently technology scaling has also been accompanied by a scaling in supply voltage.As we get to smaller technology nodes this is no longer the case and the supply voltage is not scalling as much [11].Figure 6(b)shows the decrease in supply voltage with technology node.The table shows that power

consumption will be decreasing more slowly and also that frequency scaling and voltage scaling will be less e?ective in terms of power reduction.

From the?gure we see that at22nm we could support the100Mbps data rate on SODA and still meet the power requirement.The100Mbps solution would require2SODA processors running at10Ghz.If our projections are correct,this is a possible future solution,because the22nm technology node is expected to be in production in2011[12]which coincides with when ITU expects4G networks to be deployed.This still does not leave us with any solution for the1Gbps data rate.However,there are many features of the algorithms which we can exploit architecturally to help us reach the goal of1Gbps and still retain the?exibility of a programmable SDR processor.

Multi-Processor Most of the4G algorithms can be divided onto multiple processors especially for FFT,and STBC,and even LDPC.The workload can be divided evenly among the processors.However,as we subdivide the algorithms across processes we get an increase in data communication.Although each stage of an algorithm is highly data parallel,stages requires data movement between di?erent subcarriers in the FFT and between di?erent check nodes in the LDPC. As we subdivide the algorithms,communication will increase,but,because the operations of each stage are streamed,we may be able to hide the latency of this communication under the computations itself.This would require an e?cient routing and interconnect network and also scheduling that would be able to meet the constraints of data communication when multiple processors are used.

By dividing the workload across multiple processors we would be able to meet the frequency target for the4G1Gbps workload but we would still be3x o?the power budget.Multicore designs themselves cannot solve the problem of meeting the4G requirement.

Wider SIMD Increasing the SIMD width of the processors takes advantage of the highly data parallel nature of the algorithms.Based on historical transistor growth,at the22nm node we can expect to grow from a32wide SIMD to a 2048wide SIMD machine.This assumes a?xed area constraint.This increase in width would allow us to reduce the cycle count to compute any size FFT as long as N is greater than or equal to the SIMD width.For FFT,the data movement can be accomplished by the SSN shu?e network.

For LDPC this increase in SIMD would also be bene?cial because we can process more parity check nodes for LDPC at once.LDPC though would not gain the same data movement advantages as FFT,because it needs to align the check nodes and the bit nodes.However,this would not increase the amount of data movement dramatically.

STBC would also bene?t,because it would be possible to process more sub-carriers at one time.Because there is little data movement within the STBC we can expect gains equal to the increase in width.

Special Purpose Functional Units Currently in SODA the operations are RISC like in that after every instruction is simple and then writes back to the register?le.This can be costly in terms of power and latency,because,as we stated earlier,the algorithms are streaming in nature.Writing back the data may not be very e?cient.This suggests that functional units that chain opera-tions will be bene?cial not only in performance but also power.There has been work[13]that shows that using special functional units to streamline common operational patterns may not only increase performance but also will be more area and energy-e?cient.

LDPC would also bene?t from having special minimum and maximum regis-ters embedded into the ALU.For each row operation of the parity check matrix that is performed the result will be compared with the current state of the register and swapped if the condition is met.In comparison with SODA,by im-plementing this special functional unit,LDPC can be reduce in cycle count by about30percent.

Memory System Most of the algorithms like LDPC,FFT and STBC all treat each row of the SIMD as independent.The data is loaded from memory then permuted and stored back.There is no instance in those algorithms where two rows have to access the same data at the same time.This suggests that the memory system does not have to be a large global shared memory.Instead it can be divided into banks.Banking the memory as much as possible will reduce the cost of reading and writing data into a large global memory.Banking will allow us to reduce the size of each memory,increase the speed,and lower power of the memory system.In algorithms like LDPC,which may need block sizes that are larger than currently used,we would be able to e?ciently scale the size of the memories too.

Algorithms would also bene?t from a smarter memory systems that sup-port?exible gather/scatter accesses.Currently many cycles are wasted in LDPC aligning the check nodes and bit nodes.V-BLAST would also bene?t,because the algorithm has to read and write back data in changing orders.

5Conclusion

The power/performance requirements for4G presents a signi?cant challenge for computer architects,especially if some degree of programmability is to be retained.Currently technology is not capable of processing a4G system on a single processor.In this paper we have analyzed a4G system in the context of the SODA architecture and have shown that3G solutions cannot meet the performance of4G even if technology scaling is taken into account.We have presented architectural options that can improve the performance and reduce the power consumption of4G solutions.We have argued that one solution to the power/performance challenge for4G will increase the number of cores,and that each core will include a very wide SIMD processor with special purpose function units and highly banked memories.

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For-next循环

For... Next 循环语句For…next 循环简称为For 循环。它是一种指定循环次数（事先知道循环次数）的循环程序结构。在这种结构中，使用了一个称为循环变量的特殊变量作为计数器，指定它的初始数值，然后每重复执行一次循环，循环变量就会自动增加或减少一个指定的数值(称为步长值)，直到循环变量的改变达到最终的指定值，循环才停止执行。1．For …Next 语句的语法格式 For <循环变量>=<初值> To <终值> [Step 步长] [语句块] [Exit For ]Next [循环变量] 功能：用来控制重复执行一组语句。指定循环变量以步长为增量，从初值到终值依次取值，并且对于循环变量的每一个值，把语句块执行一次。说明：（1）关键字For 和Next 成对出现，For 是循环语句的开始，Next 是循环语句的终端，必须出现在For 语句的后面。在关键字For 和Next 之间的语句块叫循环体，它们将被重复执行指定的次数，执行的次数由初值、终值、步长值决定。（2）初值、终值和步长值都是数值表达式，步长值可以是正数，也可以为负数。如果步长值为1，可以省略不写，即系统默认步长值为1。（3）<循环变量>为必要参数，是用作循环计数器的数值变量，这个变量不能是数组元素。在循环体内，一般不提倡再给循环变量另外赋值。循环变量从初值开始，逐次按照步长值增加或减少而改变，直到超过终值，这时循环停止执行。这里所说的“超过”有两种含义：即大于或者小于。（4）<初值>和<终值>也都是必要参数。当初值小于终值时，<步长值>必须是正数；反过来，如果初值大于终值，则步长值必须为负数。（5）如果循环体中安排了Exit For 语句，当程序执行到该语句时直接跳出循环结构，不再执行循环体中Exit For 的后续语句（如果有），而是转到Next 后面的其他指令继续执行。（6）Next 语句中的[<循环变量>]可以省略。 2. For... Next 语句的执行过程：进入For...Next 循环后，程序按照以下步骤执行：（1）若初值、终值和步长值为表达式，求出它们的值，并保存起来：资料试卷布置情况与有关高中资料试卷电气系统接线等情况，然后根据规范与规程规定，制定设备调试高中资料试卷方案。

FORNEXT循环语句信息技术

信息技术 - FOR/NEXT循环语句教学设计_高中信息技术2009-10-24 18:33:09来源: 作者:佚名【大中小】浏览:43607次评论:1条 ■以下为本文简介：－－－－－－－－－－－－一、课前分析教学内容：FOR/NEXT循环语句。 1、教材分析 1）教学内容和地位：程序设计是教学中的重点也是难点，循环结构是其中的一种设计结构，其作用是...... 以下为本文简介：－－－－－－－－－－－－一、课前分析教学内容：FOR/NEXT循环语句。 1、教材分析 1）教学内容和地位：程序设计是教学中的重点也是难点，循环结构是其中的一种设计结构，其作用是使一段程序反复执行。FOR/NEXT语句是循环运算的专家，在程序设计中频繁出现。本节课的学习，会使学生对算法有一个更深刻的理解，为实现独立编程起到了关键性作用。 2）教学重点与难点：本节课重点是掌握FOR/NEXT循环语句的格式，并能运用其来编制简单的小程序。难点是解决问题的方法和思路，要绘制好流程图，确定循环变量和循环体。因为用流程图描述算法，能够把解决问题的步骤清晰、直观地表示出来。 2、教学目标分析：１）认知目标：通过FOR/NEXT语句的学习，写出简单的循环程序。

２）能力目标：培养学生分析问题，解决问题的能力。３）情感目标：激发学生学习热情，培养学生学习的积极性。二、教学过程 1、创设问题情境师：同学们，请先看这个图形(画5个竖行排列的“*”)，想想看用以前学过的程序设计语言怎样来编写它的程序呢？(本节程序均设置为单击命令按钮cmdstart运行即代码加在private sub cmdstart_click()) 生（稍做思考，然后回答）：使用PRINT语句 PRINT “*” PRINT “*” PRINT “*” PRINT “*” PRINT “*” 师：同学们做得很好，那么，我想画10行，100行，1000行“*”呢？难道就这样顺序写下去吗？这样编写是不是太繁琐了。如果能让计算机去完成这部分重复的内容，而我们只要告诉计算机重复操作的次数就可以了，这个愿望能否实现呢？能!通过我们今天学习的FOR/NEXT循环语句，就可以很容易的实现这个愿望。 [疑问是建构教学的起点。新课伊始，就提出一个真实的问题，力求创设一种教学情境，它可以激起学生的未知欲，有利于建立新的认识结构。] 2、给出程序，并通过流程图加以理解师出示上题程序代码并通过流程图和卡通图片分析

第13课 For-Next循环

教学设计题目：For-Next循环培训院校：新疆教育学院数信分院专业班级：1132初中信息技术班学号： 1132102118 姓名：胡安太

13.For-Next循环标题：For-Next循环课时：第一课时年级：初三教学重点，难点：使用FOR-Next语句实现循环结构的方法，循环变量。一．教学目标 1.知识目标 (1)循环体，循环控制变量（变量）,了解循环的概念、理解循环结构的基本思想 (2)把握for…next语句的基本结构(循环嵌套，内循环，外循环) (3)理解for…next语句的执行过程；(实现循环结构的方法) 2.素质目标（1）学生学习循环过程中能够培养学生的思考能力（2）学习过程中可以充分发挥学生的逻辑能力。 3.情感目标（1）养成学生独立思考的良好习惯（2）提高学生面对现实，敢于面对失败的意识，加强他人的忍耐性。 (3)通过一个个任务的实战演练，感知使用循环结构解决问题的便捷和优越，培养学生运用循环思想解决实际问题的能力，进一步激发学生学习编程的爱好。 (4) 通过在实际的问题中分析提炼循环结构，从程序设计领域进一步提升学生

的信息素养二．教学过程 1.（1）复习程序的顺序结构前面我们讲过程序的顺序结构，计算机最基本的结构。师：谁能回答，什么是顺序结果？学生：回答上述的问题。如果能回的老师表扬，没有人回答，有老师来复述。（2）复习程序的分支结构师：有时候处理问题时，比如判断一个年份是否闰年，需要根据某个条件进行判断。 1.什么是分支结构？ 2.我们所学的那个语句是分支结构的？ 3.谁能写下来它的格式？学生：让几个学生回答这个问题。如果答对了表扬，答错了，那就老师引导学生回顾那些内容。下面是回顾内容：

For—Next循环语句教学设计(初中信息技术精品)

For—Next循环语句（第一课时）一、学习者分析在此之前，学生已经学习了程序的基本要素、顺序结构、分支结构，对程序结构有了一定的了解和掌握，知道顺序结构和分支结构的区别，同时在学习上也出现了分化。为了不让学生的分化加剧，增加学生的畏难情绪，安排了两个课时进行循序渐进的教学、增加学生的学习兴趣，减弱畏难情绪。二、教材内容分析（一）、本节的主要内容及在本章中的地位本节是广州市信息技术教科书初中第二册第二章第六节循环结构中的For—Next 循环语句。是程序设计初步的重点、难点。由于循环结构相对顺序结构和分支结构比较抽象和不易理解，因此在教学中宜自然地引入For—Next循环语句的功能、格式。（二）、教学重点、难点重点：For—Next循环语句的格式和作用。难点：For—Next循环语句的执行过程和应用。（三）、课时安排：2课时（本节为第一课时）。三、教学目标（一）知识与技能 1、掌握For-Next循环语句的格式。 2、了解For-Next循环语句的作用，理解画同心圆程序的执行过程。 3、理解改变循环变量的值控制循环次数的意义。 4、根据实际情况，能够应用For-Next循环语句修改及编写程序。（二）过程与方法 1、通过观看例子，模仿、修改、编写程序，掌握For-Next循环语句的格式和特点。 2、通过观察、分析画同心圆的程序，逐步掌握For-Next循环语句的执行过程和应用。 3、通过体验探究、思考、讨论等形式，了解For-Next循环语句程序设计在解决问题过程中的方法和作用，学会利用For-Next循环语句处理已知重复次数的循环问题。（三）情感态度与价值观 1、学生通过教师的情景设置以及对程序的体验修改，克服学习过程中的畏难情绪，在不断的探究和思考中培养探索精神，能够真正体验成功的喜悦。 2、学生通过分层次的任务设计，提升学习兴趣、求知欲、对程序设计的兴趣，养成认真、严谨的学习态度和良好的心理素养。四、教学理念和方法本节课教师主要采用的方法包括：体验法、指导法以及任务驱动。体验法是以教师为主导，学生主动探究、亲身体验、思考总结提高，在学习过程中体验学习的乐趣和方法。指导法可以在学生操作过程中观察学生的实际掌握情况，发现存在的问题并及时加以指正。任务驱动可以激发和保持学生的学习兴趣，尽可能多地提供学生动手实践的机会。通过教师的情景设置，不断提高学习任务的梯度，使学生逐步掌握知识，培养学生的实践和创新能力。五、教学资源深蓝易思多媒体教学系统、学生使用的主题网站（包含课堂评价系统）、教师使用的主题网站（包含powerpoint课件和课堂评价的统计系统）、教科书、计算机、投影等。

《For…next循环结构》教学设计

《For…next循环结构》教学设计（修改稿）海口市第一中学王锡君 2007年全国高中信息技术课展评二等奖作品一、教材分析：《for…next循环》选至高中选修教材《算法与程序设计》（教科社版）2.3.3节《循环结构》。教材中《循环结构》主要包含《for…next循环》和《do while…loop循环》等两部分内容，各用一课时，共计两课时。本设计为第1课时。循环结构是最为常用的语法结构之一，也是三大基本结构中难度最大的一个；不仅是本章的重点与难点，也是全书的重点之一。学好程序的基本结构，是学生理解和学习后续章节的基础。二、学情分析：在学习本课之前，学生本应已熟悉VB程序的编程环境与运行方法，了解顺序及选择结构的程序执行流程，具备一定的算法基础和归纳总结能力。但根据安排，授课对象为天津实验中学高一学生，绝大多数学生并接触过程序设计和VB环境，动手能力较差。并且《算法与程序设计》≠某一编程工具（语言）的教学。故本课有意弱化学生在纯VB环境中的代码编写，而重在理解循环结构的基本思想，学会怎样分析循环问题、设计算法，并提炼for语句的基本结构，旨在培养学生根据需要采用循环结构解决实际问题的能力，故任务设置以完善半成品居多。三、教学目标： 1. 知识与技能：

1) 了解循环的概念、理解循环结构的基本思想； 2) 掌握for…next语句的基本结构； 3) 理解for…next语句的执行过程； 4) 尝试采用循环结构编写简单的程序，解决实际问题。 2. 过程与方法：经历分析、实践、讲解、探究、归纳，通过循序渐进、层层深入，逐步深化对循环思想和执行过程的理解。3. 情感、态度与价值观： 1) 通过一个个任务的实战演练，感知使用循环结构解决问题的便捷和优越，培养学生运用循环思想解决实际问题的能力，进一步激发学生学习编程的兴趣。 2) 通过在实际的问题中分析提炼循环结构，从程序设计领域进一步提升学生的信息素养。四、教学重点、难点: 1) 教学重点：①掌握for…next语句的基本结构；②理解for…next语句的执行过程 2) 教学难点：根据需要采用循环结构解决实际问题，并提炼出for语句的基本结构。五、教学方法：讲授演示法、对比分析法、任务驱动法、分层教学法等。六、教学过程：（一）创设情景、激情导入

For-Next循环语句

课题编制计算机程序解决问题 --For/Next循环语句课时一课时课型新授授课人韦开静授课时间2012.3.12 授课班级高一（7）学科信息技术教材分析循环结构是程序设计的三种基本结构之一，是程序设计的基础；它的主要应用方向是让计算机重复做大量相同或相似的事情。教材只是通过SIN函数引出了For/Next循环语句，并没有给出它的语法格式，及其语句的具体执行过程。我认为这样会导致一些学生进行简单模仿，而不是真正的掌握和理解。学生只有熟练掌握了For/Next循环语句的格式，理解循环执行过程，才能在实际应用中游刃有余。所以，本节课我们将学习For/Next循环语句。学情分析教学对象为高一的学生，对程序的接触不太多，前面的课程只讲了程序中的基本元素，初步了解了流程图的画法，但没有通过实际的编程来上机实践。所以，本节课从简单的实例着手，让学生搞清楚什么情况下要去使用循环结构，怎么样来使用它。教学目标1、知识技能目标： ①掌握For/Next循环语句的格式 ②理解For/Next循环语句的功能和执行步骤 2、过程方法目标： ①能够分析简单的For/Next循环语句功能，尝试编写简单的For/Next 循环程序 ②培养学生分析问题，解决问题的能力。 3、情感态度目标：感受用计算机程序解决问题的魅力，激发学生学习程序设计的兴趣。重点掌握For/Next循环语句的格式与执行步骤难点运用For/Next循环语句编制简单的计算机程序解决实际问题教学方式讲授法、任务驱动法、小组协作教学准备多媒体网络教室、PPT 教学过程教学环节教师活动学生活动设计意图复习编制计算机程序解决问题的基本过程：分析问题→算法设计→编写程序 →调试运行→检测结果回答问题唤起学生记忆，为新课做铺垫

For-next循环

For... Next循环语句 For…next循环简称为For循环。它是一种指定循环次数（事先知道循环次数）的循环程序结构。在这种结构中，使用了一个称为循环变量的特殊变量作为计数器，指定它的初始数值，然后每重复执行一次循环，循环变量就会自动增加或减少一个指定的数值(称为步长值)，直到循环变量的改变达到最终的指定值，循环才停止执行。 1．For …Next语句的语法格式 For <循环变量>=<初值> To <终值> [Step步长] [语句块] [Exit For] Next [循环变量] 功能：用来控制重复执行一组语句。指定循环变量以步长为增量，从初值到终值依次取值，并且对于循环变量的每一个值，把语句块执行一次。说明：（1）关键字For和Next成对出现，For是循环语句的开始，Next是循环语句的终端，必须出现在For语句的后面。在关键字For和Next之间的语句块叫循环体，它们将被重复执行指定的次数，执行的次数由初值、终值、步长值决定。（2）初值、终值和步长值都是数值表达式，步长值可以是正数，也可以为负数。如果步长值为1，可以省略不写，即系统默认步长值为1。（3）<循环变量>为必要参数，是用作循环计数器的数值变量，这个变量不能是数组元素。在循环体内，一般不提倡再给循环变量另外赋值。循环变量从初值开始，逐次按照步长值增加或减少而改变，直到超过终值，这时循环停止执行。这里所说的“超过”有两种含义：即大于或者小于。（4）<初值>和<终值>也都是必要参数。当初值小于终值时，<步长值>必须是正数；反过来，如果初值大于终值，则步长值必须为负数。（5）如果循环体中安排了Exit For 语句，当程序执行到该语句时直接跳出循环结构，不再执行循环体中Exit For的后续语句（如果有），而是转到Next后面的其他指令继续执行。（6）Next语句中的[<循环变量>]可以省略。 2. For... Next语句的执行过程：进入For...Next循环后，程序按照以下步骤执行：（1）若初值、终值和步长值为表达式，求出它们的值，并保存起来：

for next语句

For/next语句一、教材分析 For/next语句是《算法与程序设计》中一个重点，也是后面学习面向对象程序设计的一个基础，如何有效教学，跨越这个门槛是我头痛之处，经了解，学生在数学上学习过循环结构，于是，通过整合数学资源实现突破。二、学情分析本节课教学对象是高二学生，通过一段时间的学习，学生已经具备了一定的抽象逻辑思维能力，并处于不断发展的阶段；积累了用计算机编程解决现实中的问题的初步经验。在此基础上学习for/next语句，再加上我校学生基础好，学习态度端正，习惯好。学好本节课内容不算什么难事。三、教学目标 1、知识与技能：（1）、掌握For/Next语句的格式，理解For/Next循环语句的功能和执行步骤（2）、能够分析简单的For/Next循环语句功能，尝试编写简单的For/Next 循环程序 2、过程与方法首先，通过绘制同心圆的问题，让学生发现绘制不同半径的同心圆，反复使用circle函数所带来的麻烦，从而引出for/next语句，进而解决代码重复所带来的麻烦。让学生感到欣喜的同时，渴望知识。其次，通过任务设置进一步掌握for/next语句的使用方法，为学习双层循环做准备。最后，通过打印九九乘法表达到掌握双重循环的目的。 3、情感价值观通过信息技术对其他学科的整合，提高学生学习算法的兴趣，激发学生编程的热情，同时也培养了学生的细心和耐心，加深了对计算机这一工具的认识，也增强了用计算机编程来解决一些无法用人工来计算的问题的信心。四、教学重点与难点 For/next语句的使用方法和功能以及执行步骤。根据实际情况，确定for/next语句的循环变量条件和循环体。五、教学策略本节课首先采用问题探究方法，引导学生发现问题，进而引出for/next语句；其次通过讲授for语句的使用方法和功能，增强学生对for语句的理解；最后通过实践任务的设置来巩固所学，达到学以致用的效果。六、教学环境多媒体机房七、教学过程

For-Next循环语句--(第1课时)

For-Next循环语句--(第1课时) 【适用教材】广东教育出版社《信息技术》册【适用年级】初二年级一、教学内容分析本节课讲授的是For-Next循环语句，因为之前学生学习过顺序结构，分支结构中的条件语句，对编程有了一定的基础，但是循环语句相对于条件语句来说，语法和语句的工作流程都复杂了，所以在讲述For-Next循环语句时，可以让学生分析程序的具体执行过程，引导学生分析For-Next 循环语句是如何实现程序的循环功能的，加深学生对循环功能的实现方法的理解。二、教学对象分析本节课的教学对象是初二学生，因为初二学生的理解能力有限，而这节课涉及的循环语句比较抽象，较难理解，因此在教学中宜比较自然地引入循环语句的功能、格式以及使用方法。并且为了学生更好地理解For-Next语句，尽可能使用程序与流程图结合的方法进行讲解。三、教学目标．初步理解循环结构的定义和作用；．初步掌握循环语句的一般格式；．结合For-Next循环语句的执行流程图理解循环结构

程序的执行过程。四、教学重点以及教学难点理解及初步掌握For-Next循环语句。五、教学过程设计复习程序的顺序结构前面我们讲过程序的顺序结构，计算机最基本的结构。计算机在执行程序时，按照从上往下的顺序依次执行语句，这样的结构称为顺序结构。复习程序的分支结构有时候处理问题时，比如判断一个年份是否闰年，需要根据某个条件进行判断，然后再决定程序的执行过程，这种程序结构称为分支结构。前面我们所学过的If-Then-Else 条件语句就可实现条件的判断。格式：条件语句的执行过程： IfThen Else EndIf 讲述新引入：有时，在解决一些问题时，经常需要重复执行一些操作，

VB程序的基本结构——循环结构之For-Next语句

课题：程序的基本结构——循环结构之For-Next语句第课时课型：新授备课教师授课时间教学目标知识与技能 1、了解循环的概念，理解循环结构的基本思想 2、掌握For-Next语句的基本结构的写法循环变量，初值，终值和步长。 3、理解For-Next语句的执行过程过程与方法 1.通过分析问题，能准确找出循环变量、确定循环结束条件。 2.能利用For-Next语句解决简单的问题。情感态度与价值观 1.通过编写循环结构的程序，体会循环结构的执行过程。 2.通过利用循环思想解决问题，体会循环思想的重要性。教学重点1、理解循环结构的基本思想 2、理解For-Next语句的执行过程教学难点根据需要采用循环结构解决实际问题，并提炼出for语句的基本结构学生理解For-Next语句的执行过程教学准备几个以For-Next语句组成的不同功能的程序教学过程设计教学内容师生教学活动设计备注栏（学生笔记栏）一、设疑导入同学们，请先看这个图形(在窗体左边输出显示竖行排列的1，2，3，4，5)，如果用以前学过的程序设计语言怎样来编写它的程序呢？生（稍做思考，然后回答)：使用Print语句 P rint“1” Print“2” Print“3” Print“4” Print“5” 师：同学们做得很好，，如果想要显示1-10，或是1-100的数字呢？怎么做，难道就这样顺序写下去吗？这样编写是不是太繁琐了。如果能让计算机去完成这部分重复的内容，而我们只要告诉计算机重复操作的次数就可以了，这个愿望能否实现呢？通过我们今天学习的FOR—NEXT循环语句，就可以很容易的实现这个想法。

FOR-NEXT(练习2答案)

用FOR-NEXT循环语句编程序解决下列问题： 1.打印200到300中的整数，要求每行8个数。 For i= 200 to 300 Print I; t=t+1 If t mod 8=0 then print Next i End 2.一个数列如下：0，1，1，2，4，7，…从第四项开始，后面一项总是它前面三项的和，输出这个数列的前20项。 a=0:b=1:c=1 Print a,b,c, For i=4 to 20 d=a+b Print d, a=b b=c c=d Next i End 3.求3位数中所有能被5整除的数的和。 For i=100 to 999 step 5 If I mod 5=0 then s=s+i Next i Print “s=”s End 4.按下列形式输出两位数除以7的整数部分和余数部分。 10 1 3 11 1 4 12 1 5 13 1 6 14 2 0 15 2 1 ………… 99 14 1 For i=10 to 99 A=I mod 7 B=Int(I \ 7) Print a,b Next i end

5.把1到100自然数中的能被7整除的数累加到X中不能被7整除的数累加到Y中。 X=0 : y=0 For i=1 to 100 step 1 If I mod 7=0 then x=x+I else y=y+i Next i Print x , y 6.求5+10+15+……+300的值。 S=0 : t=1 For i=5 to 300 step 5 S=s+i Next i Print “s=”;s end 7. 一个五位数41□72能被8整除，求方框里的数（答案：0，2，4，6，8）。 For i=0 to 9 step 1 X=41*1000+i*100+72 If x mod 7=0 then Print i Next i End 8．打印9*1=9 9*2=18 9*3=27 9*4=39 …… 9*9=81一行乘法表 for i=1 to 9 print 9;”*”;I;”=”;9*I; next i print end 9. 利用循环语句（FOR...NEXT）找出三位数中所有水仙花数。（例如153是水仙花数因为：153=1*1*1+5*5*5+3*3*3）（答案：有四个数）

用for……next语句实现循环.

用for……next语句实现循环于芳一、教学目标知识与技能（1）掌握For-Next语句的格式和功能。（2）理解Fox-Next语句的执行过程，学会使用Fox-Next句解决生活中实际问题。（3）理解for……next语句与do……loop语句的异同。过程和方法（1）经历实践—探究—分析—归纳，理解循环过程，培养探究能力。情感态度与价值观（1）小组合作，培养学生的团队精神。（2）运用循环结构解决生活中实际问题，激发学生对程序设计的学习兴趣。二、教学内容分析：本节是建立在学生已经学习了顺序结构和分支结构，以及循环结构do……loop语句的基础之上，而又为后续的数组学习作了铺垫。多数学生对程序设计兴趣不大，因为学生认为生活离程序设计过于遥远，而且程序设计要求学生的逻辑思维非常强，学生理解比较困难，所以本节课主要从以下几方面着手：注重学习内容和学生特点相结合，注重能力训练与问题解决相联系，只有提出处于“最近发展区的”，“跳一跳”就能摘到的果子，才能激起学生摘取的兴趣，把复杂的问题进行分解，教师仅引领，通过反馈逐步提示教学内容，让学生在亲历情境、亲手操作、亲身体验中掌握知识，发展能力、领悟技术中的思想和方法。三、教学重、难点教学重点：（1）掌握For-Next语句的格式和功能，理解Fox-Next语句的执行过程，学会使用Fox-Next 句解决生活中实际问题。教学难点：（1）理解For—Next循环的执行过程，提高学生运用Fox—Next语句解决生活中实际问题的能力。（2）比较两种循环格式的区别，会使用不同的循环格式解决相应的问题。三、教学过程

Excel VBA编程 For…Next循环

Excel VBA编程For…Next循环 For…next循环语句是计数型循环语句，用于以指定次数来重复执行一组语句，其语法为：For counter = start To end [Step step] [statements] [Exit For] [statements] Next [counter] For …Next循环语句的语法具有以下几个部分： ●counter 必要参数。用于循环计数器的数值变量。这个变量不能是Boolean或数组元素。 ●start 必要参数。counter的初值。 ●End 必要参数，counter的终值。 ●Step 可选参数。counter的步长。如果没有指定，则step的缺省值为1。 ●Statements 可选参数。放在For和Next之间的一条或多条语句，它们将被执行指定的次数。参数step可以是正数或负数。参数step值决定循环的执行情况，如下表7-2所示：当所有循环中的语句都执行后，step的值会加到counter中。此时，循环中的语句可能会再次执行（基于循环开始执行时同样的测试），也可能是退出循环并从Next语句之后的语句继续执行。在循环中改变counter的值，将会使程序代码的阅读和调试变得更加困难。提示下面通过使用For…Next语句创建一个字符串，其内容为由0到9的十个数字所组成的字符串，每个字符串之间用空格隔开。外层循环使用一个变量当作循环计数器，每循环一次，变量值减一，其代码如下： Dim Words, Chars, MyString For Words = 10 To 1 Step -1 ' 建立10 次循环。 For Chars = 0 To 9 ' 建立10 次循环。 MyString = MyString & Chars ' 将数字添加到字符串中。 Next Chars MyString = MyString & " " ' 添加一个空格。 Next Words 在For …Next循环使用过程中，应注意以下两点内容： ●循环中可以在任何位置放置任意个Exit For语句，随时退出循环。 ●可以将一个For…Next循环放置在另一个For…Next循环中，组成嵌套循环。不过在每个循环中的counter要使用不同的变量名。 ●当退出循环后，循环变量的值保持退出时的值。 ●在循环体内对循环控制变量可多次引用，但不要对其赋值，否则会影响原来的循环控制规律。

for…next循环结构教学设计

第四节《计数循环——for…next循环结构》教学设计一、教材分析本课是海南、三环出版社三环出版社《信息技术》九年级上册第二章第四节《数循环——For…Next语句》的内容，学生已经学习了程序设计中的顺序结构和分支结构，，初步掌握了VB程序设计的基本方法。而for-next循环是循环语句中最简单、最常用的一种，本节课是本章的重点内容之一。二、教学目标 1、知识目标：掌握for…next循环语句的格式，理解for…next循环语句的功能和执行过程。 2、技能目标：掌握发for…nextt语句的格式，能够读懂简单的for-next循环程序。 3、情感目标：培养学生对VB程序设计语言的学习兴趣，激发学生学习的主动性和探究性。三、教学重点和难点 1、教学重点：for…next语句的基本格式，循环程序的执行过程。 2、教学难点：for…next 语句的执行过程。四、教学方法教学方法：任务驱动法、讲解演示法、练习法。五、教学过程 1、创设情景、引入课题用速龙多媒体控制平台展示―移动中的汽车‖作为课题的导入。引起学生的兴趣从而激发学生学习的热情。提出小车移动的设计方法及实现的步骤。师：小车移动的方向？生：从左向右移动。师：小车是如何实现从左向右移动的呢？小车在左边位置如何表达？通过看课本解决这个问题。

生：小车是一幅图，它左边位置可以表达为―Image1.left‖，向右移就是Image1.left+1。师、生共同分析问题执行Image1.left=Image1.left+1语句的过程，意思就是取出Image1.left的值，把它加上1，然后把这个值赋值到Image1.left中，使得Image1从当前位置向右移动一个单位的距离，如果我们反复写这个语句代码，Image1就会慢慢向右边移动了。有没有更简单的做法达到这样的效果呢？那就是我们今天所要学习用到的VB的―循环语句‖。师：我们今天来学习循环结构，for-next循环语句。师：利用多媒体教学系统的广播功能讲解for –next循环语句的格式格式：For 循环变量=初值To 终值Step 步长值循环体 Next 循环变量师：展示小车移动的内容（广播教学） Private Sub Command1_click() Image1.left=100 For I = 1 to 5000 step 1 Image1.left=Image1.left+1 Next i End sub 2、探究练习师：请同学们启动VB程序，完成下表的填写。

FORNEXT循环语句教案

FOR/NEXT循环语句教案一、课前分析: 教学内容:FOR/NEXT循环语句。 1、教材分析 1) 教学内容和地位:程序设计是教学中的重点也是难点，循环结构是其中的一种设计结构，其作用是使一段程序反复执行。FOR/NEXT语句是循环运算的专家，在程序设计中频繁出现。本节课的学习，会使学生对算法有一个更深刻的理解，为实现独立编程起到了关键性作用。 2) 教学重点与难点:本节课重点是掌握FOR/NEXT循环语句的格式，并能运用其来编制简单的小程序。难点是解决问题的方法和思路，要绘制好流程图，确定循环变量和循环体。因为用流程图描述算法，能够把解决问题的步骤清晰、直观地表示出来。 2、教学目标分析: ,) 认知目标:通过FOR/NEXT语句的学习，写出简单的循环程序。 ,) 能力目标:培养学生分析问题，解决问题的能力。 ,) 情感目标:激发学生学习热情，培养学生学习的积极性。二、教学重点:FOR/NEXT循环语句的结构、变量、循环体的执行; 三、教学难点:FOR/NEXT循环语句的结构、变量、循环体的执行; 四、教学方法:分析法、演示法、实验法、讨论法等; 五、教学过程: 1、创设问题情境师:同学们，请先看这个图形(画5个竖行排列的“*”)，想想看用以前学过的程序设计语言怎样来编写它的程序呢,(本节程序均设置为单击命令按钮cmdstart 运行即代码加在private sub cmdstart_click()) 生(稍做思考，然后回答):使用PRINT语句PRINT “*”

PRINT “*” PRINT “*” PRINT “*” PRINT “*” 师:同学们做得很好，那么，我想画10行，100行，1000行“*”呢,难道就这样顺序写下去吗,这样编写是不是太繁琐了。如果能让计算机去完成这部分重复的内容，而我们只要告诉计算机重复操作的次数就可以了，这个愿望能否实现呢,能!通过我们今天学习的FOR/NEXT循环语句，就可以很容易的实现这个愿望。 [疑问是建构教学的起点。新课伊始，就提出一个真实的问题，力求创设一种教学情境，它可以激起学生的未知欲，有利于建立新的认识结构。] 2、给出程序，并通过流程图加以理解师出示上题程序代码并通过流程图和卡通图片分析程序代码: cls for I=1 to 5 step 1 print”*” next 师:循环结构也称重复结构，它的作用是使一段程序能重复执行，被重复执行的部分称为循环体。但重复一般都是有条件的，即在满足FOR语句中的条件下才执行循环体，否则退出循环体。下面我们就来看一下FOR/NEXT语句的语句格式: 格式:FOR〈数值变量名〉=〈数学表达式1〉 TO 〈数学表达式2〉 STEP〈数学表达式3〉〈语句序列(循环体)〉 NEXT

FOR NEXT循环语句

FOR/NEXT循环语句教学内容： 1、教材分析 1）教学内容和地位：程序设计是教学中的重点也是难点，循环结构是其中的一种设计结构，其作用是使一段程序反复执行。FOR/NEXT语句是循环运算的专家，在程序设计中频繁出现。本节课的学习，会使学生对算法有一个更深刻的理解，为实现独立编程起到了关键性作用。2）教学重点与难点：本节课重点是掌握FOR/NEXT循环语句的格式，并能运用其来编制简单的小程序。难点是解决问题的方法和思路，要绘制好流程图，确定循环变量和循环体。因为用流程图描述算法，能够把解决问题的步骤清晰、直观地表示出来。 2、教学目标分析： 1）认知目标：通过FOR/NEXT语句的学习，写出简单的循环程序。 2）能力目标：培养学生分析问题，解决问题的能力。 3）情感目标：激发学生学习热情，培养学生学习的积极性。二、教学过程 1、创设问题情境师：同学们，请先看这个图形（画5个竖行排列的“*”），想想看用以前学过的程序设计语言怎样来编写它的程序呢？（本节程序均设置为单击命令按钮cmdstart运行即代码加在private sub cmdstart_click（））生（稍做思考，然后回答）：使用PRINT语句 PRINT“*” PRINT“*” PRINT“*” PRINT“*” PRINT“*” 师：同学们做得很好，那么，我想画10行，100行，1000行“*”呢？难道就这样顺序写下去吗？这样编写是不是太繁琐了。如果能让计算机去完成这部分重复的内容，而我们只要告诉计算机重复操作的次数就可以了，这个愿望能否实现呢？能！通过我们今天学习的FOR/NEXT循环语句，就可以很容易的实现这个愿望。 [疑问是建构教学的起点。新课伊始，就提出一个真实的问题，力求创设一种教学情境，它可以激起学生的未知欲，有利于建立新的认识结构。] 2、给出程序，并通过流程图加以理解师出示上题程序代码并通过流程图和卡通图片分析程序代码： cls for i=1to5 step1 print“*” next

VB中“For…Next循环语句”巧过关

龙源期刊网 https://www.wendangku.net/doc/417797245.html, VB中“For…Next循环语句”巧过关作者：王天霞来源：《读写算·教研版》2016年第08期摘要：随着高考的改革，在高考考点中也逐渐增加了一些新的知识点，比如信息技术学科中的程序设计知识，在高考数学试卷中，以一个的选择题方式呈现，且在数学选修中也增加了程序设计，在信息技术课中若能提前将程序设计知识点掌握，将为后面学习提供更多的时间去学习新知识以及复习，本文将数学中所学的等差数列与For…Next循环语句相结合，进行比较学习，即让学生找到了学习的突破口，又找到了学习知识的关联点，知识的碰撞产生的是融会贯通的花朵。这样更容易使学生掌握新知识，并巩固数学所学知识点，极好的达到了数学与信息技术的整合，也能培养学生在今后的学习中充分使用信息技术解决问题的创新能力，达到巧妙的提升。关键词：信息技术；循环结构；等差数列；巧过关中图分类号：G632 文献标识码：B 文章编号：1002-7661（2016）08-263-02 在信息技术选修课《程算法与程序设计》中，以VB为学习平台，通过学习，可以使同学们对计算机解决问题的过程更为深刻的理解，可以使同学们掌握积极而活跃的思维方式，体会到“重在设计”的理念，大大提高分析与解决问题的能力，同时，算法与程序设计也是一门实践性很强的学科，既充满乐趣也富有挑战性，单纯的传统式学习很难登堂入室，再加上个别学生在初中本就没有打下扎实的信息技术水平和素养，面对本校参差不齐的学生现状，以及信息技术在高考和学业水平考试中的实际情况：信息技术学业水平考试中，操作题占总分的60%，而VB程序设计题也占此60%，其中顺序结构，选择结构和循环结构各占一题。在这三种结构中，尤其以循环结构学生最难掌握。如果我们在讲课时找到突破口，这类题又最容易得分。分析历年来学业水平考试中涉及的循环结构考点，大多数是以求等差数列的前几项和或前几项积为考试内容。那么，在新课知识的讲授中，我们将等差数列的特征和For…Next循环结构进行对比，不难发现其中的对应关系，进行融会贯通，从而一举攻克“循环结构”这个难关，用数学中学习的知识去进行情景设计，以达到学科间相互整合解决问题的能力。一、For…Next循环语句知识在沪版教材《算法与程序设计》第二章第四节活动一中，我们学习了用For…Next语句实现循环结构，明确需要重复执行的操作以及确定控制循环的条件，就能够解决一定次数的循环问题，For…Next语句的具体格式如下：[1] For 循环控制变量=初值 To 终值 [step 步长]

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