英文原文

英文原文

A T89C51 DA TA SHEEP Philips Semiconductors 1999.dec

Description

The AT89C51 is a low-power, high-performance CMOS 8-bit microcomputer with 4K bytes of Flash Programmable and Erasable Read Only Memory (PEROM) and 128 bytes RAM. The device is manufacture d using Atmel’s high density nonvolatile memory technology and is compatible with the industry standard MCS-51? instruction set and pinout. The chip combines a versatile 8-bit CPU with Flash on a monolithic chip, the Atmel AT89C51 is a powerful microcomputer which provides a highly flexible and cost effective solution to many embedded control applications.

Features:

? Compatible with MCS-51? Products

? 4K Bytes of In-System Reprogrammable Flash Memory

? Endurance: 1,000 Write/Erase Cycles

? Fully Static Op eration: 0 Hz to 24 MHz

? Three-Level Program Memory Lock

? 128 x 8-Bit Internal RAM

? 32 Programmable I/O Lines

? Two 16-Bit Timer/Counters

? Six Interrupt Sources

? Programmable Serial Channel

? Low Power Idle and Power Down Modes

The AT89C51 provides the following standard features: 4K bytes of Flash, 128 bytes of RAM, 32 I/O lines, two 16-bit timer/counters, a five vector two-level interrupt architecture, a full duplex serial port, on-chip oscillator and clock circuitry. In addition, the AT89C51 is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes. The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port and interrupt system to continue functioning. The Power Down Mode saves the RAM contents but freezes the oscillator disabling all other chip functions until the next hardware reset.

Block Diagram

Pin Description:

VCC Supply voltage.

GND Ground.

Port 0

Port 0 is an 8-bit open drain bidirectional I/O port. As an output port each pin can sink eight TTL inputs. When is are written to port 0 pins, the pins can be used as high impedance inputs.

Port 0 may also be configured to be the multiplexed loworder address/data bus during accesses to external program and data memory. In this mode P0 has internal pullups.

Port 0 also receives the code bytes during Flash programming, and outputs the code bytes during program verification. External pullups are required during program verification.

Port 1

Port 1 is an 8-bit bidirectional I/O port with internal pullups. The Port 1 output buffers can sink/source four TTL inputs. When 1s are written to Port 1 pins they are pulled high by the internal pullups and can be used as inputs. As inputs, Port 1 pins that are externally being pulled low will source current (IIL) because of the internal pullups.

Port 1 also receives the low-order address bytes during Flash programming and verification.

Port 2

Port 2 is an 8-bit bidirectional I/O port with internal pullups. The Port 2 output buffers can sink/source four TTL inputs. When 1s are written to Port 2 pins they are pulled high by the

internal pullups and can be used as inputs. As inputs, Port 2 pins that are externally being pulled low will source current (I IL) because of the internal pullups.

Port 2 emits the high-order address byte during fetches from external program memory and during accesses to external data memory that use 16-bit addresses (MOVX @ DPTR). In this application it uses strong internal pull-ups when emitting 1s. During accesses to external data memory that use 8-bit addresses (MOVX @ RI), Port 2 emits the contents of the P2 Special Function Register.

Port 2 also receives the high-order address bits and some control signals during Flash programming and verification.

Port 3

Port 3 is an 8-bit bidirectional I/O port with internal pullups. The Port 3 output buffers can sink/source four TTL inputs. When 1s are written to Port 3 pins they are pulled high by the internal pullups and can be used as inputs. As inputs, Port 3 pins that are externally being pulled low will source current (IIL) because of the pullups.

Port 3 also serves the functions of various special features of the AT89C51 as listed below:

Port 3 also

receives some control

signals for Flash

programming and

verification.

RST

Reset input. A

high on this pin for two machine cycles while the oscillator is running resets the device.

ALE/PROG

Address Latch Enable output pulse for latching the low byte of the address during accesses to external memory. This pin is also the program pulse input (PROG) during Flash programming.

In normal operation ALE is emitted at a constant rate of 1/6 the oscillator frequency, and may be used for external timing or clocking purposes. Note, however, that one ALE pulse is skipped during each access to external Data Memory.

If desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH. With the bit set, ALE is active only during a MOVX or MOVC instruction. Otherwise, the pin is weakly pulled high. Setting the ALE-disable bit has no effect if the microcontroller is in external execution mode.

PSEN

Program Store Enable is the read strobe to external program memory.

When the AT89C51 is executing code from external program memory, PSEN is activated twice each machine cycle, except that two PSEN activations are skipped during each access to external data memory.

EA/VPP

External Access Enable. EA must be strapped to GND in order to enable the device to fetch

code from external program memory locations starting at 0000H up to FFFFH. Note, however,

that if lock bit 1 is programmed, EA will be internally latched on reset.

EA should be strapped to VCC for internal program executions.

This pin also receives the 12-volt programming enable voltage(VPP) during Flash programming, for parts that require 12-volt VPP.

XTAL1

Input to the inverting oscillator amplifier and input to the internal clock operating circuit.

XTAL2

Output from the inverting oscillator amplifier.

Oscillator Characteristics

XTAL1 and XTAL2 are the input and output, respectively, of an inverting amplifier which can be configured for use as an on-chip oscillator, as shown in Figure 1. Either a quartz crystal or ceramic resonator may be used. To drive the device from an external clock source, XTAL2 should be left unconnected while XTAL1 is driven as shown in Figure 2. There are no requirements on the duty cycle of the external clock signal, since the input to the internal clocking circuitry is through a divide-by-two flip-flop, but minimum and maximum voltage high and low time specifications must be observed.

Idle Mode

In idle mode, the CPU puts itself to sleep while all the onchip peripherals remain active. The mode is invoked by software. The content of the on-chip RAM and all the special functions registers remain unchanged during this mode. The idle mode can be terminated by any enabled interrupt or by a hardware reset.

It should be noted that when idle is terminated by a hard ware reset, the device normally resumes program execution, from where it left off, up to two machine cycles before the internal reset algorithm takes control. On-chip hardware inhibits access to internal RAM in this event, but access to the port pins is not inhibited. To eliminate the possibility of an unexpected write to a port pin when Idle is terminated by reset, the instruction following the one that invokes Idle should not be one that writes to a port pin or to external memory.

Power Down Mode

In the power down mode the oscillator is stopped, and the instruction that invokes power down is the last instruction executed. The on-chip RAM and Special Function Registers retain their values until the power down mode is terminated. The only exit from power down is a hardware reset. Reset redefines the SFRs but does not change the on-chip RAM. The reset should not be activated before VCC is restored to its normal operating level and must be held active long enough to allow the oscillator to restart and stabilize.

Program Memory Lock Bits

On the chip are three lock bits which can be left unprogrammed (U) or can be programmed (P) to obtain the additional features listed in the table below:

When lock bit 1 is programmed, the logic level at the EA pin is sampled and latched during reset. If the device is powered up without a reset, the latch initializes to a random value, and holds that value until reset is activated. It is necessary that the latched value of EA be in agreement with the current logic level at that pin in order for the device to function properly.

Programming the Flash：

The AT89C51 is normally shipped with the on-chip Flash memory array in the erased state (that is, contents = FFH) and ready to be programmed.The programming interface accepts either a high-voltage (12-volt) or a low-voltage (VCC) program enable signal.The low voltage programming mode provides a convenient way to program the AT89C51 inside the user’s system, while the high-voltage programming mode is compatible with conventional third party Flash or EPROM programmers.

The AT89C51 is shipped with either the high-voltage or low-voltage programming mode enabled. The respective top-side marking and device signature codes are listed in the following

The AT89C51 code memory array is programmed byte-bybyte in either programming mode. To program any nonblank byte in the on-chip Flash Programmable and Erasable Read Only

Memory, the entire memory must be erased using the Chip Erase Mode.

Programming Algorithm:

Before programming the AT89C51, the address, data and control signals should be set up according to the Flash programming mode table and Figures 3 and 4. To program the AT89C51, take the following steps.

1. Input the desired memory location on the address lines.

2. Input the appropriate data byte on the data lines.

3. Activate the correct combination of control signals.

4. Raise EA/VPP to 12V for the high-voltage programming mode.

5. Pulse ALE/PROG once to program a byte in the Flash array or the lock bits. The

byte-write cycle is self-timed and typically takes no more than 1.5 ms. Repeat steps 1 through 5, changing the address and data for the entire array or until the end of the object file is reached.

Data Polling: The AT89C51 features Data Polling to indicate the end of a write cycle. During a write cycle, an attempted read of the last byte written will result in the complement of the written datum on PO.7. Once the write cycle has been completed, true data are valid on all outputs, and the next cycle may begin. Data Polling may begin any time after a write cycle has been initiated.

Ready/Busy: The progress of byte programming can also be monitored by the RDY/BSY output signal. P3.4 is pulled low after ALE goes high during programming to indicate BUSY. P3.4 is pulled high again when programming is done to indicate READY.

Program Verify: If lock bits LB1 and LB2 have not been programmed, the programmed code data can be read back via the address and data lines for verification. The lock bits cannot be verified directly. Verification of the lock bits is achieved by observing that their features are enabled.

Chip Erase: T he entire Flash Programmable and Erasable Read Only Memory array is erased electrically by using the proper combination of control signals and by holding ALE/PROG low for 10 ms. The code array is written with all “1”s. The chip erase operation must be executed before the code memory can be re-programmed.

Reading the Signature Bytes: The signature bytes are read by the same procedure as a normal verification of locations 030H, 031H, and 032H, except that P3.6 and P3.7 must be pulled to a logic low. The values returned are as follows.

(030H) = 1EH indicates manufactured by Atmel

(031H) = 51H indicates 89C51

(032H) = FFH indicates 12V programming

(032H) = 05H indicates 5V programming

Programming Interface

Every code byte in the Flash array can be written and the entire array can be erased by using the appropriate combination of control signals. The write operation cycle is selftimed and once initiated, will automatically time itself to completion.

Note: 1.chip erase requires a 10-ms PROG pulse

Figure 3. Programming the Flash Figure 4. Verifying the Flash

Flash Programming and Verification Characteristics

Note: 1. Only used in 12-volt programming mode.

Flash Programming and Verification Waveforms - High Voltage Mode (VPP = 12V)

Flash Programming and Verification Waveforms - Low Voltage Mode (VPP = 5V)

Absolute Maximum Ratings*

Operating Temperature.................................. -55°C to +125°C

Storage Temperature ..................................... -65°C to +150°C

Voltage on Any Pin

with Respect to Ground .....................................-1.0V to +7.0V

Maximum Operating Voltage............................................. 6.6V

DC Output Current...................................................... 15.0 mA

DC Characteristics

Notes: 1. Under steady state (non-transient) conditions, IOL must be externally limited as follows:

Maximum IOL per port pin: 10 mA

Maximum IOL per 8-bit port: Port 0: 26 mA

Ports 1, 2, 3: 15 mA

Maximum total IOL for all output pins: 71 mA

2. Minimum VCC for Power Down is 2V.

AC Characteristics

(Under Operating Conditions; Load Capacitance for Port 0, ALE/PROG, and PSEN = 100 pF; Load Capacitance for all other outputs = 80 pF)

External Program Memory Read Cycle

External Data Memory Read Cycle

External Data Memory Write Cycle

External Clock Drive Waveforms

Serial Port Timing: Shift Register Mode Test Conditions

Shift Register Mode Timing Waveforms

AC Testing Input/Output Waveforms(1)

Note: 1. AC Inputs during testing are driven at VCC - 0.5V for a logic 1 and 0.45V for a logic 0. Timing measurements are made at VIH min. for a logic 1 and VIL max. for a logic 0.

(1)

Float Waveforms

Note: 1. For timing purposes, a port pin is no longer floating when a 100 mV change from load voltage occurs. A port pin begins to float when 100 mV change from the loaded VOH/VOL level occurs.

Ordering Information

* SFRs are bit addressable.

– Reserved bits.

. Reset value depends on reset source.

综合英语(一)课文及翻译

Lesson One: The Time Message Elwood N, Chapman 新的学习任务开始之际，千头万绪，最重要的是安排好时间，做时间的主人。本文作者提出了7点具体建议，或许对你有所启迪。 1 Time is tricky. It is difficult to control and easy to waste. When you look a head, you think you have more time than you need. For Example,at the beginning of a semester, you may feel that you have plenty of time on your hands, but toward the end of the term you may suddenly find that time is running out. You don't have enough time to cover all your duties (duty), so you get worried. What is the answer? Control! 译：时间真是不好对付，既难以控制好，又很容易浪费掉，当你向前看时，你觉得你的时间用不完。例如，在一个学期的开始，你或许觉得你有许多时间，但到学期快要结束时，你会突然发现时间快用光了，你甚至找不出时间把所有你必须干的事情干完，这样你就紧张了。答案是什么呢？控制。 2 Time is dangerous. If you don't control it, it will control you. I f you don't make it work fo r you, it will work against you. So you must become the master of time, not its servant. As a first-year college student, time management will be your number one Problem. 译：时间是危险的，如果你控制不了时间，时间就会控制你，如果你不能让时间为你服务，它就会起反作用。所以，你必须成为时间的主人，而不是它的奴仆，作为刚入学的大学生，妥善安排时间是你的头等大事。 3 Time is valuable. Wasting time is a bad habit. It is like a drug. The more time you waste,the easier it is to go on wasting time. If seriously wish to get the most out of college, you must put the time message into practice. 译：时间是珍贵的，浪费时间是个坏习惯，这就像毒品一样，你越浪费时间，就越容易继续浪费下去，如果你真的想充分利用上大学的机会，你就应该把利用时间的要旨付诸实践。 Message1. Control time from the beginning. 4 Time is today, not tomorrow or next week. Start your plan at the Beginning of the term. 译：抓紧时间就是抓紧当前的时间，不要把事情推到明天或是下周，在学期开始就开始计划。 Message2. Get the notebook habit. 5 Go and buy a notebook today, Use it to plan your study time each day. Once a weekly study plan is prepared, follow the same pattern every week with small changes. Sunday is a good day to make the Plan for the following week.

英语原文及其翻译

Exploring Filipino School Counselors’ Beliefs about Learning Allan B. I. Bernardo [Abstract] School reform efforts that focus on student learning require school counselors to take on important new roles as advocates of student learning and achievement.But how do school counselors understand the process of learning? In this study, we explore the learning beliefs of 115 Filipino school counselors who indicated their degree of agreementwith 42 statements about the process of learning and the factors thatinfluence this process.A principal components analysis of the responses to the 42 statements suggested three factors:(F1)social-cognitive constructivist beliefs, (F2) teacher-curriculum-centered behaviorist beliefs,and (F3) individual difference factors.The preliminary results are briefly discussed in terms of issues related to how Filipino school counselors’ conceptions of learning may guide their strategies for promoting student learning and achievement. [Key words]beliefs about learning, conceptions of learning, school counselors, student learning, Philippines School reform efforts in different parts of the world have focusedon students’learning. In particular,most school improvement programsnow aim to ensure that students acquire the high-level knowledge and skills that help them to thrive in today’s highly competitive globaleconomy (e.g., Lee & Williams, 2006). I n this regard, school reform programs draw from various contemporary theories and research on learning (e.g.,Bransford,Brown, & Cocking, 1999; Lambert & McCombs, 1998).The basic idea is that all school improvement efforts should be directed at ensuring students achieve high levels of learning or attainment of well-defined curricular objectives and standards.For example, textbooks (Chien & Young, 2007), computers and educational technology (Gravoso, 2002; Haertnel & Means, 2003;Technology in Schools Task Force, 2003), and educational assessment systems (Black & Wiliam2004; Cheung & Ng, 2007; Clark, 2001; Stiggins, 2005) are being reconsidered as regards how they can effectively provide scaffolds and resources for advancing student learning. Likewise,the allocation and management of a school’s financial resources are assessed in terms ofwhether these are effectively mobilized and utilized towards improving student learning (Bolam, 2006; Chung & Hung, 2006; Retna, 2007). In this regard, some advocates have also called for an examination of the role of school counselors in these reform efforts (Herr, 2002). Inthe United States, House and Hayes (2002) challenged school counselors to take proactive leadership roles in advocating for the success of all

文献翻译英文原文

https://www.wendangku.net/doc/4513962357.html,/finance/company/consumer.html Consumer finance company The consumer finance division of the SG group of France has become highly active within India. They plan to offer finance for vehicles and two-wheelers to consumers, aiming to provide close to Rs. 400 billion in India in the next few years of its operations. The SG group is also dealing in stock broking, asset management, investment banking, private banking, information technology and business processing. SG group has ventured into the rapidly growing consumer credit market in India, and have plans to construct a headquarters at Kolkata. The AIG Group has been approved by the RBI to set up a non-banking finance company (NBFC). AIG seeks to introduce its consumer finance and asset management businesses in India. AIG Capital India plans to emphasize credit cards, mortgage financing, consumer durable financing and personal loans. Leading Indian and international concerns like the HSBC, Deutsche Bank, Goldman Sachs, Barclays and HDFC Bank are also waiting to be approved by the Reserve Bank of India to initiate similar operations. AIG is presently involved in insurance and financial services in more than one hundred countries. The affiliates of the AIG Group also provide retirement and asset management services all over the world. Many international companies have been looking at NBFC business because of the growing consumer finance market. Unlike foreign banks, there are no strictures on branch openings for the NBFCs. GE Consumer Finance is a section of General Electric. It is responsible for looking after the retail finance operations. GE Consumer Finance also governs the GE Capital Asia. Outside the United States, GE Consumer Finance performs its operations under the GE Money brand. GE Consumer Finance currently offers financial services in more than fifty countries. The company deals in credit cards, personal finance, mortgages and automobile solutions. It has a client base of more than 118 million customers throughout the world

英文翻译(原文)

GRA VITY RETAINING?WALL 1. INTRODUCTION Retaining walls are structures used to provide stability for earth or other material where conditions disallow the mass to assume its natural slope, and are commonly used to hold back or support soilbanks,coal or ore piles, and water. Retaining walls are classified, based on the method of achieving stability, into six principal types (Fig.1). The gravity-wall depends upon its weight, as the name implies, for stability. The cantilever wall is a reinforced-concrete wall that utilizes cantilever action to retain the mass behind the wall from assuming a natural slope. Stability of this wall is partially achieved from the weight of soil on the heel portion of the base slab. A counterfort retaining wall is similar to a cantilever retaining wall, except that it is used where the cantilever is long or for very high pressures behind wall and has counterforts, which tie the wall and base together, built at intervals along the wall to reduce the bending moments and sheers. As indicated in Fig.1c, the counterfort is behind the wall and subjected to tensile forces. A buttressed retaining wall is similar to a counterfort wall, except that the bracing is in front of the wall and is in compression instead of tension. Two other types of walls not considered further are crib walls, which are built-up members of pieces of precast concrete, metal, or timber and are supported by anchor pieces embedded in the soil for stability, and semigravity walls, which are walls intermediate between a true gravity and a cantilever wall. (a)(b)(e)

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科普版英语六年级下册课文及翻译 (直接打印版)

Lesson 1 I’m not feeling well. Let’s talk （M=Mom, T= Tom） M: What,'s the matter, Tom T: I'm not feeling well, Mom M: Do you have a cold T: Yes, I think so. Could you give me some water, please M: Here you are. T: Thank you, Mom. M: Tom, you must go and see a doctor. T: OK, Mom. M: It's cold outside. You must wear your coat. T: OK, Mom. Could you pass me my coat,please M: Here you are. T: Thank you, Mom M: Tell me your teacher's number. I'll call him and tell him you are sick. T: OK. Here it is. 译文 (M=妈妈,T=汤姆) 妈妈:怎么了,汤姆 汤姆:我感觉不舒服,妈妈。 妈妈:你感冒了吗 汤姆:是的,我想是这样的。您能给我一些水吗 妈妈:给你。 汤姆:谢谢您,妈妈。 妈妈:汤姆,你必须去看医生. 汤姆:好的,妈妈。 妈妈:外面很冷。你必须穿你的外套。 汤姆:好的,妈妈。您能把我的外套递给我吗 妈妈:给你。 汤姆:谢谢您,妈妈。 妈妈:告诉我你老师的电话号码。我将给他打电话告诉他你生病了。

英语翻译专业必翻经典文章英文原文参考译文

文档简介 一，英语翻译经典文章之英文原稿二，中文翻译：这篇英语文章的最好翻译版本！不是俺说的，是俺老师说哒！！ 英文原稿Brian It seems my only request (“please, let me sleep”) is not clear enough, so I made this simple table that can help you when you’re in doubt. Especially during the night

中文翻译小子： 我只想好好地睡觉，你不明白吗？！所以，我做了这个简表。当你不知道怎么办时，特 别是在晚上的时候，你可以看看它。 具体情况行动指南 1，我正在睡觉禁止进入 2，你不确定我是否睡觉，你想搞清楚管你“鸟”事；禁止进入 3，你嗑了药，想奔向我的床你他妈的滚远点 4，你在youtube上看了一个超赞的视频，禁止进入；在脸书上把链接发给我想让我看看 5，就算第三次世界大战开始了管我屁事，他妈的别进来 6，你和你的基友们想和我“玩玩”抱歉，直男一枚。不要碰我的任何东西，门都别碰 7，你想整理我的房间我谢谢你了！我自己会打扫 8，普京宣布同性婚姻合法化终于等到“它”！还好你没放弃！还是不要来我房里！ 9，我不在家进我房间，想都别想 10，白天，我在家。你敲了门，我说“请进” 你可以进来了 福利放送！！

如果你已经看到了这里，那么说明你应该是英文爱好者哦。 下面有一些非常实用，我精心整理的英文资料，你一定用得到！快去看看吧！ 一，最常用英语翻译政治文体句型总结大全完美版 二，英文合同翻译最常用句型总结专业版 三，英语毕业论文提纲模板优秀完整详细无敌版

英文翻译与英文原文.陈--

翻译文献：INVESTIGATION ON DYNAMIC PERFORMANCE OF SLIDE UNIT IN MODULAR MACHINE TOOL （对组合机床滑台动态性能的调查报告） 文献作者：Peter Dransfield, 出处：Peter Dransfield, Hydraulic Control System-Design and Analysis of TheirDynamics, Springer-Verlag, 1981 翻译页数：p139—144 英文译文： 对组合机床滑台动态性能的调查报告 【摘要】这一张纸处理调查利用有束缚力的曲线图和状态空间分析法对组合机床滑台的滑动影响和运动平稳性问题进行分析与研究，从而建立了滑台的液压驱动系统一自调背压调速系统的动态数学模型。通过计算机数字仿真系统，分析了滑台产生滑动影响和运动不平稳的原因及主要影响因素。从那些中可以得出那样的结论，如果能合理地设计液压缸和自调背压调压阀的结构尺寸. 本文中所使用的符号如下： s1-流源，即调速阀出口流量； S el—滑台滑动摩擦力 R一滑台等效粘性摩擦系数： I1—滑台与油缸的质量 12—自调背压阀阀心质量 C1、c2—油缸无杆腔及有杆腔的液容； C2—自调背压阀弹簧柔度； R1, R2自调背压阀阻尼孔液阻， R9—自调背压阀阀口液阻 S e2—自调背压阀弹簧的初始预紧力； I4, I5—管路的等效液感 C5、C6—管路的等效液容： R5, R7-管路的等效液阻； V3, V4—油缸无杆腔及有杆腔内容积； P3, P4—油缸无杆腔及有杆腔的压力 F—滑台承受负载， V—滑台运动速度。本文采用功率键合图和状态空间分折法建立系统的运动数学模型，滑台的动态特性可以能得到显著改善。

英文翻译原文

南京师范大学泰州学院 英文翻译原文 年级： 2011级学号：12110330 姓名：申佳佳 系部：信息工程学院 专业：通信工程 题目：基于C51的数字测速仪设计与仿真 指导教师：焦蓬蓬 2015 年 4 月 5 日

Linux - Operating system of cybertimes Though for a lot of people , regard Linux as the main operating system to make u p huge work station group, finish special effects of " Titanic " make , already can be re garded as and show talent fully. But for Linux, this only numerous news one of. Rece ntly, the manufacturers concerned have announced that support the news of Linux to i ncrease day by day, users' enthusiasm to Linux runs high unprecedentedly too. Then, Linux only have operating system not free more than on earth on 7 year this piece wh at glamour, get the favors of such numerous important software and hardware manufa cturers as the masses of users and Orac le , Informix , HP , Sybase , Corel , Intel , Net scape , Dell ,etc. , OK? 1.The background of Linux and characteristic Linux is a kind of " free (Free ) software ": What is called free, mean users can o btain the procedure and source code freely , and can use them freely , including revise or copy etc.. It is a result of cybertimes, numerous technical staff finish its research a nd development together through Inte rnet, countless user is it test and except fault , c an add user expansion function that oneself make conveniently to participate in. As th e most outstanding one in free software, Linux has characteristic o f the following: (1)Totally follow POSLX standard, expand the network operating system of sup porting all AT&T and BSD Unix characteristic. Because of inheritting Unix outstandi ng design philosophy , and there are clean , stalwart , high-efficient and steady kernels , their all key codes are finished by Li nus Torvalds and other outstanding programmer s, without any Unix code of AT&T or Berkeley, so Linu x is not Unix, but Linux and Unix are totally compatible. (2)Real many tasks, multi-user's system, the built-in n etwork supports, can be with such seamless links as NetWare , Windows NT , OS/2 , Unix ,etc.. Network in various kinds of Unix it tests to be fastest in comparing and ass ess efficiency. Support such many kinds of files systems as FAT16 , FAT32 , NTFS , E x t2FS , ISO9600 ,etc. at the same time .

专业英语原文和翻译

Basic Control Actions and Industrial Automatic Control An automatic controller compares the actual value of the plant output with the desired value, determines the deviation, and produces a control signal which will reduce the deviation to zero or to a small value.The manner in which the automatic conroller produces the control signal is called the control action. Classifications of industrial automatic controllers Induetrial automatic controllers may be classified according to their control action as: ·two-position or on-off controllers; ·proportional controllers; ·integral controllers; ·proportional-plus-integral controllers; ·proportional-plus-derivative controllers; ·proportional-plus-derivative-plus-integral controllers. Most industrial automatic controllers use eletricity or pressurized fluid such as oil or air as power sources. Automatic controllers may also be classified according to the kind of power employed in the operation, such as pneumatic controllers, hydraulic controllers, or electronic controllers.What kind of controller to use must be decided by the nature of the plant and the operating conditions,including such considerations as safety, availability, reliability, accuracy, weight, and size? Elements of industrial automatic controllers An automatic controller must detect the actuating error signal, which is usually at a very low power level, and amplify it to a sufficiently high level. Thus, an amplifier is necessary. The output of an automatic controller is fed to a power device, such as a pneumatic motor or valve, a hydraulic motor, or an electric motor. The controller usually consists of an error detector and amplifier. The measuring element is a device that converts the output variable into another suitable variable, such as a displacement, pressure, or electric signal, which can be used for comparing the output to the reference input signal. This element is in the feedback path of the closed-loop system. The set point of the controller must be converted to a reference input of the same units as the feedback signal from the measuring element. The amplifier amplifies the power of the actuating error signal, which in turn operates the actuator. The actuator is an element which alters the input to the plant according to the control signal so that the feedback signal may be brought into correspondence with the reference input signal. Self-operated controllers In most industrial automatic controllers, separate units are used for the measuring element and for the actuator. In a very simple one, however, such as a self-operated controller, these elements are assembled in one unit. Self-operated controllers utilize power developed by the measuring element and are very simple and inexpensive. The set point is determined by the adjustment of the spring force. The controlled pressure is measured by the diaphragm. The actuating error signal is the net force acting on the diaphragm. Its position determines the valve opening. The operation of self-operated controller is as follows: Suppose that the output pressure is lower than the reference pressure, as determined by the set point. Then the downward spring force is greater than the upward pressure force, resulting in a downward movement of the diaphragm. This increases the flow rate and raises the output pressure.

原文英文

Assessment of immunomodulatory activity of Euphorbia hirta L. K Vijaya Ramesh, K Padmavathi Abstract Immune system is the major target for development of treatment strategies to improve the management of infections. Many species of Indian medicinal plants have been reported to possess active principles with immunomodulating properties. Euphorbia hirta, a pantropic herb has been reported to be pharmacologically active. This study reports one another not widely reported property of the plant, immunomodulatory activity, which has been proved using simple techniques like t he macrophage activity testing, carbon clearance test and mast cell de-granulation assay. Keywords:Candida albicans , Euphobia hirta, mast cells, phagocytosis Plant products have been used in the treatment of human diseases since time immemorial. Indian subcontinent is endowed with a rich flora and more than 1500 plant species have been known to possess therapeutic properties. The modulation of immune response by various herbal formulations in order to alleviate diseases has been of interest over many decades. Many plants have been evaluated for immunostimulant and immunosuppressive properties using simple techniques. The ayurvedic concepts of preventive health care and the therapeutic potential of immunomodulatory agents from plants have been reviewed exhaustively [1] . Azadirachta indica leaf extracts is found to induce cell mediated immune response as seen from the enhancement of macrophage migration inhibition [2] . In human volunteers, it stimulated humoral immunity by increasing antibody levels and cell mediated immunity by increasing total lymphocyte T cell count in 21 days. Euphorbia hirta, a small herb/common garden weed has been reported to have antimicrobial activity specific to enteropathogens [3] . There has been comprehensive reports on the plant (whole plant) to have a 45% immunomodulation activity by way of inhibition of nitric oxide production [4] . In this paper, the in vitro and in vivo immunomodulatory properties of Euphorbia hirta are reported. Euphorbia hirta Linn. locally called 'garden spurge' was used for the study. The plant was locally collected and was authenticated at the Department of Botany, Presidency College, Chennai, India. Voucher specimen was deposited in the Herbarium (#8413). Swiss albino mice, 25-30 g in weight, were used for the in vivo experiments. The animals were maintained in cages at a temperature of 24 o and 10 h light; 14 h dark cycle throughout the experimental period. All the animals were fed a standard diet and water ad libitum. Aerial portion of E. hirta was washed well, inflorescence collected and shade dried. Ethanol was used for extraction since it being a polar solvent could bring into solution all the metabolites present. The shade dried inflorescence of E. hirta (25 g) was immersed in 250 ml of ethanol and was left a room temperature for 24 h. The extract was filtered through Whatman No. 1 filter paper. Solvent was removed completely by evaporation under vacuum. Capillary blood (0.2 ml) was obtained by finger prick method and was placed on a clean grease free glass slide and spread to 1.5Χ1.5 cm. Blood was allowed to clot at 37 o for 25 min. The clot was removed using sterile normal saline. The polymorphonuclear leukocytes (PMN's) were found adhered to the glass surface while the rest of the blood components are washed away. Slides in duplicates were prepared and used for each dilution of the plant extract. Candida albicans was confirmed using germ tube test and was inoculated in Saboraud