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MAX9320EKA-T中文资料

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General Description

The MAX9320/MAX9320A are low-skew, 1-to-2 differen-tial drivers designed for clock and data distribution. The input is reproduced at two differential outputs. The dif-ferential input can be adapted to accept single-ended inputs by applying an external reference voltage.

The MAX9320/MAX9320A feature ultra-low propagation delay (208ps), part-to-part skew (20ps), and output-to-output skew (6ps) with 30mA maximum supply current,making these devices ideal for clock distribution. For interfacing to differential H STL and LVPECL signals,these devices operate over a +2.25V to +3.8V supply range, allowing high-performance clock or data distrib-ution in systems with a nominal +2.5V or +3.3V supply.For differential LVECL operation, these devices operate from a -2.25V to -3.8V supply.

The pinout is the only difference between the MAX9320and MAX9320A. Multiple pinouts are provided to simplify routing across a backplane to either side of a double-sided board.

These devices are offered in space-saving 8-pin SOT23*and industry-standard TSSOP* and SO packages.

Applications

Precision Clock Distribution Low-Jitter Data Repeater Protection Switching

Features

o Improved Second Source of the MC10LVEP11(MAX9320)o +2.25V to +3.8V Differential HSTL/LVPECL Operation

o -2.25V to -3.8V LVECL Operation o Low 22mA (typ) Supply Current o 20ps (typ) Part-to-Part Skew o 6ps (typ) Output-to-Output Skew o 208ps (typ) Propagation Delay o Minimum 300mV Output at 3GHz o Outputs Low for Open Input

o ESD Protection >2kV (Human Body Model)o Available in Thermally Enhanced Exposed-Pad SO Package

MAX9320/MAX9320A

1:2 Differential LVPECL/LVECL/HSTL

Clock and Data Drivers

________________________________________________________________Maxim Integrated Products 1

Pin Configurations

19-2201; Rev 0; 8/01

Ordering Information

*Future product—contact factory for availability.**EP-Exposed pad.

M A X 9320/M A X 9320A

1:2 Differential LVPECL/LVECL/HSTL Clock and Data Drivers 2_______________________________________________________________________________________

ABSOLUTE MAXIMUM RATINGS

DC ELECTRICAL CHARACTERISTICS

(V CC - V EE = +2.25V to +3.8V, outputs loaded with 50?±1% to V CC - 2V. Typical values are at V CC - V EE = +3.3V, V IHD = V CC -

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

V CC to V EE ..........................................................................+4.1V D or D ..................................................V EE - 0.3V to V CC + 0.3V D to D .................................................................................±3.0V Continuous Output Current.................................................50mA Surge Output Current........................................................100mA Junction-to-Ambient Thermal Resistance in Still Air

8-Pin SOT23.............................................................+112°C/W 8-Pin TSSOP............................................................+221°C/W 8-Pin SO...................................................................+170°C/W Junction-to-Ambient Thermal Resistance with 500 LFPM Airflow

8-Pin SOT23...............................................................+78°C/W 8-Pin TSSOP............................................................+155°C/W 8-Pin SO.....................................................................+99°C/W

Junction-to-Case Thermal Resistance

8-Pin SOT23...............................................................+80°C/W 8-Pin TSSOP..............................................................+39°C/W 8-Pin SO.....................................................................+40°C/W Operating Temperature Range ...........................-40°C to +85°C Junction Temperature......................................................+150°C Storage Temperature Range.............................-65°C to +150°C ESD Protection

Human Body Model (D, D , Q_, Q_).................................>2kV Soldering Temperature (10s)...........................................+300°C

MAX9320/MAX9320A

1:2 Differential LVPECL/LVECL/HSTL

Clock and Data Drivers

_______________________________________________________________________________________3

DC ELECTRICAL CHARACTERISTICS (continued)

(V CC - V EE = +2.25V to +3.8V, outputs loaded with 50?±1% to V CC - 2V. Typical values are at V CC - V EE = +3.3V, V IHD = V CC -

AC ELECTRICAL CHARACTERISTICS

(V CC - V EE = +2.25V to +3.8V, outputs loaded with 50?±1% to V CC - 2V, input frequency = 1.5GHz, input transition time = 125ps (20% to 80%), V IHD = V EE + 1.2V to V CC , V ILD = V EE to V CC - 0.15V, V IHD - V ILD = 0.15V to the smaller of 3V or V CC - V EE . Typical

Note 1:Measurements are made with the device in thermal equilibrium.

Note 2:Current into a pin is defined as positive. Current out of a pin is defined as negative.

Note 3:DC parameters production tested at T A = +25°C. Guaranteed by design and characterization over the full operating temper-ature range.

Note 4:All pins open except V CC and V EE .

Note 5:Guaranteed by design and characterization. Limits are set at ±6 sigma.

Note 6:Measured between outputs of the same part at the signal crossing points for a same-edge transition.

Note 7:Measured between outputs of different parts at the signal crossing points under identical conditions for a same-edge transi-tion.

Note 8:Device jitter added to the input signal.

M A X 9320/M A X 9320A

1:2 Differential LVPECL/LVECL/HSTL Clock and Data Drivers 4_______________________________________________________________________________________

AC ELECTRICAL CHARACTERISTICS (continued)

MAX9320/MAX9320A

1:2 Differential LVPECL/LVECL/HSTL

Clock and Data Drivers

_______________________________________________________________________________________5

-15

-40

SUPPLY CURRENT, I EE vs. TEMPERATURE

TEMPERATURE (°C)

S U P P L Y C U R R E N T (m A )

16171819202115

24232522500

25002000150010000

30003500OUTPUT AMPLITUDE, V OH

- V OL

vs. FREQUENCY

FREQUENCY (MHz)

O U T P U T A M P L I T U D E (V )

0.10.20.30.40.50

0.80.70.90.610

-15

-40

TRANSITION TIME vs. TEMPERATURE

TEMPERATURE (°C)

T R A N S I T I O N T I M E (p s )

868788

859091891.4

1.0

3.4

3.0

2.6

2.2

1.8

3.8

PROPAGATION DELAY vs.

HIGH VOLTAGE OF DIFFERENTIAL INPUT, V IHD

V IHD (V)

P R O P A G A T I O N D E L A Y (p s )200205

210195

22022521510

-15

-40

PROPAGATION DELAY vs. TEMPERATURE

TEMPERATURE (°C)

P R O P A G A T I O N D E L A Y (p s )170180190200210160

230240

220Typical Operating Characteristics

(V CC = +3.3V, V EE = 0, input transition time = 125ps (20% to 80%), V IHD = V CC - 1V, V ILD = V CC - 1.5V, f IN = 1.5GHz, outputs loaded with 50?to V CC - 2V, T A = +25°C, unless otherwise noted.)

M A X 9320/M A X 9320A

1:2 Differential LVPECL/LVECL/HSTL Clock and Data Drivers 6_______________________________________________________________________________________

Pin Description (MAX9320A)

MAX9320/MAX9320A

1:2 Differential LVPECL/LVECL/HSTL

Clock and Data Drivers

_______________________________________________________________________________________

Detailed Description

The MAX9320/MAX9320A low-skew, 1-to-2 differential drivers are designed for clock and data distribution. For interfacing to differential H STL and LVPECL signals,these devices operate over a +2.25V to +3.8V supply range, allowing high-performance clock and data distri-bution in systems with a nominal +2.5V or +3.3V sup-ply. For differential LVECL operation, these devices operate from a -2.25V to -3.8V supply.

Inputs

The maximum magnitude of the differential input from D to D is V CC - V EE or 3.0V, whichever is less. This limit also applies to the difference between any reference voltage input and a single-ended input.

The differential inputs have bias resistors that drive the outputs to a differential low when the inputs are open.The inverting input, D , is biased with a 60k ?pullup to V CC and a 100k ?pulldown to V EE . The noninverting input, D, is biased with a 100k ?pulldown to V EE .Specifications for the high and low voltages of the dif-ferential input (V IHD and V ILD ) and the differential input voltage (V IHD - V ILD ) apply simultaneously (V ILD cannot be higher than V IHD ).

Outputs

Output levels are referenced to V CC and are consid-ered LVPECL or LVECL, depending on the level of the V CC supply. With V CC connected to a positive supply and V EE connected to GND, the outputs are LVPECL.The outputs are LVECL when V CC is connected to GND and V EE is connected to a negative supply.

A single-ended input of ±100mV around a reference voltage or a differential input of at least ±100mV switch-es the outputs to the V OH and V OL levels specified in the DC Electrical Characteristics table.

Applications Information

Supply Bypassing

Bypass V CC to V EE with high-frequency surface-mount ceramic 0.1μF and 0.01μF capacitors in parallel as close to the device as possible, with the 0.01μF value capacitor closest to the device. Use multiple parallel vias for low inductance.

Traces

Input and output trace characteristics affect the perfor-mance of the MAX9320/MAX9320A. Connect each signal of a differential input or output to a 50?charac-teristic impedance trace. Minimize the number of vias to prevent impedance discontinuities. Reduce reflec-tions by maintaining the 50?characteristic impedance through connectors and across cables. Reduce skew within a differential pair by matching the electrical length of the traces.

The exposed-pad (EP) SO package can be soldered to the PC board for enhanced thermal performance. If the EP is not soldered to the PC board, the thermal resis-tance is the same as the regular SO package. The EP is connected to the chip V EE supply. Be sure that the pad does not touch signal lines or other supplies.

Contact the Maxim Packaging department for guide-lines on the use of EP packages.

Output Termination

Terminate outputs through 50?to V CC - 2V or use an equivalent Thevenin termination. Terminate both out-puts and use the same termination on each for the low-est output-to-output skew. When a single-ended signal is taken from a differential output, terminate both out-puts. For example, if Q0 is used as a single-ended out-put, terminate both Q0 and Q0.

Chip Information

TRANSISTOR COUNT: 182

Figure 1. Differential Transition Time and Propagation Delay Timing Diagram

Package Information

M A X 9320/M A X 9320A

1:2 Differential LVPECL/LVECL/HSTL Clock and Data Drivers

MAX9320/MAX9320A

1:2 Differential LVPECL/LVECL/HSTL

Clock and Data Drivers

Maxi m cannot assume responsi bi li ty for use of any ci rcui try other than ci rcui try enti rely embodi ed i n a Maxi m product. No ci rcui t patent li censes are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.

Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 _____________________9?2001 Maxim Integrated Products

Printed USA

is a registered trademark of Maxim Integrated Products.

Package Information (continued)