STS3404中文资料
N-Channel E nhancement Mode Field E ffect Transistor
S ep 15 2005
AB S OLUTE MAXIMUM R ATINGS (T A =25 C unles s otherwise noted)
THER MAL CHAR ACTER ISTICS
S TS 3404
1
S amHop Microelectronics C orp.
F E ATUR E S
S uper high dense cell design for low R DS (ON ).
R ugged and reliable.S OT-23 package.
S TS3404
ELECTR ICAL CHAR ACTER ISTICS (T A 25 C unless otherwise noted)
=
2
S TS 3404
Parameter
Symbol
Condition
Min Typ Max Unit
ELECTR ICAL CHAR ACTER ISTICS (T A =25 C unless otherwise noted)
DR AIN-SOUR CE DIODE CHAR ACTER ISTICS Diode Forward Voltage
V SD
V GS = 0V, Is =1.25A
0.82
1.2
V
b
C
Notes
c.Guaranteed by design, not subject to production testing.
b.Pulse Test:Pulse Width 300us, Duty Cycle 2%.F igure 1. Output C haracteristics
F igure 2. Transfer C haracteristics
F igure 4. On-R esistance Variation with Temperature
V G S , G ate-to-S ource Voltage (V)
V DS , Drain-to-S ource Voltage (V)I D , D r a i n C u r r e n t (A )
I D , D r a i n C u r r e n t (A )
a.Surface Mounted on FR4 Board, t 10sec.
10
8
6420
00.51 1.52 2.5
3
3
1.5
1.41.31.21.11.00
050100
150T j( C )
2575125
10
8
6
4
2
0I D , Drain C urrent (A)
R D S (o n ) (m W )
120
1008060
40200
F igure 3. On-R esistance vs. Drain C urrent and
G ate Voltage O n -R e s i s t a n c e R D S (O N ), N o r m a l i z e d
F igure 6. B reakdown V oltage V ariation
with T emperature
V t h , N o r m a l i z e d G a t e -S o u r c e T h r e s h o l d V o l t a g e
B V D S S , N o r m a l i z e d D r a i n -S o u r c e B r e a k d o w n V o l t a g e
I s , S o u r c e -d r a i n c u r r e n t (A )
F igure 8. B ody Diode F orward V oltage
V ariation with S ource C urrent
V S D , B ody Diode F orward Voltage (V)
T j, J unction T emperature ( C )
20
10
1
0.40.60.8 1.0 1.2 1.4
-50-25
25
50
75100125
1.3
1.21.11.00.90.80.7
1.31.21.11.00.90.80.70.6
-50-25
25
50
75
100125S T S 3404
V G S , G ate-S ource Voltage (V)
R D S (o n ) (m W
)
120
10080
6040200
F igure 7. On-R esistance vs.
G ate-S ource Voltage
F igure 5.
G ate T hres hold V ariation
with T emperature
4
F igure 9. C apacitance
V DS , Drain-to S ource Voltage (V)
C , C a p a c i t a n c e (p F )
0 5 10 15 20 25 30
C iss
C oss
500
400300200100
C rss V G S , G a t e t o S o u r c e V o l t a g e (V )
F igure 10.
G ate C harge
Qg, Total G ate C harge (nC )
81064200
1
2 3
4
5
6
7
8
F igure 12. Maximum S afe Operating Area
V DS , Drain-S ource Voltage (V)
I D , D r
a i n C u r r e n t (A )
5010
10.10.03
0.1
1
10
20
50
S T S 3404
F igure 11.s witching characteris tics
R g, G ate R esistance (W )
S w i t c h i n g T i m e (n s )
10
1
1610
60100600
300 5
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F igure 11. S witching Test C ircuit F igure 12. S witching Waveforms
t V V t t d(on)OUT
IN
on
r
10%
t d(off)
90%
10%
10%
50%
50%
90%t off
t f
90%
PULS E WIDTH
INVE R TE D
V V G S
OUT
6
S T S 3404
元器件交易网https://www.wendangku.net/doc/502205286.html,
S T S3404
7
S T S3404
8