当前位置：文档库 › TD028STEB1.pdf

TD028STEB1.pdf

Preliminary Ver 0.30

TFT LCD Specification

Model NO.: TD028STEB1

Customer Signature

Date

The information contained herein is the exclusive property of toppoly Optoelectronics corporation, a nd shall not be

Table of Contents

NO. Item Page

Cover Sheet 1

Table of Contents 2

Record of Reversion 3

1 Features 4

2 General Specification 4

3 Input / Output Terminals 5

4 Absolute Maximum Ratings 8

5 Electrical Characteristics 9

6 Block Diagram 11

7 Timing Chart 14

8 Power On/Off Sequence 17

9 Optical Characteristics 19

10 Reliability 22

11 Handling Cautions 24

12 Mechanical Drawing 27

13 Packing Drawing 28

The information contained herein is the exclusive property of toppoly Optoelectronics corporation, a nd shall not be

Record of Reversion

Rev Issued Date Description

0.00 Sep, 1, 2004 New

0.10 Nov, 10, 2004 1.Modify 2.Weight: from TBD to 35(Max).

2.Modify 3-1.Gate Off Voltage from -5.2V ~ -5.8V to -5.5~-4.5V,

Typ. from -5.5 to -5V

3.Modify 3-1 Digital Supply Power from2.7V ~ 3.0V to 2.5~3.0V,

Typ. from 2.85V to 2.8V

4.Modify 5-1 Logic Supply Voltage: VDD1 & VDD2 MAX from 3.5V to 3V.

5.Modify 5-4 Driving touch panel:

Resistor between terminals (XR-XL):

MIN from 300￡[to 250￡[, MAX from 1000￡[to 950￡[

6. Add IC using statement in Page12:

(1) If choice DC-DC disable --> need to add a schottky diode between

VDD2 (Analog power supply) & VGH in customer’s system-board.

(2) If choice DC-DC enable --> don't need to add component in customer’s

system-board.

7.In Mechanical Drawing:

Define Module label & Backlight label position & dimension

0.20 Dec, 13, 2004 1. 5.1 Driving TFT LCD Panel:

Define VDD1, VDD2 & AVDD & VGH & VVEE Supply Current

2. 5.2 DC/DC Spec:

Define VDD2 & AVDD & VGH & VVEE Input Current &Input ripple (Max)

3. Add Surface hardness value: MIN 3H in 5.4 Driving touch panel

4. Add application circuit diagram & Delete IC using statement in Page 12

5. Modify 8 Power ON/OFF sequence

6. Delete 9.1(1): NTSC

7. Modify 9.1(2): Chromaticity (TYP) & Remark of Chromaticity from Note 9-3

to 9-9 & Add Note 9-9 White chromaticity as back light on (Measure

System B)

8. Modify 9.2(4): Testing Facility:

Environmental illumination from =10Lux to = 1Lux

0.30 Feb, 15, 2005 1. Modify 5-1 Logic Supply Voltage: VDD1 & VDD2 MAX from 3V to 3.3V

2. Update 7.1 Display timing & 7.3 Setup / Hold timing

3. Add Note2: Maximum rising time of VDD1/VDD2 is 2ms in power on

sequence of page18.

4. Update 9 Optical Characteristics

5. Update Mechanical Drawing: Update position of Module & Backlight label The information contained herein is the exclusive property of toppoly Optoelectronics corporation, a nd shall not be

1. FEATURES

The 2.8 inch (real 2.83 inch) LCD module is the Transflective active matrix color TFT LCD module.

LTPS (Low Temperature Poly Silicon) TFT technology is used and COG design are built on the panel.

Highly integrated LCD module includes touch panel, backlight and TFT LCD panel with minimal external circuits and components required.

2. GENERAL SPECIFICATION

Item Description Unit Display Size (Diagonal) 2.8 inch (real 2.83 inch) -

Display Type Transflective -

Active Area (HxV) 43.2 X 57.6 mm

Number of Dots (HxV) 240 x RGB x 320 dot

Dot Pitch (HxV) 0.06 X 0.180 mm

Color Arrangement RGB Stripe -

Color Numbers 262,144 (18 bits) -

Outline Dimension (HxVxT) 52.9X 71.7 X 4.2 (FPC excluded) mm

Weight 35 (Max) g

LCD Panel + System 23 (Typ)

Power consumption

Backlight 288 (Typ, I F= 20mA)

The information contained herein is the exclusive property of toppoly Optoelectronics corporation, a nd shall not be

3. INPUT/OUTPUT TERMINALS

3.1 TFT LCD module

Recommend connector: FH23-61S-0.3SHW, HIROSE

Pin Symbol I/O Description

Remark 1 DE IN Data Enable Signal 2 MCLK IN LCM Pixel Clock 3 ENABLE IN IC Reset Signal 4 TSP1 OUT TSP Interface Signal Y2

5 DVSS IN Digital Ground

6 VCOM_I

7 VCOM_I IN VCOM Input

8 AVSS IN Analog Ground

9 VVEE 10 VVEE IN Gate Off Voltage, -5.5~-4.5V , Typ. -5V

11 VGH 12 VGH IN Gate On Voltage, 9.5V ~ 10.5V, Typ. 10V

13 DVSS IN

Digital Ground

14 TSP2 OUT TSP Interface Signal X2 15 VCOM_H OUT Positive Power Output for VCOM

16 VCOM_O 17 VCOM_O OUT VCOM Output

18 VCOM_L OUT Negative Power Output for VCOM 19 AVSS IN Analog Ground

20 DVDD 21 DVDD IN Digital Supply Power, 2.5V~3.0V , Typ. 2.8V 22 AVDD 23 AVDD IN

Analog Supply Power, 4.8V ~ 5.6V, Typ. 5.0V

24 TSP3 OUT TSP Interface Signal Y1 25 DVSS IN

Digital Ground

26 IV6P OUT Negative Voltage Output Pad 27 TSP4 OUT TSP Interface Signal X1 28 DVDD IN Digital Supply Power, 2.5~3.0V , Typ. 2.8V 29 PD17 R5 (Red MSB) 30 PD16 R4 31 PD15 R3 32

PD14

The information contained herein is the exclusive property of toppoly Optoelectronics corporation, a nd shall not be 33 PD13

R1 34 PD12 IN

R0 (Red LSB) 35 PD11 G5 (Green MSB) 36 PD10 G4 37 PD9 G3 38 PD8 G2 39 PD7 G1

40 PD6 IN

G0 (Green LSB) 41 PD5 B5 (Blue MSB) 42 PD4 B4 43 PD3 B3 44 PD2 B2 45 PD1 IN

B1 46 PD0 IN B0 (Blue LSB)

47 ISC OUT Capacitor Connection Pad

48 DVSS(SCL) IN Digital Ground(Serial interface clock input) 49 DVSS(SDA) IN/OUT Digital Ground(Serial interface data input/output)

50 DVSS(CS) IN Digital Ground(Serial interface chip select input) 51 DVSS IN Digital Ground 52 HSYNC IN Horizontal SYNC Input

53 DVSS 54 DVSS(CM)

Digital Ground(Display mode select)

55 VS OUT Positive Power Output for Source Driver 56 VSYNC IN Vertical SYNC Input

57 MAIN_LED+ 58 MAIN_LED+ IN LED Power (Anode) 59 MAIN_LED- 60 MAIN_LED- OUT LED Power (Cathode)

DVSS

Digital Ground

The information contained herein is the exclusive property of toppoly Optoelectronics corporation, a nd shall not be 3.2 Touch panel Pin

Touch Panel

Pin Module

Pin Symbol

Description

Remark

1 27 X1 Touch Panel Right Side

2 24 Y1 Touch Panel Lower Side

3 1

4 X2 Touch Panel Left Side 4

Touch Panel Upper Side

Pin Assignment for Touch panel

4.ABSOLUTE MAXIMUM RATINGS

GND=0V

Item Symbol MIN MAX Unit

Remark

VDD1, VDD2 -0.3 3.6 V Logic Supply Voltage

AVDD -0.3 6.0 V

VGH-0.3 19 V Power Supply for H/V Driver

VVEE-0.3 19 V Touch Panel Operation Voltage V Touch - 5 V

Backlight LED forward Voltage V F- 14.4 V

Backlight LED reverse Voltage V R- 20 V

Backlight LED forward current

(Ta=25￠J)

I F- 25 mA Note

Operating Temperature Topr -20 +60 ￠J

Storage Temperature Tstg -30 +70 ￠J

Note:Relation between maximum LED forward current and ambient temperature is showed as bellow.

The information contained herein is the exclusive property of toppoly Optoelectronics corporation, a nd shall not be

5.ELECTRICAL CHARACTERISTICS

5.1 Driving TFT LCD Panel Ta=25￠J

Item Symbol MIN TYP MAX Unit Remark

VDD1 1.6 2.8 3.3 V

VDD2 2.5 2.8 3.3 V Logic Supply Voltage

AVDD 4.8 5.0 5.6 V

VGH 9.5 10 10.5 V Power Supply for H/V Driver

VVEE -5.5 -5.0 -4.5 V

High VIH 0.8VDD1 - VDD1

Data Input Voltage

Low VIL GND - 0.2VDD1 V

R[5:0], G[5:0],

B[5:0], CLK

DE VDD1, VDD2 Supply Current I VDD1-- 0.7 1.7 mA Note 1 AVDD Supply Current I AVDD-- 1.85 4.0 mA Note 2 VGH Supply Current I VDD-- 0.07 0.3 mA

VVEE Supply Current I VEE-- 0.05 0.5 mA

Note 1: The typical supply current specification is measured at the line inversion test pattern (black and white interlacing horizontal lines as the diagram shown below)

Note 2: Gamma correction voltage is set to achieve the optimun at VCC5=5.0V. Use the voltage at level as close to 5.0V as possible.

5.2DC/DC Spec Ta=25￠J

Input voltage

Item

MIN TYP MAX

Input Current Input ripple (Max) Remark VDD2 2.5 2.8 3.0 0.05 --

AVDD 4.8 5.0 5.6 1.85 50mV Note 1 VGH 9.5 10.0 10.5 0.07 150mV

VVEE -5.5 -5.0 -4.5 0.05 --

Note 1: VCC5 is analog voltage supply therefore use as less ripple as possible.

The information contained herein is the exclusive property of toppoly Optoelectronics corporation, a nd shall not be

5.3Driving backlight Ta=25￠J

Item Symbol MIN TYP MAX Unit Remark Forward Current I F - 20 25 mA LED/Part LED Life Time - - 10000 Hr I F: 20mA

Forward Current Voltage V F - 14.4 16 V I F: 20mA ,LED/Part Note: Backtlight driving circuit is recommend as the fix current circuit.

5.4 Driving touch panel (Analog resistance type) Ta=25￠J

Item Symbol MIN TYP MAX Unit Remark Resistor between terminals (XR-XL) Rx 250 650 950 ￡[

Resistor between terminals (YU-YL) Ry 250 600 950 ￡[

Operation V oltage V Touch- 5 - V DC Line Linearity (X direction) - - 1.5 - %

Note 1 Line Linearity (Y direction) - - 1.5 - %

Chattering - - 10 - ms

Surface Hardness - 3 - - H JIS K 5600 Minimum tension for detecting - - - 80 g

Insulation Resistance Ri 20 - - M￡[At DC 25V Note 1. The minimum test force is 80 g.

6. BLOCK DIAGRAM

The information contained herein is the exclusive property of toppoly Optoelectronics corporation, a nd shall not be

Application Circuit Diagram

Image sticking circuit:

DC/DC disable model (DC_ENB=High)

The information contained herein is the exclusive property of toppoly Optoelectronics corporation, a nd shall not be

7. TIMING CHART

7.1 Display timing

Ratings

Display Mode

Parameter Symbol Conditions

MIN TYP MAX

Unit Vertical cycle VP- 323 326 340 Line

Vertical data start VDS

VS+VBP

?D 4 ?D Line

Vertical front porch VFP

?D 2 ?D Line Vertical back portch VBP ?D 2 ?D Line

Vertical active area VDISP - ?D 320 ?D Line Horizontal cycle HP - 260 280 300 dot Horizontal front porch HFP - ?D 10 ?D dot Horizontal Sync Pulse width HS - ?D 10 ?D dot Horizontal Back porch HBP ?D 20 ?D dot Horizontal Data start HDS HS+HBP ?D 30 ?D dot Horizontal active area HDISP - ?D 240 ?D dot

5.02 5.48 5.93 MHz

Normal

Clock frequency tclk

fclk

199 183 169

The information contained herein is the exclusive property of toppoly Optoelectronics corporation, a nd shall not be

7.2 Input timing chart

??Vertical Timing chart??

??Horizontal Timing chart??

*1The frequency of CLK should keep in the range as input timing chart determined whether in display or blanking region to ensure IC operating normally.

The information contained herein is the exclusive property of toppoly Optoelectronics corporation, a nd shall not be

The information contained herein is the exclusive property of toppoly Optoelectronics corporation, a nd shall not be 7.3 Setup / Hold Timing chart

Ratings

Parameter

Symbol Conditions

MIN

TYP

MAX

Unit

Vertical Sync. Setup time tvsys 20 - - ns Vertical Sync. Hold time tvsyh 20 - - ns Horizontal Sync. Setup time thsys 20 - - ns Horizontal Sync. Hold time thsyh 20 - - ns Phase difference of Sync. Signal Falling edge(Note1)

thv 240x320

-(tVSW-1)

- 1Hcycle-1

clk Clock “L” Period tckl 75 - - % Clock “H” Period tckh 75 - - % Data setup time tds 20 - -- ns Data Hold time

tdh

Note1: Thv range if it can't met our spec, just give up first Hsync. It can't impact any side effect.

8. Power On/Off Sequence

1. Power On Sequence (with DC/DC supply outward & SD fixed at low)

Power on sequence is controlled by SD or RESETB signal (fVSYNC=60Hz)

Note1: In some application, SD signal fixed at “low” level during power on. ASIC should produce white pattern when receiving10th S. And internal power regulator should function normally.

Note2: Maximum rising time of VDD1/VDD2 is 2ms.

The information contained herein is the exclusive property of toppoly Optoelectronics corporation, a nd shall not be

2. Power Off Sequence (with DC/DC supply outward & SD fixed at low )

Power off sequence is controlled by SD signal

Note: In some application, SD signal fixed at “low” level during power on. ASIC should produce white pattern when receiving10th S. And internal power regulator should function normally.0V

0V 0V 0V

The information contained herein is the exclusive property of toppoly Optoelectronics corporation, a nd shall not be

The information contained herein is the exclusive property of toppoly Optoelectronics corporation, a nd shall not be 9. Optical Characteristics

9.1 Optical Specification

(1) Back light Off / w Touch panel

Ta=25￠J

Item

Symbol Condition MIN TYP MAX Unit Remarks

T 11(R)

35 45 - T 12(L) 25 35 - T21(U) 35 45 - Viewing Angles

T22(D)

CR = 2 35 45 - Degree Note 9-1

x 0.275 0.310 0.345 - Chromaticity White

￡K=0° 0.290 0.330 0.370 - Note 9-3 Contrast Ratio CR ￡K=0° 5:1 10:1 - - Note 9-2 Reflectivity R

￡K=0°

Note 9-4

(2) Back Light On /w Touch panel

Ta=25￠J

Item

Symbol Condition MIN TYP MAX Unit Remarks

T 11(R)

40 45 - T 12(L) 35 40 - T21(U) 55 60 - Viewing Angles

T22(D)

CR = 10 30 35 - Degree Note 9-1

Response Time Tr+Tf ￡K=0° - 35 50 ms Note 9-5 Contrast Ratio CR ￡K=0° 90:1 150:1 - - Note 9-6 Luminance L ￡K=0° I F =20mA

125 150 - cd/m 2 Note 9-7 NTSC - - 40 45 - % Note 9-7 Uniformity

- -

75 80 - %

Note 9-8

x 0.533 0.568 0.603 Red y 0.305 0.345 0.385 x 0.265 0.300 0.335 Green

y 0.529 0.569 0.609 x 0.111 0.146 0.181 Blue y 0.093 0.133 0.173 x 0.260 0.295 0.330 Chromaticity

White

￡K=0°

0.283

0.323

0.363

- Note 9-9

9.2 Basic measure condition

(1) Driving voltage

VDD= 12.0V, VEE=-6.5V

(2) Ambient temperature: Ta=25￠J

(3) Testing point: measure in the display center point and the test angle ￡K=0￠X

(4) Testing Facility

Environmental illumination: = 1 Lux

a. System A

Light

b. System B

TFT LCD Module with

back light & touch panel

Photometer

The information contained herein is the exclusive property of toppoly Optoelectronics corporation, a nd shall not be