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November 6, 2007 DS25BR120

3.125 Gbps LVDS Buffer with Transmit Pre-Emphasis

General Description

The DS25BR120 is a single channel 3.125 Gbps LVDS buffer optimized for high-speed signal transmission over lossy FR-4 printed circuit board backplanes and balanced metallic ca-bles. Fully differential signal paths ensure exceptional signal integrity and noise immunity.

The DS25BR120 features four levels of pre-emphasis (PE) for use as an optimized driver device. Other LVDS devices with similar IO characteristics include the following products. The DS25BR110 features four levels of equalization for use as an optimized receiver device, while the DS25BR100 fea-tures both pre-emphasis and equalization for use as an opti-mized repeater device. The DS25BR150 is a buffer/repeater with the lowest power consumption and does not feature transmit pre-emphasis nor receive equalization.

Wide input common mode range allows the receiver to accept signals with LVDS, CML and LVPECL levels; the output levels are LVDS. A very small package footprint requires minimal space on the board while the flow-through pinout allows easy board layout. The differential inputs and outputs are internally terminated with a 100? resistor to lower device input and out-put return losses, reduce component count and further mini-mize board space.Features

■DC - 3.125 Gbps low jitter, high noise immunity, low power operation

■Four levels of transmit pre-emphasis drive lossy backplanes and cables

■On-chip 100? input and output termination minimizes insertion and return losses, reduces component count and minimizes board space

■7 kV ESD on LVDS I/O pins protects adjoining components

■Small 3 mm x 3 mm 8-LLP space saving package Applications

■Clock and data buffering

■Metallic cable driving

■FR-4 driving

Typical Application

30005410

? 2007 National Semiconductor https://www.wendangku.net/doc/6a17843326.html, DS25BR120 3.125 Gbps LVDS Buffer with Transmit Pre-Emphasis

Block Diagram

30005402

Pin Diagram

30005405

Pin Descriptions

Pin Name Pin Name Pin Type Pin Description PE11Input Pre-emphasis select pin.IN+2Input Non-inverting LVDS input pin.IN-3Input Inverting LVDS input pin.PE04Input Pre-emphasis select pin.NC 5NA "NO CONNECT" pin.OUT-6Output Inverting LVDS output pin.OUT+7Output Non-inverting LVDS Output pin.VCC 8Power Power supply pin.

GND

DAP

Power

Ground pad (DAP - die attach pad)

Pre-Emphasis Truth Table

PE1PE0Pre-emphasis Level

00Off

01Low (Approx. 3 dB at 1.56 GHz)10Medium (Approx. 6 dB at 1.56 GHz)1

High (Approx. 9 dB at 1.56 GHz)

Ordering Codes and Configurations

NSID

Function Available Equalization

Levels

Available Pre-emphasis

Levels

DS25BR100TSD Buffer/Repeater Low / Medium Off / Medium

DS25BR110TSD Receiver Off / Low / Medium / High

DS25BR120TSD Driver

NA Off / Low / Medium / High

DS25BR150TSD

Buffer/Repeater

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D S 25B R 120

Absolute Maximum Ratings (Note 4)

If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications.

Supply Voltage (V

)?0.3V to +4V

LVCMOS Input Voltage (PE0, PE1)?0.3V to (V

+ 0.3V) LVDS Input Voltage (IN+, IN?)?0.3V to +4V LVDS Differential Input Voltage ((IN+) - (IN?))0V to 1.0V

LVDS Output Voltage (OUT+, OUT?)?0.3V to (V

+ 0.3V) LVDS Differential Output Voltage ((OUT+) - (OUT?))0V to 1.0V LVDS Output Short Circuit Current

Duration

5 ms Junction Temperature+150°C Storage Temperature Range?65°C to +150°C Lead Temperature Range

Soldering (4 sec.)+260°C Maximum Package Power Dissipation at 25°C

SDA Package 2.08W Derate SDA Package16.7 mW/°C above +25°C Package Thermal Resistance

?θJA+60.0°C/W θJC+12.3°C/W ESD Susceptibility

HBM (Note 1)≥7 kV MM (Note 2)≥250V CDM(Note 3)≥1250V Note 1:Human Body Model, applicable std. JESD22-A114C

Note 2:Machine Model, applicable std. JESD22-A115-A

Note 3:Field Induced Charge Device Model, applicable std.

JESD22-C101-C

Recommended Operating Conditions

Min Typ Max Units Supply Voltage (V

) 3.0 3.3 3.6V Receiver Differential Input

Voltage (V

)

0 1.0V

Operating Free Air

Temperature (T

)

?40+25+85°C

Electrical Characteristics

Over recommended operating supply and temperature ranges unless otherwise specified. (Notes 5, 6, 7)

Symbol Parameter Conditions Min Typ Max Units LVCMOS INPUT DC SPECIFICATIONS (PE0, PE1)

V IH High Level Input Voltage 2.0V

Low Level Input Voltage GND0.8V

I IH High Level Input Current V

= 3.6V

0±10μA

I IL Low Level Input Current V

= GND

= 3.6V

0±10μA

V CL Input Clamp Voltage I

= ?18 mA, V

= 0V-0.9?1.5V

LVDS OUTPUT DC SPECIFICATIONS (OUT+, OUT-) V

Differential Output Voltage

R L = 100Ω

250350450mV

ΔV OD Change in Magnitude of V OD for Complimentary

Output States

-3535mV

Offset Voltage

R L = 100Ω

1.05 1.2 1.375V

ΔV OS Change in Magnitude of V OS for Complimentary

Output States

-3535mV

Output Short Circuit Current (Note 8)OUT to GND

PE0 = PE1 = 0

-35-55mA

OUT to V

PE0 = PE1 = 0

755mA

OUT

Output Capacitance Any LVDS Output Pin to GND 1.2pF

OUT

Output Termination Resistor Between OUT+ and OUT-100Ω

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DS25BR120

Symbol Parameter

Conditions

Min Typ Max Units LVDS INPUT DC SPECIFICATIONS (IN+, IN-)

V ID Input Differential Voltage

0 1V V TH Differential Input High Threshold V CM = +0.05V or V CC -0.05V 0+100

mV V TL Differential Input Low Threshold

?1000 mV V CMR Common Mode Voltage Range

V ID = 100 mV 0.05 V CC -0.05V I IN Input Current V IN = 3.6V or 0V V CC = 3.6V or 0V

±1±10μA C IN Input Capacitance Any LVDS Input Pin to GND 1.7 pF R IN Input Termination Resistor Between IN+ and IN- 100 ΩSUPPLY CURRENT

I CC

Supply Current

PE0 = 0, PE1 = 0

43mA

Note 4:“Absolute Maximum Ratings” indicate limits beyond which damage to the device may occur, including inoperability and degradation of device reliability and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or other conditions beyond those indicated in the Recommended Operating Conditions is not implied. The Recommended Operating Conditions indicate conditions at which the device is functional and the device should not be operated beyond such conditions.

Note 5:The Electrical Characteristics tables list guaranteed specifications under the listed Recommended Operating Conditions except as otherwise modified or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and are not guaranteed.

Note 6:Current into device pins is defined as positive. Current out of device pins is defined as negative. All voltages are referenced to ground except V OD and ΔV OD .

Note 7:Typical values represent most likely parametric norms for V CC = +3.3V and T A = +25°C, and at the Recommended Operation Conditions at the time of product characterization and are not guaranteed.

Note 8:Output short circuit current (I OS ) is specified as magnitude only, minus sign indicates direction only.

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D S 25B R 120

AC Electrical Characteristics (Note 11)

Over recommended operating supply and temperature ranges unless otherwise specified. (Notes 9, 10)

Symbol Parameter Conditions Min Typ Max Units LVDS OUTPUT AC SPECIFICATIONS (OUT+, OUT-)

t PHLD Differential Propagation Delay High to Low

= 100?

350465ps

PLHD

Differential Propagation Delay Low to High350465ps

SKD1Pulse Skew |t

PLHD

? t

PHLD

| (Note 12)45100ps

SKD2

Part to Part Skew (Note 13)45150ps

t LHT Rise Time

= 100?

80150ps

HLT

Fall Time80150ps JITTER PERFORMANCE WITH PE = OFF

RJ1A Random Jitter (RMS Value)

No Test Channels

(Note 14)V

= 350 mV

= 1.2V

Clock (RZ)

PE0 = 0, PE1 = 0

2.5 Gbps0.51ps

RJ2A

3.125 Gbps0.51ps

DJ1A Deterministic Jitter (Peak to Peak) No Test Channels

(Note 15)V

= 350 mV

= 1.2V

K28.5 (NRZ)

PE0 = 0, PE1 = 0

2.5 Gbps931ps

DJ2A

3.125 Gbps1640ps

TJ1A Total Jitter (Peak to Peak)

No Test Channels

(Note 16)V

= 350 mV

= 1.2V

PRBS-23 (NRZ)

PE0 = 0, PE1 = 0

2.5 Gbps0.050.13UI P-P

TJ2A

3.125 Gbps0.090.16UI P-P

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DS25BR120

Symbol Parameter

Conditions

Min Typ Max Units JITTER PERFORMANCE WITH PE = LOW (Figures 5 and 6)

t RJ1B Random Jitter (RMS Value)Test Channel A (Note 14)

V ID = 350 mV V CM = 1.2V Clock (RZ)

PE0 = 1, PE1 = 0 2.5 Gbps 0.5 1.3ps t RJ2B

3.125 Gbps 0.5 1.3ps t DJ1B Deterministic Jitter (Peak to Peak)Test Channel A (Note 15)

V ID = 350 mV V CM = 1.2V K28.5 (NRZ)

PE0 = 1, PE1 = 0 2.5 Gbps 1731ps t DJ2B

3.125 Gbps 1840ps t TJ1B Total Jitter (Peak to Peak)Test Channel A (Note 16)

V ID = 350 mV V CM = 1.2V

PRBS-23 (NRZ)PE0 = 1, PE1 = 0 2.5 Gbps 0.090.14UI P-P t TJ2B

3.125 Gbps

0.12

0.19

UI P-P

JITTER PERFORMANCE WITH PE = MEDIUM (Figures 5 and 6)t RJ1C Random Jitter (RMS Value)Test Channel B (Note 14)

V ID = 350 mV V CM = 1.2V Clock (RZ)

PE0 = 0, PE1 = 1 2.5 Gbps 0.5 1.2ps t RJ2C

3.125 Gbps 0.5 1.2ps t DJ1C Deterministic Jitter (Peak to Peak)Test Channel B (Note 15)

V ID = 350 mV V CM = 1.2V K28.5 (NRZ)

PE0 = 0, PE1 = 1 2.5 Gbps 2144ps t DJ2C

3.125 Gbps 2748ps t TJ1C Total Jitter (Peak to Peak)Test Channel B (Note 16)

V ID = 350 mV V CM = 1.2V

PRBS-23 (NRZ)PE0 = 0, PE1 = 1 2.5 Gbps 0.090.16UI P-P t TJ2C

3.125 Gbps

0.13

0.23

UI P-P

JITTER PERFORMANCE WITH PE = HIGH (Figures 5 and 6)t RJ1D Random Jitter (RMS Value)Test Channel C (Note 14)

V ID = 350 mV V CM = 1.2V Clock (RZ)

PE0 = 1, PE1 = 1 2.5 Gbps 0.5 1.2ps t RJ2D

3.125 Gbps 0.5 1.2ps t DJ1D Deterministic Jitter (Peak to Peak)Test Channel C (Note 15)

V ID = 350 mV V CM = 1.2V K28.5 (NRZ)

PE0 = 1, PE1 = 1 2.5 Gbps 3065ps t DJ2D

3.125 Gbps 3058ps t TJ1D Total Jitter (Peak to Peak)Test Channel C (Note 16)

V ID = 350 mV V CM = 1.2V

PRBS-23 (NRZ)PE0 = 1, PE1 = 1

2.5 Gbps 0.090.20UI P-P t TJ2D

3.125 Gbps

0.13

0.22

UI P-P

Note 9:The Electrical Characteristics tables list guaranteed specifications under the listed Recommended Operating Conditions except as otherwise modified or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and are not guaranteed.

Note 10:Typical values represent most likely parametric norms for V CC = +3.3V and T A = +25°C, and at the Recommended Operation Conditions at the time of product characterization and are not guaranteed.

Note 11:Specification is guaranteed by characterization and is not tested in production.

Note 12:t SKD1, |t PLHD ? t PHLD |, is the magnitude difference in differential propagation delay time between the positive going edge and the negative going edge of the same channel.

Note 13:t SKD2, Part to Part Skew, is defined as the difference between the minimum and maximum specified differential propagation delays. This specification applies to devices at the same V CC and within 5°C of each other within the operating temperature range.

Note 14:Measured on a clock edge with a histogram and an acummulation of 1500 histogram hits. Input stimulus jitter is subtracted geometrically.Note 15:Tested with a combination of the 1100000101 (K28.5+ character) and 0011111010 (K28.5- character) patterns. Input stimulus jitter is subtracted algebraically.

Note 16:Measured on an eye diagram with a histogram and an acummulation of 3500 histogram hits. Input stimulus jitter is subtracted.

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D S 25B R 120

DC Test Circuits

30005420

FIGURE 1. Differential Driver DC Test Circuit

AC Test Circuits and Timing Diagrams

30005421

FIGURE 2. Differential Driver AC Test Circuit

30005422

FIGURE 3. Propagation Delay Timing Diagram

30005423

FIGURE 4. LVDS Output Transition Times

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DS25BR120

Pre-Emphasis Test Circuits

30005427

FIGURE 5. Pre-emphasis Performance Test Circuit

30005428

FIGURE 6. Test Channel Description

Test Channel Loss Characteristics

The test channel was fabricated with Polyclad PCL-FR-370-Laminate/PCL-FRP-370 Prepreg materials (Dielectric constant of 3.7and Loss Tangent of 0.02). The edge coupled differential striplines have the following geometries: Trace Width (W) = 5 mils, Gap (S) = 5 mils, Height (B) = 16 mils.Test Channel

Length (inches)Insertion Loss (dB)

500 MHz 750 MHz 1000 MHz 1250 MHz 1500 MHz 1560 MHz A 10-1.2-1.7-2.0-2.4-2.7-2.8B 20-2.6-3.5-4.1-4.8-5.5-5.6C 30-4.3-5.7-7.0-8.2-9.4-9.7D 15-1.6-2.2-2.7-3.2-3.7-3.8E 30-3.4-4.5-5.6-6.6-7.7-7.9F

-7.8

-10.3

-12.4

-14.5

-16.6

-17.0

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D S 25B R 120

Device Operation

INPUT INTERFACING

The DS25BR120 accepts differential signals and allows simple AC or DC coupling. With a wide common mode range, the DS25BR120 can be DC-coupled with all common differential drivers (i.e. LVPECL, LVDS, CML). The following three figures illus-trate typical DC-coupled interface to common differential drivers. Note that the DS25BR120 inputs are internally terminated with a 100Ω resistor.

30005411

Typical LVDS Driver DC-Coupled Interface to DS25BR120 Input

30005412

Typical CML Driver DC-Coupled Interface to DS25BR120 Input

30005413

Typical LVPECL Driver DC-Coupled Interface to DS25BR120 Input

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DS25BR120

OUTPUT INTERFACING

The DS25BR120 outputs signals compliant to the LVDS standard. It can be DC-coupled to most common differential receivers.The following figure illustrates typical DC-coupled interface to common differential receivers and assumes that the receivers have high impedance inputs. While most differential receivers have a common mode input range that can accomodate LVDS compliant signals, it is recommended to check respective receiver's data sheet prior to implementing the suggested interface implementation.

30005414

Typical DS25BR120 Output DC-Coupled Interface to an LVDS, CML or LVPECL Receiver

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D S 25B R 120

Typical Performance

30005434 Maximum Data Rate as a Function of CAT5e

(Belden 1700A) Length

30005436 Maximum Data Rate as a Function of CAT5e

(Belden 1700A) Length

DS25BR120 Used as a Driver

DS25BR110 Used as a Receiver

30005438 Power Supply Current as a Function of Frequency

30005435

Maximum Data Rate as a Function of CAT7

(Siemon Tera) Length

30005437

Maximum Data Rate as a Function of CAT5e

(Belden 1700A) Length

DS25BR120 Used as a Driver

DS25BR110 Used as a Receiver

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DS25BR120

30005430

A 2.5 Gbps NRZ PRBS-7 After 40"

Differential FR-4 Stripline V:125 mV / DIV, H:75 ps / DIV

30005432

A 3.125 Gbps NRZ PRBS-7 After 40"

Differential FR-4 Stripline V:125 mV / DIV, H:50 ps / DIV

30005431

An Equalized (with PE) 2.5 Gbps NRZ PRBS-7 After 40"

Differential FR-4 Stripline V:125 mV / DIV, H:75 ps / DIV

30005433

An Equalized (with PE) 3.125 Gbps NRZ PRBS-7 After 40"

Differential FR-4 Stripline V:125 mV / DIV, H:50 ps / DIV

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D S 25B R 120

Physical Dimensions inches (millimeters) unless otherwise noted

Order Number DS25BR120TSD

NS Package Number SDA08A

(See AN-1187 for PCB Design and Assembly Recommendations)

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Notes

D S 25B R 120 3.125 G b p s L V D S B u f f e r w i t h T r a n s m i t P r e -

E m p h a s i s

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