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CRAM1285 技术规格书

CRAM1285 技术规格书
CRAM1285 技术规格书

CRAM1285

FEATURES

· Fast 35ns Read/Write Cycle

· SRAM Compatible Timing, Uses Existing SRAM Controllers Without Redesign

· Unlimited Read & Write Endurance

· Data Always Non-volatile for >20 years at Temperature

· One Memory Replaces Flash, SRAM, EEPROM and BBSRAM in

System for Simpler, More Efficient Design

· Replace battery-backed SRAM solutions with CRAM to eliminate

battery assembly, improving reliability

· 3.3 Volt Power Supply or 5 Volt Power Supply For DIP

· Automatic Data Protection on Power Loss

· Commercial, Industrial, Automotive Temperatures

· RoHS-Compliant SRAM TSOP2 Package

· RoHS-Compliant SRAM BGA Package

· RoHS-Compliant SRAM DIP Package

· AEC-Q100 Grade 1 Qualified 2M x 8 CRAM Memory RoHS

INTRODUCTION

The CRAM 1285 16384k Nonvolatile CRAM is 16,777,216-bit, fully static, nonvolatile CRAM organized as 2097,052 words by 8 bits. The CRAM1285 offers SRAM compatible 35ns read/write timing with unlimited endurance. Data is always non-volatile for greater than 20 years. Data is automatically protected on power

loss by low-voltage inhibit circuitry to prevent writes with voltage out of specification.

The CRAM1285 is the ideal memory solution for applications that must permanently store and retrieve criti-

cal data and programs quickly.

The CRAM1285 is available in a small footprint 400-mil, 44-lead plastic small-outline TSOP type 2 package

or an 8 mm x 8 mm, 48-pin ball grid array (BGA) package with 0.75 mm ball centers and 49.3 mm x 18.8 mm 36 DIP. These packages are compatible with similar low-power SRAM products and other non-volatile RAM products. The CRAM1285 provides highly reliable data storage over a wide range of temperatures. The product is of-

fered with commercial temperature range (0 to +70 °C), industrial temperature range (-40 to +85 °C), and

AEC-Q100 Grade 1 temperature range (-40 to +125 °C) options.

CONTENTS

1. DEVICE PIN ASSIGNMENT (2)

2. ELECTRICAL SPECIFICATIONS (4)

3. TIMING SPECIFICATIONS (7)

4. ORDERING INFORMATION (11)

5. MECHANICAL DRAWING (12)

6. REVISION HISTORY (14)

How to Reach Us (14)

Hong Kong Technologies ? 2012 1 CRAM1285 Rev. 6, 8/2012

CRAM1285 1. DEVICE PIN ASSIGNMENT

Figure 1.1 Block Diagram

Table 1.1 Pin Functions

Hong Kong Technologies ? 2012 2 CRAM1285 Rev. 6, 8/2012

1. DEVICE PIN ASSIGNMENT CRAM1285

Figure 1.2 Pin Diagrams for Available Packages (Top View)

DIP

Table 1.2 Operating Modes

Hong Kong Technologies ? 2012 3 CRAM1285 Rev. 6, 8/2012

2. ELECTRICAL SPECIFICATIONS CRAM1285

Absolute Maximum Ratings

This device contains circuitry to protect the inputs against damage caused by high static voltages or electric fields; however, it is advised that normal precautions be taken to avoid application of any voltage greater than maximum rated voltages to these high-impedance (Hi-Z) circuits. The device also contains protection against external magnetic fields. Precautions should be taken to avoid application of any magnetic field more intense than the maximum field intensity specified in the maximum ratings.

Table 2.1 Absolute Maximum Ratings1

Notes:

1、Permanent device damage may occur if absolute maximum ratings are exceeded. Functional operation should be restricted

to recommended operating conditions. Exposure to excessive voltages or magnetic fields could affect device reliability

2、All voltages are referenced to V SS.

3、Power dissipation capability depends on package characteristics and use environment.

Hong Kong Technologies ? 2012 4 CRAM1285 Rev. 6, 8/2012

Electrical Specifications CRAM1285

Power Up and Power Down Sequencing

The CRAM is protected from write operations whenever V DD is less than V WI. As soon as V DD exceeds V DD(min), there is a startup time of 2 ms before read or write operations can start. This time allows memory power supplies to stabilize.

The E and W control signals should track V DD on power up to V DD- 0.2 V or V IH (whichever is lower) and remain high

for the startup time. In most systems, this means that these signals should be pulled up with a resistor so that signal remains high if the driving signal is Hi-Z during power up. Any logic that drives E and W should hold the signals high with a power-on reset signal for longer than the startup time.

During power loss or brownout where V DD goes below V WI, writes are protected and a startup time must be observed when power returns above V DD(min).

Hong Kong Technologies ? 2012 5 CRAM1285 Rev. 6, 8/2012

Electrical Specifications CRAM1285

Hong Kong Technologies ? 2012 6 CRAM1285 Rev. 6, 8/2012

CRAM1285

Hong Kong Technologies ? 2012 7 CRAM1285 Rev. 6, 8/2012

Timing Specifications CRAM1285

Hong Kong Technologies ? 2012 8 CRAM1285 Rev. 6, 8/2012

Hong Kong Technologies ? 2012 9 CRAM1285 Rev. 6, 8/2012

Hong Kong Technologies ? 2012 10 CRAM1285 Rev. 6, 8/2012

CRAM1285

Hong Kong Technologies ? 2012 11 CRAM1285 Rev. 6, 8/2012

CRAM1285

Hong Kong Technologies ? 2012 12 CRAM1285 Rev. 6, 8/2012

CRAM1285 Mechanical Drawings

CRAM1285-5 DIP 36 PIN 740 MILMODULE

Hong Kong Technologies ? 2012 13 CRAM1285 Rev. 6, 8/2012

CRAM1285

Hong Kong Technologies ? 2012 14 CRAM1285 Rev. 6, 8/2012

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