MAAPGM0029-DIE中文资料
Amplifier, Power, 1W 3.5-6.5 GHz
MAAPGM0029-DIE
903240 —
Preliminary Information
Parameter Typical Units
Bandwidth 3.5-6.5 GHz 1-dB Compression Point 30 dBm Small Signal Gain 20 dB Input VSWR 1.5:1 Gate Current < 4 mA Drain Current
< 400 mA Power Added Efficiency 40 % Output Power 31 dBm Output Third Order Intercept
42 dBm Noise Figure 7 dB 2nd Harmonic -15 dBc Symbol
f P OUT PAE P1dB G VSWR I GG I DD OTOI NF 2f 3rd Harmonic
3f
-25
dBc
1. T B = MMIC Base Temperature
Primary Applications
? Wireless Local Loop ? 3.7- 4.2 GHz SatCom
Features
? 1 Watt Saturated Output Power Level ? Variable Drain Voltage (4-10V) Operation ? MSAG? Process
Description
The MAAPGM0029-Die is a 2-stage 1 W power amplifier with on-chip bias networks. This product is fully matched to 50 ohms on both the input and output. It can be used as a power amplifier stage or as a driver stage in high power applications.
Fabricated using M/A-COM’s repeatable, high performance and highly reliable GaAs Multifunction Self-Aligned Gate (MSAG?) Process, each device is 100% RF tested on wafer to ensure performance compliance.
M/A-COM’s MSAG? process features robust silicon-like manufacturing processes, planar processing of ion implanted transistors, multiple implant capability enabling power, low-noise, switch and digital FETs on a single chip, and polyimide scratch protection for ease of use with automated manufactur-ing processes. The use of refractory metals and the absence of platinum in the gate metal formulation prevents hydrogen poisoning when employed in hermetic packaging.
Electrical Characteristics: T B = 40°C 1, Z 0 = 50Ω, V DD = 8V, V GG = -2V, P in = 16 dBm
Amplifier, Power, 1W 3.5-6.5 GHz MAAPGM0029-DIE
903240 — Preliminary Information
Maximum Operating Conditions 2
Operating Instructions
This device is static sensitive. Please handle with care. To operate the device, follow these steps.
1. Apply V GG = -2 V, V DD= 0 V.
2. Ramp V DD to desired voltage, typically 8 V.
3. Adjust V GG to set I DQ, (approximately @ –2 V).
4. Set RF input.
5. Power down sequence in reverse. Turn gate
voltage off last.
Parameter Symbol Absolute Maximum Units
Input Power P
IN
21.0 dBm
Drain Supply Voltage V
DD
+12.0 V
Gate Supply Voltage V
GG
-3.0 V
Quiescent Drain Current (No RF) I
DQ
470 mA Quiescent DC Power Dissipated (No RF) P DISS 3.1 W
Junction Temperature T
j
180 °C Storage Temperature T STG-55 to +150 °C
2. Operation outside of these ranges may reduce product reliability. Operation at other than the typical values may result in performance outside the guaranteed limits.
Characteristic Symbol Min Typ Max Unit
Drain Voltage V DD 4.0 8.0 10.0 V
Gate Voltage V GG -2.3 -2.0 -1.5 V
Input Power P IN 16.0 19.0 dBm Junction Temperature Tj 150 °C
MMIC Base Temperature T B Note
2 °C Recommended Operating Conditions
2. Maximum MMIC Base Temperature = 150°C— 25.5 oC/W * V DD * I DQ
Amplifier, Power, 1W 3.5-6.5 GHz
MAAPGM0029-DIE
903240 —
Preliminary Information
Figure 1. Output Power and Power Added Efficiency vs. Frequency at V DD = 8V
and P in = 16dBm.
010203040
50
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
6.5
7.0
Frequency (GHz)
POUT
PAE
4
5
6
7
8
9
10
Drain Voltage (V)
POUT PAE
Figure 2. Saturated Output Power and Power Added Efficiency vs. Drain Voltage at f o
= 5 GHz.
Figure 3. 1dB Compression Point vs. Drain Voltage
010
20
3040
50
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
6.5
7.0
Frequency (GHz)
VDD = 4VDD = 6VDD = 8
VDD = 10
510152025
30
GAIN VSWR
Amplifier, Power, 1W 3.5-6.5 GHz
MAAPGM0029-DIE
903240 —
Preliminary Information
Pad Size (μm) RF In and Out
100 x 200 DC Drain Supply Voltage VDD 200 x 150 DC Gate Supply Voltage VGG
150 x 150
Size (mils) 4 x 8 8 x 6 6 x 6
Bond Pad Dimensions
Mechanical Information
Chip Size: 2.980 x 1.980 x 0.075 mm (117x 78 x 3 mils)
Chip edge to bond pad dimensions are shown to the center of the bond pad.
IN
V DD
V GG
OUT
0.152 mm.
0.990 mm.
1.828 mm.1.980 mm.0.990 mm.
1.490 mm.
0.127 mm.
1.490 mm.
2.980 mm.
2.853 mm.
Figure 5. Die Layout
Amplifier, Power, 1W 3.5-6.5 GHz
MAAPGM0029-DIE
903240 —
Preliminary Information
Assembly Instructions:
Die attach: Use AuSn (80/20) 1 mil preform solder. Limit time @ 300 °C to less than 5 minutes.
Wirebonding: Bond @ 160 °C using standard ball or thermal compression wedge bond techniques. For DC pad connections, use either ball or wedge bonds. For best RF performance, use wedge bonds of shortest length, although ball bonds are also acceptable.
Biasing Note: Must apply negative bias to V GG before applying positive bias to V DD to prevent damage to amplifier.
Figure 6. Recommended bonding diagram for pedestal mount. Support circuitry typical of MMIC characterization fixture for CW test-
IN
V DD
V GG
OUT
V DD
0.1 μF
RF IN
100 pF
RF OUT
100 pF
V GG
0.1 μF
Assembly and Bonding Diagram