DIO2112
DIO2112
2-VRMS Audio Driver with Adjustable Gain
Features
Voltage Output at 10k? Load 2 Vrms With 3.3V Supply Voltage
Ultra Low Distortion SNR>95dB
Typical Vn<10μVrms THD+N<0.01% at 2 Vrms No Pop/Clicks Noise when Power ON/OFF
No Need for Output DC-Blocking Capacitors
Optimized Frequency Response between 20Hz–20kHz Accepting Differential Input Featuring external under voltage mute
HBM ESD protection 8kV Pb free available in TSSOP-14 package
Description
The DIO2112 is an integrated solution for Set-top box and high definition player, and designed to optimize the audio driver circuit performance while reducing the BOM cost by eliminating the peripheral discrete components for noise reduction. DIO2112 features a 2Vrms stereo audio driver that designed to allow for the removal of output AC- coupling capacitors.
Featuring differential input mode, gain range of ±1 V/V to ±10 V/V can be achieved via external gain resistor setting. The DIO2112 is able to offer 2Vrms output with 10k ohm load and 3.3V supply.
Meanwhile, the DIO2112 offers built-in shut-down control circuitry for optimal pop-free
performance.
Under
under-voltage condition, DIO2112 is able to detect it and mutes the output.
Applications
Set-Top Boxes
High Definition DVD Players Car Entertainment System Medical
Pin Assignments
-INL +IN OUTL UVP PGND PVDD CP
+INR -INR OUTR SGND CN
Mute PVSS
Figure 1 Pin Assignment_TSSOP14
Pin Description
1 I Right-channel positive input
2 I Right-channel negative input
3 O Right-channel output
4 P Signal ground
5 I Mute input, active-low
6 P Supply voltage
7 I/O Charge-pump flying capacitor negative terminal 8 I/O Charge-pump flying capacitor positive terminal 9 P Positive supply 10 P Power ground
11 I Under voltage protection input 12 O Left-channel output 13 I Left-channel negative input 14
I
Left-channel positive input
Ordering Information
Order Part Number
Top
Marking
Pb-Free T A Package
DIO2112TP14 DIO2112 Yes -40 to +85°C TSSOP-14 Tape & Reel, 2500
Absolute Maximum Ratings
Stresses beyond those listed under “Absolute Maximum Rating” may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other condition beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maxim rating conditions for extended periods may affect device reliability.
Parameter Rating Unit
Supply Voltage -0.3 to 4 V
Input Voltage V SS-0.3 to V DD+0.3 V
Minimum load impedance 600 ?
EN to GND -0.3 to V DD+0.3 V
Storage Temperature Range -65 to 150 °C
Junction Temperature 150 °C
TSSOP-14 ?JA110 °C/W
HBM ESD, JEDEC: JESD22-A114 8 kV
Recommend Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation to ensure optimal performance to the datasheet specifications. DIOO does not recommend exceeding them or designing to Absolute Maximum Ratings.
Symbol Parameter Min. Typ. Max. Unit V DD Supply Voltage 3 3.3 3.6 V
V IH Mute High level Input Voltage 60 % of V DD V IL Mute Low level Input Voltage 40 % of V DD T A Operating T emperature Range -40 85 °C
Electrical Characteristics
Typical value: T A = 25°C, unless otherwise specified.
Symbol Parameter Conditions Min. Typ. Max. Unit
V OS Output Offset
Voltage
V DD=3.3V, Input grounded,
Unity gain
0.85 mV
PSRR Power supply
rejection ratio
V DD=3.3V 80 dB
V OH High level output
voltage
V DD=3.3V, R L=10k? 3.1 V
V OL Low level output
voltage
V DD=3.3V, R L=10k? -3.05 V
I IH Mute High level
input current
V DD=3.3V, V I=V DD 1 μA
I IL Mute Low level
input current
V DD=3.3V, V I=0V 1 μA
I DD Supply current V DD=3.3V, V I= V DD, No load 15
mA Mute mode, V DD=3.3V 1
Operating Characteristics
Typical value: T A=25°C, V DD=3.3V, R L=10k?, C PUMP=C PVSS=1μF, C IN=10μF, R IN=15k?, R fb=30k?, unless otherwise specified.
Symbol Parameter Conditions Min. Typ. Max. Unit V O Output Voltage THD=1%, V DD=3.3V, f=1kHz 2.05 V RMS
THD+N Total harmonic distortion
+ noise
V O=2V RMS, f=1kHz 0.002 %
X TALK Channel crosstalk V O=2V RMS, f=1kHz -110 dB
SNR Signal noise ratio V O=2V RMS,
BW=22kHz A-weighted
90 105 dB
C L Maximum capacitive load 220 pF V N Noise output voltage BW=20Hz to 22kHz 10 μV RMS G BW Unity gain bandwidth 7.2 MHz A VO Open loop voltage gain 165 dB
V UVP External under-voltage
detection
1.25 V
I Hys External under-voltage
detection hysteresis
current
5.4 μA
f CP Charge pump frequency 325 500 600 kHz
Application Information
Gain-Setting Resistors Ranges and Input-Blocking Capacitors
The gain-setting resistors, R IN and R FB , must be chosen so that noise, stability, and input capacitor size of the DIO2112 are kept within acceptable limits. Voltage gain is defined as R FB divided by R IN .
T able 1 lists the recommended resistor value for different gain settings. Selecting values that are too low demands a large input ac-coupling capacitor C IN. Selecting values that are too high increases the noise of the amplifier .
The gain-setting resistor must be placed close to the input pins to minimize capacitive loading on these input pins and to ensure maximum stability.
Table 1 Resistor Values Recommended
Input Res.,
R IN Feedback Res.,
R fb Differential Gain
Inverting Gain
Non-inverting
Gain 22 k? 22 k? 1 V/V -1 V/V 2 V/V
15 k? 30 k? 2 V/V -2 V/V 3 V/V 10 k?
100 k?
10 V/V
-10 V/V
11 V/V
Figure 2 Differential, Inverting and Non-inverting Gain Configurations
DC input-blocking capacitors are required to be added in series with the audio signal into the input pins of the DIO2112. These capacitors block the dc portion of the audio source and allow the DIO2112 inputs to be properly biased to provide maximum performance.
2nd Order Filter Typical Application
Several audio DACs used today require an external low-pass filter to remove out-of-band noise. This is possible with the DIO2112, as it can be used like a standard OPAMP . Several
-IN
filter topologies can be implemented, both single-ended and differential. In Figure 3, a multi-feedback (MFB) with differential input and single-ended input is shown.
An ac-coupling capacitor to remove dc content from the source is shown; it serves to block any dc content from the source and lowers the dc-gain to 1, helping reducing the output dc-offset to minimum.
The resistor values should have a low value for obtaining low noise, but should also have a high enough value to get a small size ac-coupling capacitor .
Figure 3 Second-Order Active Low-Pass Filter
Charge Pump Flying Capacitor and PVSS Capacitor
The charge pump flying capacitor serves to transfer charge during the generation of the negative supply voltage. The PVSS capacitor must be at least equal to the charge pump capacitor in order to allow maximum charge transfer . Low-ESR
capacitors are an ideal selection, and a value of 1 μF is typical. Capacitor values that are smaller than 1 μF can be used, but the maximum output voltage may be reduced and the device may not operate to specifications.
Decoupling Capacitors
The DIO2112 requires adequate power supply decoupling to ensure that the noise and total harmonic distortion (THD) are low. A good low equivalent-series-resistance (ESR) ceramic capacitor , typically 1μF , placed as close as possible to the device VDD lead works best. Placing this decoupling capacitor close to the DIO2112 is important for the performance of the amplifier . For filtering lower-frequency noise signals, a 10μF or greater capacitor placed near the audio power amplifier would also help, but it is not required in most applications because of the high PSRR of this device.
Pop-Free Power-Up
Pop-free power up is ensured by keeping the EN (shutdown pin) low during power-supply ramp up and ramp down. The EN pin should be kept low until the input ac-coupling capacitors are fully charged before asserting the EN pin high to achieve pop-less power up. Figure 4 illustrates the preferred sequence.
Supply
Enable
Supply
Ramp
Time for AC-Coupling
capacitors to charge
Figure 4 Power-Up Sequences
External Under-voltage Detection
External under-voltage detection can be used to mute/shut down the DIO2112 before an input device can generate a pop. The shutdown threshold at the UVP pin is 1.25 V. The user selects a resistor divider to obtain the shutdown threshold and hysteresis for the specific application. The thresholds can be determined as follows:
V UVP=(1.25V-6uA*R13)*(R11+R12)/R12;
With the condition R13>>R11//R12.
For example, if R11=3k, R12=1k and R13=50k,
Then V UVP=3.8V; V hysteresis=1V
Capacitive Load
The DIO2112 has the ability to drive a high capacitive load up to 220 pF directly. Higher
capacitive loads can be accepted by adding a series resistor of 47 ? or larger.
Physical Dimension: TSSOP-14
Dimensions In Millimeters Dimensions In Inches Symbol
Min Max Min Max
D 4.900 5.100 0.193 0.201
E 4.300 4.500 0.169 0.177
b 0.190 0.300 0.007 0.012
c 0.090 0.200 0.004 0.008
E1 6.250 6.550 0.246 0.258
A 1.200 0.047
A2 0.800 1.000 0.031 0.039
A1 0.05 0.150 0.002 0.006
e 0.65 (BSC) 0.026 (BSC)
L 0.500 0.700 0.020 0.028
H 0.25 (TYP) 0.01 (TYP)
Θ 1° 7° 1° 7°
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