NLAS4599D中文资料

NLAS4599

Low Voltage Single Supply SPDT Analog Switch

The NLAS4599 is an advanced high speed CMOS single pole –double throw analog switch fabricated with silicon gate CMOS technology. It achieves high speed propagation delays and low ON resistances while maintaining low power dissipation. This switch controls analog and digital voltages that may vary across the full power–supply range (from V CC to GND).

The device has been designed so the ON resistance (R ON ) is much lower and more linear over input voltage than R ON of typical CMOS analog switches.

The channel select input is compatible with standard CMOS outputs.The channel select input structure provides protection when voltages between 0 V and 5.5 V are applied, regardless of the supply voltage. This input structure helps prevent device destruction caused by supply voltage – input/output voltage mismatch, battery backup,hot insertion, etc.

?Channel Select Input Over–V oltage Tolerant to 5.5 V ?Fast Switching and Propagation Speeds ?Break–Before–Make Circuitry

?Low Power Dissipation: I CC = 2 m A (Max) at T A = 25°C ?Diode Protection Provided on Channel Select Input

?Improved Linearity and Lower ON Resistance over Input V oltage ?Latch–up Performance Exceeds 300 mA

?ESD Performance: HBM > 2000 V; MM > 200 V ?

Chip Complexity: 38 FETs

FUNCTION TABLE

L H

Select NC NO

ON Channel

COM

CHANNEL SELECT NO NC

NO SELECT

COM NC

GND V +Figure 1. Pin Assignment

Figure 2. Logic Symbol

See detailed ordering and shipping information in the package dimensions section of this data sheet.

ORDERING INFORMATION

https://www.wendangku.net/doc/8812017875.html,

ABSOLUTE MAXIMUM RATINGS (Note 1.)

Maximum Ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation under absolute maximum–rated conditions is not implied. Functional operation should be restricted to the Recommended Operating Conditions.

1.Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions.

2.Tested to EIA/JESD22–A114–A

3.Tested to EIA/JESD22–A115–A

4.Tested to JESD22–C101–A

5.Tested to EIA/JESD78

RECOMMENDED OPERATING CONDITIONS

DEVICE JUNCTION TEMPERATURE VERSUS TIME TO 0.1% BOND FAILURES

11

10

100

1000

TIME, YEARS

N O R M A L I Z E D F A I L U R E R A T E

Figure 3. Failure Rate vs. Time Junction Temperature

DC CHARACTERISTICS – Digital Section (Voltages Referenced to GND)

DC ELECTRICAL CHARACTERISTICS – Analog Section

AC ELECTRICAL CHARACTERISTICS (Input t

= t= 3.0 ns)

*Typical Characteristics are at 25_C.

Figure 4. t BBM (Time Break–Before–Make)

V CC

Figure 5. t ON /t OFF

ON

OFF

Output

Input

V CC

0 V

Figure 6. t ON /t OFF

Input

ON

OFF

0.1 m F

V OL

V CC V OUT

0.1 m

Channel switch control/s test socket is normalized. Off isolation is measured across an off channel. On loss is the bandwidth of an On switch. V ISO , Bandwidth and V ONL are independent of the input signal direction.V ISO = Off Channel Isolation = 20 Log for V IN at 100 kHz V ONL = On Channel Loss = 20 Log for V IN at 100 kHz to 50 MHz

Bandwidth (BW) = the frequency 3 dB below V ONL

?

Transmitted

Figure 7. Off Channel Isolation/On Channel Loss (BW)/Crosstalk

(On Channel to Off Channel)/V ONL

50 ?

ǒV OUT

IN

ǔ

ǒV OUT

V IN

ǔ

V CC GND

Output V IN

C L

Figure 8. Charge Injection: (Q)

–55–20L E A K A G

E (n A )

Figure 9. Switch Leakage vs. Temperature

1

TEMPERATURE (°C)

0.01

250.001

0.1

7085125

10

100

1

0.1

0.01

T I M E (n s )

Figure 14. Total Harmonic Distortion

Plus Noise vs. Frequency

FREQUENCY (kHz)

Figure 15. Charge Injection vs. COM Voltage

V COM (V)

T H D + N O I S E (%)

10

1100

0342

15

(d B )

0.0

0.5

1.0 1.5

2.0 2.5

3.0 3.50102030405060708090100Temperature (°C)

Figure 16. I CC vs. Temp, V CC = 3 V & 5 V

I C C (n A )

Figure 17. R ON vs. V CC, Temp = 255C

V IS (VDC)

R O N (?)

Figure 20. R ON vs. Temp, V CC = 3.0 V

V IS (VDC)

R O N (?)

–40

60

80

20

100

–20

120

101

0.11000.010.0010.00010.00001

Figure 21. R ON vs. Temp, V CC = 4.5 V

0.00.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5

V IS (VDC)

Figure 22. R ON vs. Temp, V CC = 5.0 V Figure 23. R ON vs. Temp, V CC = 5.5 V

2015R O N (?)

10

25

V IS (VDC)

5

00.0

2.01.51.00.5 2.5

3.0 3.5

4.0 4.5

5.0

V IS (VDC)

0.0 2.01.51.00.5 2.5 3.0 3.5 4.0 4.5 5.0 5.5

DEVICE ORDERING INFORMATION

DIRECTION OF FEED

Figure 24. Tape Ends for Finished Goods

Figure 25. SC70–6/SC–88/SOT–363 DFT2 and SOT23–6/TSOP–6/SC59–6 DTT1 Reel Configuration/Orientation

Figure 26. Reel Dimensions

REEL DIMENSIONS

Tape Size 8 mm

T and R Suffix

T1, T2

A Max 178 mm (7 in)

G

8.4 mm, + 1.5 mm, –0.0(0.33 in + 0.059 in, –0.00)

t Max 14.4 mm (0.56 in)

Figure 27. Reel Winding Direction

HOLE

SC70–6/SC–88/SOT–363

DF SUFFIX

CASE 419B–02

ISSUE J

NOTES:

1.DIMENSIONING AND TOLERANCING PER ANSI

Y14.5M, 1982.

2.CONTROLLING DIMENSION: INCH.

DIM A MIN MAX MIN MAX

MILLIMETERS

1.80

2.20 0.0710.087

INCHES

B 1.15 1.35

0.0450.053

C0.80 1.10

0.0310.043

D0.100.30

0.0040.012

G0.65 BSC

0.026 BSC

H---0.10

---

0.004

J0.100.25

0.0040.010

K0.100.30

0.0040.012

N0.20 REF

0.008 REF

S 2.00 2.20

0.0790.087

SOT23–6/TSOP–6/SC59–6

DT SUFFIX

CASE 318G–02

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