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100314PC中文资料

100314PC中文资料
100314PC中文资料

? 2000 Fairchild Semiconductor Corporation DS010260

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February 1990Revised August 2000

100314 Low Power Quint Differential Line Receiver

100314

Low Power Quint Differential Line Receiver

General Description

The 100314 is a monolithic quint differential line receiver with emitter-follower outputs. An internal reference supply (V BB ) is available for single-ended reception. When used in single-ended operation the apparent input threshold of the true inputs is 25 mV to 30 mV higher (positive) than the threshold of the complementary inputs. Unlike other F100K ECL devices, the inputs do not have input pull-down resis-tors.

Active current sources provide common-mode rejection of 1.0V in either the positive or negative direction. A defined output state exists if both inverting and non-inverting inputs are at the same potential between V EE and V CC . The defined state is logic HIGH on the O a –O e outputs.Features

s 35% power reduction of the 100114s 2000V ESD protection

s Pin/function compatible with 100114

s Voltage compensated operating range = ?4.2V to ?5.7V s Available to industrial grade temperature range (PLCC package only)

Ordering Code:

Devices also available in T ape and Reel. Specify by appending the suffix letter “X ” to the ordering code.

Logic Symbol Pin Descriptions

Connection Diagrams

24-Pin DIP/SOIC

28-Pin PLCC

Order Number Package Number

Package Description

100314SC M24B 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 100314PC N24E 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.400 Wide 100314QC V28A 28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square 100314QI

V28A

28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square Industrial Temperature Range (?40°C to +85°C)

Pin Names Description

D a –D e Data Inputs

D a –D e Inverting Data Inputs O a –O e Data Outputs

O a –O e

Complementary Data Outputs

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100314

Absolute Maximum Ratings (Note 1)

Recommended Operating Conditions

Note 1: The “Absolute Maximum Ratings ” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum rating.The “Recommended Operating Conditions ” table will define the conditions for actual device operation.

Note 2: ESD testing conforms to MIL-STD-883, Method 3015.

Commercial Version

DC Electrical Characteristics (Note 3)

V EE = ?4.2V to ?5.7V, V CC = V CCA = GND, T C = 0°C to +85°C Note 3: The specified limits represent the “worst case ” value for the parameter. Since these values normally occur at the temperature extremes, additional noise immunity and guardbanding can be achieved by decreasing the allowable system operating ranges. Conditions for testing shown in the tables are cho-sen to guarantee operation under “worst case ” conditions.

Storage Temperature (T STG )?65°C to +150°C

Maximum Junction Temperature (T J )+150°C

Pin Potential to Ground Pin (V EE )?7.0V to +0.5V Input Voltage (DC)

V EE to +0.5V

Output Current (DC Output HIGH)?50 mA ESD (Note 2)

≥2000V

Case Temperature (T C )Commercial 0°C to +85°C

Industrial

?40°C to +85°C Supply Voltage (V EE )

?5.7V to ?4.2V

Symbol Parameter

Min Typ Max Units Conditions

V OH Output HIGH Voltage ?1025?955?870mV V IN = V IH (Max)Loading with V OL Output LOW Voltage ?1830?1705

?1620

mV or V IL (Min)50? to ?2.0V V OHC Output HIGH Voltage ?1035

mV V IN = V IH Loading with

V OLC Output LOW Voltage ?1610mV or V IL (Max)50? to ?2.0V

V BB Output Reference Voltage ?1380?1320

?1260

mV I VBB = ?250 μA

V DIFF Input Voltage Differential 150mV Required for Full Output Swing

V CM Common Mode Voltage V CC ? 2.0

V CC ? 0.5

V

V IH

Single-Ended Guaranteed HIGH Signal for All Input HIGH Voltage

?1110

?870

mV

Inputs (with one input tied to V BB )V BB (Max) + V DIFF

V IL

Single-Ended Guaranteed LOW Signal for All Input LOW Voltage

?1830?1530

mV Inputs (with one input tied to V BB )V BB (Min) ? V DIFF I IL Input LOW Current 0.50

μA V IN = V IL (Min)

I IH Input HIGH Current 240μA V IN = V IH (Max), D a –D e = V BB ,D a –D e = V IL(Min)

I CBO Input Leakage Current

?10μA

V IN = V EE , D a –D e = V BB ,D a –D e = V IL (Min)

I EE

Power Supply Current

?60

?30

mA

D a –D e = V BB , D a –D e = V IL (Min)

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100314

Commercial Version (Continued)

DIP AC Electrical Characteristics

V EE = ?4.2V to ?5.7V, V CC = V CCA = GND SOIC and PLCC AC Electrical Characteristics

V EE = ?4.2V to ?5.7V, V CC = V CCA = GND Note 4: Maximum toggle frequency at which V OH and V OL DC specifications are maintained.Note 5: Maximum toggle frequency at which outputs maintain 150 mV swing.

Note 6: Output-to-Output Skew is defined as the absolute value of the difference between the actual propagation delay for any outputs within the same pack-aged device. The specifications apply to any outputs switching in the same direction either HIGH-to-LOW (t OSHL ), or LOW-to-HIGH (t OSLH ), or in opposite directions both HL and LH (t OST ). Parameters t OST and t PS guaranteed by design.

Note 7: All skews calculated using input crossing point to output crossing point propagation delays.

Symbol Parameter

T C = 0°C T C = +25°C T C = +85°C Units Conditions Min Max

Min Max

Min Max

f MAXFS Toggle Frequency 250250250MHz (Note 2)(Full Swing)f MAXRS Toggle Frequency 700700700MHz (Note 3)

(Reduced Swing)t PLH Propagation Delay 0.65 1.900.65 2.000.70 2.00ns

t PHL Data to Output Figures 1, 2

t TLH Transition Time

0.35

1.200.35

1.200.35

1.20ns

t THL

20% to 80%, 80% to 20%

Symbol Parameter

T C = 0°C T C = +25°C T C = +85°C Units Conditions Min Max

Min Max

Min Max

f MAXFS Toggle Frequency 250250250MHz (Note 4)(Full Swing)f MAXRS Toggle Frequency 700700700MHz (Note 5)

(Reduced Swing)t PLH Propagation Delay 0.65 1.700.65 1.800.70 1.80ns

t PHL Data to Output Figures 1, 2

t TLH Transition Time

0.35 1.100.35 1.100.35 1.10ns t THL 20% to 80%, 80% to 20%t PLH Propagation Delay 0.70

1.500.80

1.600.90

1.80ns

PLCC only t PHL Data to Output

t OSHL

Maximum Skew Common Edge PLCC only

Output-to-Output Variation 280

280

280

ps

(Note 6)(Note 7)Data to Output Path

t OSLH

Maximum Skew Common Edge PLCC only

Output-to-Output Variation 330

330

330

ps

(Note 6)(Note 7)Data to Output Path

t OST

Maximum Skew Opposite Edge PLCC only

Output-to-Output Variation 330

330

330

ps

(Note 6)(Note 7)Data to Output Path

t PS

Maximum Skew

PLCC only

Pin (Signal) Transition Variation 320

320

320

ps

(Note 6)(Note 7)

Data to Output Path

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100314

Industrial Version

PLCC DC Electrical Characteristics (Note 8)

V EE = ?4.2V to ?5.7V, V CC = V CCA = GND, T C = ?40°C to +85°C Note 8: The specified limits represent the “worst case ” value for the parameter. Since these values normally occur at the temperature extremes, additional noise immunity and guardbanding can be achieved by decreasing the allowable system operating ranges. Conditions for testing shown in the tables are cho-sen to guarantee operation under “worst case ” conditions.

PLCC AC Electrical Characteristics

V EE = ?4.2V to ?5.7V, V CC = V CCA = GND Note 9: Maximum toggle frequency at which V OH and V OL DC specifications are maintained.Note 10: Maximum toggle frequency at which outputs maintain 150 mV swing.

Symbol Parameter

T C = ?40°C T C = 0°C to +85°C Units Conditions

Min Max Min Max V OH Output HIGH Voltage ?1085?870?1025?870mV V IN = V IH (Max)Loading with V OL Output LOW Voltage ?1830?1575

?1830?1620

mV or V IL (Min)50? to ?2.0V V OHC Output HIGH Voltage ?1095

?1035

mV V IN = V IH Loading with V OLC Output LOW Voltage ?1565?1610mV or V IL (Min)

50? to ?2.0V

V BB Output Reference Voltage ?1395?1255

?1380?1260mV I VBB = ?250 μA

V DIFF Input Voltage Differential 150

150

mV Required for Full Output Swing

V CM Common Mode Voltage V CC ? 2.0V CC ? 0.5V CC ? 2.0V CC ? 0.5

V

V IH

Single-Ended Guaranteed HIGH Signal for All Input HIGH Voltage

?1115

?870

?1110

?870

mV

Inputs (with one input tied to V BB )V BB (Max) + V DIFF

V IL

Single-Ended Guaranteed LOW Signal for All Input LOW Voltage

?1830?1535

?1830?1530

mV Inputs (with one input tied to V BB )V BB (Min) ? V DIFF I IL Input LOW Current 0.50

0.50

μA V IN = V IL (Min)

I IH Input HIGH Current 240

240μA V IN = V IH (Max), D a –D e = V BB ,D a –D e = V IL (Min)

I CBO Input Leakage Current

?10?10

μA

V IN = V EE , D a –D e = V BB D a –D e = V IL (Min)

I EE

Power Supply Current

?60

?30

?60

?30

mA D a –D e = V BB , D a –D e = V IL (Min)

Symbol Parameter

T C = ?40°C T C = +25°C T C = +85°C Units Conditions Min Max

Min Max

Min Max

f MAXFS Toggle Frequency 250250250MHz (Note 9)(Full Swing)f MAXRS Toggle Frequency 700700700MHz (Note 10)

(Reduced Swing)t PLH Propagation Delay 0.65 1.700.65 1.800.70 1.80ns

Figures 1, 2

t PHL Data to Output t TLH Transition Time

0.20

1.400.35

1.100.35

1.10ns

t THL

20% to 80%, 80% to 20%

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100314

Test Circuit

Note:

?V CC , V CCA = +2V, V EE = ?2.5V

?L1 and L2 = equal length 50? impedance lines ?R T = 50? terminator internal to scope ?Decoupling 0.1 μF from GND to V CC and V EE ?All unused outputs are loaded with 50? to GND ?

C L = Fixture and stray capacitance ≤ 3 pF

FIGURE 1. AC Test Circuit

Switching Waveforms

FIGURE 2. Propagation Delay and Transition Times

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100314

Physical Dimensions inches (millimeters) unless otherwise noted

24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide

Package Number M24B

24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.400 Wide

Package Number N24E

100314 Low Power Quint Differential Line Receiver

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square

Package Number V28A

Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein:

1.Life support devices or systems are devices or systems

which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be rea-sonably expected to result in a significant injury to the user.

2. A critical component in any component of a life support

device or system whose failure to perform can be rea-

sonably expected to cause the failure of the life support

device or system, or to affect its safety or effectiveness.

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