BUK9230-100B,118;中文规格书,Datasheet资料
1.Product profile
1.1General description
Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic
package using TrenchMOS technology. This product has been designed and qualified to the appropriate AEC standard for use in automotive critical applications.
1.2Features and benefits
AEC Q101 compliant
Low conduction losses due to low on-state resistance
Suitable for logic level gate drive sources Suitable for thermally demanding environments due to 185 °C rating
1.3Applications
12 V, 24 V and 42 V loads Automotive systems
General purpose power switching Motors, lamps and solenoids
1.4Quick reference data
BUK9230-100B
N-channel TrenchMOS logic level FET
Rev. 02 — 1 February 2011
Product data sheet
Table 1.Quick reference data Symbol Parameter
Conditions
Min Typ Max Unit V DS drain-source voltage T j ≥25°C; T j ≤185°C --100V I D drain current V GS =5V;T mb =25°C; see Figure 1; see Figure 3--47A P tot
total power dissipation
T mb =25°C; see Figure 2
--167
W
Static characteristics R DSon
drain-source on-state resistance V GS =10V; I D =25A; T j =25°C -2428m ?V GS =5V;I D =25A;T j =25°C;
see Figure 9; see Figure 13-25
30
m ?
Avalanche ruggedness E DS(AL)S
non-repetitive drain-source
avalanche energy I D =47A; V sup ≤100V; R GS =50?; V GS =5V; T j(init)=25°C; unclamped --150
mJ
Dynamic characteristics Q GD
gate-drain charge
V GS =5V;I D =25A;V DS =80V; T j =25°C;see Figure 10
-13
-nC
2.Pinning information
[1]
It is not possible to make a connection to pin 2 of the SOT428 package.
3.Ordering information
Table 2.Pinning information Pin Symbol Description Simplified outline Graphic symbol
1G gate SOT428 (DPAK)
2D drain [1]3S source
mb
D
mounting base; connected to drain
32mb
1
Table 3.
Ordering information
Type number
Package Name
Description
Version BUK9230-100B
DPAK
plastic single-ended surface-mounted package (DPAK); 3 leads (one lead cropped)
SOT428
4.Limiting values
Table 4.Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter
Conditions
Min Max Unit V DS drain-source voltage T j ≥25°C; T j ≤185°C -100V V DGR drain-gate voltage R GS =20k ?
-100V V GS gate-source voltage -1515V I D
drain current
T mb =100°C; V GS =5V;see Figure 1-33A T mb =25°C;V GS =5V; see Figure 1; see Figure 3
-47A I DM peak drain current T mb =25°C; pulsed; t p ≤10μs; see Figure 3
-185A P tot total power dissipation T mb =25°C;see Figure 2
-167W T stg storage temperature -55185°C T j junction temperature -55
185°C Source-drain diode
I S source current T mb =25°C
-47A I SM peak source current pulsed; t p ≤10μs; T mb =25°C -185A Avalanche ruggedness
E DS(AL)S
non-repetitive drain-source avalanche energy
I D =47A;V sup ≤100V; R GS =50?; V GS =5V; T j(init)=25°C; unclamped
-150
mJ
5.Thermal characteristics
Table 5.Thermal characteristics
Symbol Parameter
Conditions Min Typ Max Unit R th(j-mb)thermal resistance from junction to mounting base
see Figure 4
--0.95K/W R th(j-a)
thermal resistance from junction to ambient
-
71.4
-
K/W
6.Characteristics
Table 6.Characteristics
Symbol Parameter Conditions Min Typ Max Unit Static characteristics
V(BR)DSS drain-source breakdown
voltage I D=0.25mA; V GS=0V; T j=-55°C89--V I D=0.25mA; V GS=0V; T j=25°C100--V
V GS(th)gate-source threshold voltage I D=1mA; V DS=V GS; T j=185°C;
see Figure 8
0.4--V
I D=1mA; V DS=V GS; T j=25°C;
see Figure 8
1.1 1.52V
I D=1mA; V DS=V GS; T j=-55°C;
see Figure 8
-- 2.3V I DSS drain leakage current V DS=100V;V GS=0V; T j=185°C--500μA
V DS=100V;V GS=0V; T j=25°C-0.021μA I GSS gate leakage current V GS=15V;V DS=0V; T j=25°C-2100nA
V GS=-15V;V DS=0V; T j=25°C-2100nA
R DSon drain-source on-state
resistance V GS=5V; I D=25A;T j=185°C;
see Figure 9; see Figure 13
--78m?V GS=10V;I D=25A;T j=25°C-2428m?V GS=4.5V; I D=25A;T j=25°C--33m?V GS=5V; I D=25A;T j=25°C;
see Figure 9; see Figure 13
-2530m?
Dynamic characteristics
Q G(tot)total gate charge I D=25A;V DS=80V; V GS=5V;
T j=25°C;see Figure 10-33-nC
Q GS gate-source charge-7-nC Q GD gate-drain charge-13-nC
C iss input capacitance V GS=0V; V DS=25V; f=1MHz;
T j=25°C;see Figure 11-28543805pF
C oss output capacitance-232278pF C rss reverse transfer capacitance-81110pF
t d(on)turn-on delay time V DS=30V; R L=1.2?; V GS=5V;
R G(ext)=10?; T j=25°C -30-ns
t r rise time-86-ns t d(off)turn-off delay time-96-ns t f fall time-46-ns L D internal drain inductance measured from drain to center of die;
T j=25°C
- 2.5-nH
L S internal source inductance measured from source lead to source
bond pad; T j=25°C
-7.5-nH Source-drain diode
V SD source-drain voltage I S=25A;V GS=0V; T j=25°C;
see Figure 12
-0.85 1.2V
t rr reverse recovery time I S=20A;dI S/dt=-100A/μs;
V GS=-10V;V DS=30V; T j=25°C -114-ns
Q r recovered charge-196-nC
7.Package outline
Fig 14.Package outline SOT428 (DPAK)
分销商库存信息: NXP
BUK9230-100B,118