PLL103-01中文资料
PLL103-01
Low Skew Buffers
FEATURES
? Generate 18 copies of High-speed clock inputs.? Supports up to four SDRAM DIMMS synchronous
clocks.
? Supports 2-wire I2C serial bus interface with
readback.
? 50% duty cycle with low jitter.? Less than 5ns delay.
? Skew between any outputs is less than 250 ps.? Tri-state pin for testing.? Frequency up to 133 MHZ.? 3.0V-3.7V Supply range.? 48-pin SSOP package.
BLOCK DIAGRAM
PIN CONFIGURATION
Note: ^: pull up
POWER GROUP
? VDD: SDRAM( 0:17 )? VDD1: I2C Circuitry
GROUND GROUP
? GND: SDRAM( 0:17 )? GND1: I2C Circuitry
KEY SPECIFICATIONS
? BUFIN to SDRAM outputs Delay: 1 ~ 5 ns.? Output Slew: ≥1.5 V/ns.? Output Skew: ±250 ps.
? Output Duty Cycle: 50% ± 5%.
GND VDD GND SDRAM7
SDRAM6VDD GND SDRAM5
VDD BUF_IN SDRAM3
SDRAM2VDD SDRAM1
SDRAM0VDD N/C N/C SDATA
VDD1SDRAM16
GND VDD SDRAM13SDRAM12GND OE^VDD SDRAM11SDRAM10GND VDD SDRAM9N/C N/C VDD
SDRAM15SDRAM14GND SDRAM8SDRAM17GND VDD GND1SCLK
SDRAM4GND GND
PLL103-01
Low Skew Buffers PIN DESCRIPTIONS
Name Number Type Description
SDRAM (0:3)4,5,8,9O SDRAM Byte0 Clock outputs.
SDRAM (4:7)13,14,17,18O SDRAM Byte1 Clock outputs.
SDRAM (8:11)31,32,35,36O SDRAM Byte2 Clock outputs.
SDRAM (12:15)40,41,44,45O SDRAM Byte3 Clock outputs.
SDRAM (16:17)21,28O SDRAM Byte4 Clock outputs.
OE38I Tristates all outputs, active low. Has internal pull-up.
BUF_IN11I Input for fanout buffers SDRAM (0:17).
SDATA24B
SCLK25I
Serial data inputs for serial interface port.
VDD 3,7,12,16,20,2
9,33,37,42,46P 3.3V Power supply for SDRAM buffer.
VDD123P 3.3V Power supply for I2C circuitry.
GND6,10,15,19,22,
27,30,34,39,43
P Ground for SDRAM buffer.
GND126P Power supply for I2C circuitry.
N/C1,2,47,48-Pins are internally disconnected.
PLL103-01
Low Skew Buffers
I2C BUS CONFIGURATION SETTING
Address Assignment A6 A5 A4 A3 A2 A1 A0 R/W 1 1 0 1 0 0 1 _Slave
Receiver/Transmitter Provides both slave write and readback functionality Data Transfer Rate
Standard mode at 100kbits/s
Data Protocol
This serial protocol is designed to allow both blocks write and read from the controller. The bytes must be accessed in sequential order from lowest to highest byte. Each byte transferred must be followed by 1 acknowledge bit. A byte transferred without acknowledged bit will terminate the transfer. The write or read block both begins with the master sending a slave address and a write condition (0xD2) or a read condition (0xD3).
Following the acknowledge of this address byte, in Write Mode: the Command Byte and Byte Count Byte must be sent by the master but ignored by the slave, in Read Mode: the Byte Count Byte will be read by the master then all other Data Byte . Byte Count Byte default at power-up is = (0x09).
I2C CONTROL REGISTERS
1. BYTE 0: SDRAM(0:7) Clock Register (1=Enable, 0=Disable)
Bit
Pin#
Default
Description
Bit 7181SDRAM7 (Active/Inactive)Bit 6171SDRAM6 (Active/Inactive)Bit 5141SDRAM5 (Active/Inactive)Bit 4131SDRAM4 (Active/Inactive)Bit 391SDRAM3 (Active/Inactive)Bit 281SDRAM2 (Active/Inactive)Bit 151SDRAM1 (Active/Inactive)Bit 0
4
1
SDRAM0 (Active/Inactive)
PLL103-01
Low Skew Buffers 2. BYTE 1: SDRAM(8:15) Clock Register (1=Enable, 0=Disable)
Bit Pin#Default Description
Bit 7451SDRAM15 (Active/Inactive)
Bit 6441SDRAM14 (Active/Inactive)
Bit 5411SDRAM13 (Active/Inactive)
Bit 4401SDRAM12 (Active/Inactive)
Bit 3361SDRAM11 (Active/Inactive)
Bit 2351SDRAM10 (Active/Inactive)
Bit 1321SDRAM9 (Active/Inactive)
Bit 0311SDRAM8 (Active/Inactive)
3. BYTE 2: SDRAM(16:17) Clock Register (1=Enable, 0=Disable)
Bit Pin#Default Description
Bit 7281SDRAM17 (Active/Inactive)
Bit 6211SDRAM16 (Active/Inactive)
Bit 5-1Reserved
Bit 4-1Reserved
Bit 3-1Reserved
Bit 2-1Reserved
Bit 1-1Reserved
Bit 0-1Reserved
PLL103-01
Low Skew Buffers
ELECTRICAL SPECIFICATIONS
1. Absolute Maximum Ratings
PARAMETERS
SYMBOL
MIN.
MAX.
UNITS
Supply Voltage V DD V SS -0.57.0V Input Voltage, dc V I V SS -0.5V DD +0.5V Output Voltage, dc V O V SS -0.5V DD +0.5V Storage Temperature
T S -65150°C Ambient Operating Temperature
T A
70
°C
Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the device and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other conditions above the operational limits noted in this specification is not implied.
2. AC/DC Electrical Specifications PARAMETERS
SYMBOL
CONDITIONS MIN.TYP.MAX.
UNITS
Input High Current I IH V IN = V DD
5
uA I IL V IN =0V; with no pull-up resistors uA Input Low Current I IL V IN =0V; with 100k pull-up resistors
uA
Input High Voltage V IH 2V DD +0.3V Input Low Voltage V IL V SS ?0.3
0.8V Input Frequency F IN V DD =3.3V; All outputs loaded 10
150Mhz Input Capacitance
C IN Logic Inputs 5PF I DD1C L = 0pf @ 66MHz 80120mA I DD2
C L = 0pf @ 100MHz
120180mA I DD3C L = 30pf; RS= 33? @ 66MHz 180260mA I DD4C L = 30pf; RS= 33? @ 100MHz 240
360mA Operating Supply
Current
I DD5
Stopped, input at 0 or VDD
500
uA
PLL103-01
Low Skew Buffers 2. Output Buffer Electrical Specifications
Unless otherwise stated, all power supplies = 3.3V±5%, and ambient temperature range T A= 0°C to 70°C
PARAMETERS SYMBOL CONDITIONS MIN.TYP.MAX.UNITS Output High Voltage V OH I OH = ?36 mA 2.43V Output Low Voltage V OL I OH = 23 mA0.270.4V Output High Current I OH V OH = 2.0 V-115-54mA Output Low Current I OL V OL = 0.8 V4057mA Output Impedance R DSP V O = (0.5) ?V DD1024ohm Output Impedance R DSN V O = (0.5) ?V DD1024ohm Rise Time T r V OL = 0.4 V, V OH = 2.4V0.95 1.33ns Fall Time T f V OH = 2.4 V, V OL = 0.4V0.95 1.33ns Skew T skew V T = 1.5 V110250ps Duty Cycle D T V T = 1.5 V455055%
T PROP V T = 1.5 V156ns
T PROPEN V T = 1.5 V18ns
PLL103-01
Low Skew Buffers
PACKAGE INFORMATION
ORDERING INFORMATION
PhaseLink Corporation, reserves the right to make changes in its products or specifications, or both at any time without notice. The information
furnished by PhaseLink is believed to be accurate and reliable. However, PhaseLink makes no guarantee or warranty concerning the accuracy of said information and shall not be responsible for any loss or damage of whatever nature resulting from the use of, or reliance upon this product.LIFE SUPPORT POLICY : PhaseLink’s products are not authorized for use as critical components in life support devices or systems without the express written approval of the President of PhaseLink Corporation.
For part ordering, please contact our Sales Department:
47745 Fremont Blvd., Fremont, CA 94538, USA Tel: (510) 492-0990 Fax: (510) 492-0991
PART NUMBER
The order number for this device is a combination of the following:Device number, Package type and Operating temperature range
PLL103-01 X C
PART NUMBER
TEMPERATURATURE C=COMMERCIAL M=MILITARY I=INDUSTRAL PACKAGE TYPE X=SSOP