正确计算死区时间_英飞凌
AN2007-04 H o w t o c a l c u l a t e a n d m i n i m i z e t h e d e a d
t i m e r e q u i r e m e n t f o r I G B T s p r o p e r l y
Power Management and Drives
Edition 2008-05-07
Published by
Infineon Technologies AG
81726 München, Germany
? Infineon Technologies AG 2008.
All Rights Reserved.
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AP99007
Revision History: 2007-08 V1.0 Previous Version: none
Page Subjects (major changes since last revision)
First
release
Author: Zhang Xi IFAG AIM PMD ID AE
Table of Contents Page 1Introduction (5)
1.1Reason of IGBT bridge shoot through (5)
1.2Impact of dead time on inverter operation (5)
2Calculate proper dead time (6)
2.1Basics for calculating the dead time (6)
2.2Definition of switching and delay times (7)
2.3Influence of gate resistor / driver output impedance (8)
2.4Impact of other parameters on delay time (9)
2.4.1Turn on delay time (9)
2.4.2Turn off delay time (10)
2.4.3Verification of calculated dead time (12)
3How to reduce dead time (13)
4Conclusion (14)
Bibliography (15)
1 Introduction
In modern industry the voltage source inverter with IGBT devices is used more and more. To ensure proper operation, the bridge shoot through always should be avoided. Bridge shoot through will generate unwanted additional losses or even cause thermal runaway. As a result failure of IGBT devices and whole inverter is possible.
1.1 Reason of IGBT bridge shoot through
The typical configuration of a phase-leg with IGBTs is shown in the following figure. In normal operation two IGBTs will be switched on and off one after the other. Having both devices conducting at the same time will result in a rise of current only limited by DC-link stray inductance.
Figure 1 Typical configuration of a voltage source inverter
Of course no one will turn on the two IGBTs at the same time on purpose, but since the IGBT is not an ideal switch, turn on time and turn off time are not strictly identical. In order to avoid bridge shoot through it is always recommended to add a so called “interlock delay time” or more popular “dead time” into the control scheme. With this additional time one IGBT will be always turned off first and the other will be turned on after dead time is expired, hence bridge shoot through caused by the unsymmetrical turn on and turn off time of the IGBT devices can be avoided.
1.2 Impact of dead time on inverter operation
Generally there are two types of dead time, the first one is control dead time and the second is effective dead time. The control dead time is the dead time, which will be implemented into control algorithms in order to get proper effective dead time at the devices. Target for setting control dead time is to ensure that effective dead time is always positive. Due to the fact that calculation of control dead time is always based on a worst case consideration, an effective dead time being a significant portion of the control dead time will result. Providing dead time can on one side avoid bridge shoot through but on the other side it has also adverse effect. To clarify the effect of dead time, let’s consider one leg of the voltage source inverter as shown in Figure. 2. Assuming first that output current flows in direction shown on the illustration IGBT T1 switches from ON to OFF and IGBT T2 switches from OFF to ON after slight dead time. During effective dead time both devices are off and freewheeling diode D2 is conducting output current. So negative DC link voltage is applied to the output, which is desired here. Consider the other case that T1 switches from OFF to ON and T2 from ON to OFF, then, with current in the same direction D2 still conducts the current during dead time, so that output voltage will be also negative DC link voltage, which is undesired here. The conclusion can be
summarized as follows: during effective dead time output voltage is determined by the direction of output current but not the control signal.
If we consider output current in the opposite direction than illustrated in figure 2, then we will gain a voltage if T1 switches from ON to OFF and T2 switched from OFF to ON. So in general output voltage and as a result also output current will be distorted with application of a dead time. If we choose a dead time unnecessary large, then in case of an induction motor the system will become instable and may cause some destructive effects [1]. So the process of choosing dead time is very important and should be performed very carefully.
Current
Figure 2
One leg of voltage source inverter
This application note will explain how to measure delay time of IGBTs in practice and how to calculate the control dead time properly based on measurements.
2 Calculate proper dead time
As already mentioned, dead time should be chosen on one hand to satisfy the need of avoiding bridge shoot through, on the other hand dead time should be chosen as small as possible to ensure correct operation of voltage source inverter. So a big challenge here is to find out a proper dead time for a dedicated IGBT device and driver.
2.1 Basics for calculating the dead time
For calculation of control dead time we use the following equation:
()[]
2.1)(______×?+?=MIN PDD MAX PDD MIN ON D MAX OFF D dead t t t t t (1)
Where Td_off_max : the maximal turn off delay time. Td_on_min : the minimal turn on delay time.
Tpdd_max : the maximal propagation delay of driver. Tpdd_min : the minimum propagation delay of driver.
1.2
: safety margin to be multiplied.
In this equation the first term td_off_max-td_on_min is the difference of the maximal turn off delay time and
the minimal turn on delay time. This term describes characteristic of IGBT device itself plus gate resistor which is used. Since fall and rise time is normally very short in comparison with delay time, they will be not considered here. The other term tpdd_max-tpdd_min is the propagation delay time difference (delay time
mismatch) which is determined from driver. This parameter will be found normally in datasheet of driver from driver manufacturers. Typically this value is quiet high with opto-coupler based drivers.
Sometimes dead time will be calculated from typical datasheet values just multiplying by a safety factor from field experience. This method will work in some cases but is not precise enough in general. With measurements shown here, a more precise approach will be presented.
Because IGBT datasheet only gives typical values for standardized operation condition, it is necessary to obtain the maximal values for dedicated driving condition. For this purpose a series of measurements is done in order to obtain proper value for delay time and then to calculate dead time.
switching and delay times
of
2.2 Definition
Since we will talk a lot about switching and delay times, it is necessary to give a clear definition here. Infineon Technologies defines the switching time of IGBT as follows:
t d_on: from 10% of Vge to 10% if I c.
t r: from 10% of Ic to 90% of I c.
t d_off : from 90% of Vge to 90% of I c.
t f: from 90% of Ic to 10% of I c.
Figure 3 Definition of switching times.
2.3 Influence of gate resistor / driver output impedance
The choice of gate resistor will have significant impact on switching delay time. Generally to say, the larger the resistor is the longer the delay time will be. It is recommended to measure delay time with dedicated gate resistor in application. A typical switching time vs. gate resistor value diagram is shown in the following figures:
Figure 4
Switching times vs. Rg @25°C
All tests were done with FP40R12KT3 module, gate voltage is -15V/+15V, DC link voltage is 600V and switched current is nominal current of 40A.
2.4 Impact of other parameters on delay time
Besides the gate resistor values, there are other parameters having significant impact on delay times: ? Collector current.
?Gate drive supply voltage.
2.4.1 Turn on delay time
To estimate this relationship, a series of measurements was done. First the dependence of turn on delay time and current was investigated. The results are shown in the next figure:
Figure 6 The turn on delay time vs. switched current Ic
All tests were done with a FP40R12KT3 module at a DC link voltage of 600V, gate resistor is chosen according to datasheet value.
From results above it can be seen that turn on delay time is almost constant with variation of collector current Ic. With -15V/+15V gate voltage turn on delay time will get larger than with 0V/+15V gate voltage [2]. For further calculation of control dead time this variation will be neglected since it is quiet small and provides even additional margin.
2.4.2 Turn off delay time
The most important factor in the calculation of dead time is the maximal turn off delay time. Since this value determines almost entirely how long the final calculated dead time will be. So we will investigate this delay time in detail.
In order to obtain the maximum turn off delay time following considerations have to be done:
1. What and how long is the turn on delay time caused by IGBT device itself?
To answer this question the following test based on a characterization driver board is done in laboratory. The characterization driver board is considered as an optimal driver, which means that this particular driver will cause no delay (which is almost true with an oversized driver), so the whole delay time is considered to be caused by the IGBT device itself. Following block diagram shows test setup:
Figure 7 Block diagram of test with ideal driver
2. What is the maximal turn off delay time if the threshold voltage of IGBT has the minimal value in datasheets? (this reflects the tolerance of Vth from module to module)
To answer this question an additional diode is connected to simulate the reduced Vth voltage. The diode has a voltage drop of approximately 0.7…0.8V, which is quite similar to the Vth variation of FP40R12KT3 module. Following block diagram shows principle test setup:
Figure 8 Block diagram of the test to simulate variation of Vth in worst case.
3. What is the impact of driver output stage on switching times?
To answer this concrete question the drivers on the market were splitted into two categories, one with mosfet transistor output stage and the other one with bipolar transistor output stage. For each category separate measurements were made.
To simulate drivers with mosfet output stage, another additional resistor was connected and has been considered as the on state resistor Rds(on) of Mosfet transistor. The diode for simulation of Vth variation remained. The following block diagram shows the principle test setup:
Figure 9 Block diagram of test to simulate variation of Vth and driver with mosfet output.
4. What is the impact of the driver with bipolar transistor output stage?
To answer the question an additional diode which simulated the voltage drop on bipolar transistor within output stage was connected. The following block diagram shows principle test setup:
Figure 10 Block diagram of the test to simulate the variation of Vth and driver with bipolar transistor output
With the configurations shown above the measurement of turn off delay time was done in our laboratory with module FP40R12KT3 and driver board which had been considered as optimal. Test conditions were Vdc=600V, Rg=27?. Results are shown in the next two figures:
Figure 11 Turn off delay time vs. Ic @25°C
Figure 12 Turn off delay time vs. Ic @125°C
From the results we can see that there is a significant increase of turn off delay time with decrease of the switched current Ic. So just simply calculate dead time according to a chosen gate resistor is obviously not precise enough. Measuring the delay time under the dedicated driving condition then calculating dead time according to these values is a better and more precise way. Normally measurement until 1% of the nominal current would be enough to give a sufficient overview for calculating required dead time.
Another point to be considered here is that the turn off delay time will increase with 0V/+15V gate drive, and the impact of output stage on switching times will be bigger with 0V/+15V switching. This means that with 0V/+15V switching voltage special care has to be taken by choosing the driver. Additionally, the increase of td_off with lower switched collector current Ic should be considered also.
As an example: the HCPL-3120 driver IC will be considered here. This driver IC has a Mosfet output stage for switching off. From diagrams above we can read the value for td_off under 0V/+15V switching condition is roughly 1500ns. The td_on in this case is about 100ns. The tpdd_max-tpdd_min of this driver IC according to datasheet is 700ns. Applying these values to the formula (1) results in a dead time of about 2.5μs.
2.4.3 Verification of calculated dead time
With the discussion above and the formula (1) given in chapter 2.1 it is now possible to calculate the required dead time based on the measurements above. With the calculated dead time, a worst case measurement can then be performed to verify if the chosen dead time is enough or not.
From the measurement it can be seen that the turn off delay time increases with temperature. From this reason it is preferable that the test should be done both at cold and hot condition.
The schematic illustration of the test looks like following:
Figure 13 Schematic illustration of test to check calculated dead time value
The bottom IGBT has to be switched on and off, then the same for the top one. The time between the two pulses should be adjusted to be the value of calculated dead time for the dedicated driving condition. The negative dc-link current can then be measured and if the dead time is sufficient, a shoot through current should not be observed.
Since there is no current through both IGBT, the described test represents the worst case condition for dead time calculation. From the discussion of turn off delay time it is known that dead time will be longer with decrease of collector current, so in case there flows no current, turn off delay time should be largest, which leads to a need of largest dead time. If there is no shoot through current at zero collector current then the chosen dead time is for dedicated driving condition sufficient.
3 How to reduce dead time
For a proper calculation of control dead time the dedicated driving condition should be considered: ?What is the applied gate voltage to the IGBT?
?What is the chosen gate resistor value?
?What type of output stage does the driver have?
Based on these conditions a test should be made, from the test results the control dead time can then be calculated using equition (1).
Since dead time has a negative impact on the performance of inverter, it has to be minimized. Several methods can be taken.
?Take a driver strong enough to sink or source the peak IGBT gate current.
?Use negative power supply to accelerate turn off.
?Prefer drivers based on fast signal transmission technology like Coreless Transformer Technology to drivers based on traditional opto-coupler technology.
?
If 0V/15V gate drive is used then consider use of separate Rgon/Rgoff resistor as described below.
From measurements shown in chapter 2.3 a very strong dependence of Td_off and gate resistor value can be observed. If the Rgoff reduced then the td_off will be reduced as well as dead time. Infineon suggests reducing the Rgoff to 1/3 of the Rgon value if 0V/15V gate voltage is used. One possible circuit for separate Rgon and Rgoff is as follows:
Figure 14 Suggested circuit with 0V/15V gate voltage.
R1 should be chosen to satisfy the following relation:
)(3
1
int int 11g gon g gon
gon R R R R R R R +?=++?
(2)
int int 122
1
g gon g gon gon R R R R R R +???==>
(3)
From equation (3) it is to be noticed that the requirement Rgon>2Rgint has to be fulfilled to get a positive
value of R1. However, with some modules this requirement can not be true. In this case, R1 can be omitted completely.
The diode should be a schottky type diode.
Another very important issue with 0V/15V gate voltage is the parasitic turn on effect. This issue can be also solved if suggested circuit is used. For more details on parasitic turn on please refer to AN2006-01[2].
4 Conclusion
In this application note an approach of measuring switching times of IGBT and then calculating the control dead time is introduced. First dependence of switching time on gate resistor value was shown, and then influence of gate driver and collector current on switching times was discussed. Finally possible methods to reduce dead time were introduced.
Bibliography
[1] D.Grahame Holmes, Thomas A. Lipo: …Pulse width modulation for power converters: principles and
practice“, IEEE Press, 2003. ISBN 0-471-20814-0
[2] Driving IGBTs with unipolar gate voltage.
https://www.wendangku.net/doc/ac11067923.html,/dgdl/an-2006-
01_Driving_IGBTs_with_unipolar_gate_voltage.pdf?folderId=db3a304412b407950112b408e8c9000 4&fileId=db3a304412b407950112b40ed1711291
https://www.wendangku.net/doc/ac11067923.html,
SVPWM中全新的死区时间效应补偿方法
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3、死区时间对捕获信号的影响 上图4和表1为ZDS2024 Plus示波器与普通示波器的死区时间对比，在相同的时基档位下，ZDS2024 Plus有效采样时间为23.1%，普通示波器有效采样时间为0.2%，相当于在1s 内ZDS2024 Plus采集231ms，而普通示波器仅仅采集了20ms，相差20倍以上，如图5所示。 图5 不同示波器死区时间对比 从图5可看出波形刷新率越高，死区时间就越短，捕获异常信号的概率就越高；波形刷新率越低，死区时间就越长，捕获异常信号的概率就越小。 波形刷新率与死区时间就像拍照的瞬间，如下图6所示，拍照的频率越高，中间间隔的时间就越短，能抓拍到一掠而过的飞机的机率就越高，动静结合的美好作品就能呈现在我们眼前。 图6拍照频率对比图
PWM死区时间
死区时间是PWM输出时，为了使H桥或半H桥的上下管不会因为开关速度问题发生同时导通而设置的一个保护时段。通常也指pwm响应时间。由于IGBT（绝缘栅极型功率管）等功率器件都存在一定的结电容，所以会造成器件导通关断的延迟现象。一般在设计电路时已尽量降低该影响，比如尽量提高控制极驱动电压电流，设置结电容释放回路等。为了使igbt工作可靠，避免由于关断延迟效应造成上下桥臂直通，有必要设置死区时间，也就是上下桥臂同时关断时间。死区时间可有效地避免延迟效应所造成的一个桥臂未完全关断，而另一桥臂又处于导通状态，避免直通炸模块。死区时间大，模块工作更加可靠，但会带来输出波形的失真及降低输出效率。死区时间小，输出波形要好一些，只是会降低可靠性，一般为us级。一般来说死区时间是不可以改变的，只取决于功率元件制作工艺！ 死区时间是指控制不到的时间域。在变频器里一般是指功率器件输出电压、电流的“0”区，在传动控制里一般是指电机正反向转换电压、电流的过零时间。死区时间当然越小越好。但是所以设置死区时间，是为了安全。因此又不可没有。最佳的设置是：在保证安全的前提下，越小越好。以不炸功率管、输出不短路为目的(baidu的) 死区时间是PWM输出时，为了使H桥或半H桥的上下管不会因为开关速度问题发生同时导通而设置的一个保护时段，所以在这个时间，上下管都不会有输出，当然会使波形输出中断，死区时间一般只占百分之几的周期。但是PWM波本身占空比小时，空出的部分要比死区还大，所以死区会影响输出的纹波，但应该不是起到决定性作用的。 死区,简单解释:通常,大功率电机、变频器等，末端都是由大功率管、IGBT等元件组成的H桥或3相桥。每个桥的上半桥和下半桥是是绝对不能同时导通的，但高速的PWM驱动信号在达到功率元件的控制极时，往往会由于各种各样的原因产生延迟的效果，造成某个半桥元件在应该关断时没有关断，造成功率元件烧毁。死区就是在上半桥关断后，延迟一段时间再打开下半桥或在下半桥关断后，延迟一段时间再打开上半桥，从而避免功率元件烧毁。这段延迟时间就是死区。（就是上、下半桥的元件都是关断的）死区时间控制在通常的低端单片机所配备的PWM中是没有的。 PWM的上下桥臂的三极管是不能同时导通的。如果同时导通就会是电源两端短路。所以，两路触发信号要在一段时间内都是使三极管断开的。这个区域就叫做“死区”优点就不用说了。缺点是使谐波的含量有所增加。
STM32高级定时器死区时间设置探究
STM32高级定时器死区时间设置探究 一、死区设置位置： 决定死区时间设置的位是‘刹车和死区寄存器TIM1->BDTR’中的DTG[7:0]，设置范围是0x00~0xff。 二、死区时间设置公式如下： DT为死区持续时间，TDTS为系统时钟周期时长，Tdtg为系统时钟周期时长乘以倍数后的死区设置时间步进值。 在72M的定时器时钟下TDTS=1/72M=13.89ns. 所以以第一个公式，死区时间能以13.89ns的步进从0调整到127*13.89ns=1764ns 第二个公式则能（64+0）*2*13.89~（64+63）*2*13.89=1777.9ns~3528.88ns 换个角度看，就是（128~254）*13.89
同理，第三个公式就是3555.84ns~7000.56ns 换个角度看，就是（256~504）*13.89 第四个公式就是7111.68ns~14001.12ns 换个角度看，就是(512~1008)*13.89 综上： 死区时间就是不同的公式代表不同范围的死区时间设置，这个范围是互不重叠的。而但是在不同的死区时间范围内死区时间设置步进是不同的。 若某个系统时钟下的死区时间不够，可以通过改变定时器时钟来改变最大死区时间范围。 当根据硬件电路的特性定下死区时间后，可以根据目标死区时间范围来找到相应的公式，然后代入公式求解出相应的整数（有时候不一定是整数，那就选择最近的那个），拼接DTG[7:5]+DTG[4:0]即可。 例子：这样当我需要3us的死区持续时间时，则可这么计算： 3us在第二个公式决定的死区范围之内。所以选择第二个公式。 3000/(13.89*2)=108,所以DTG[5:0]=108-64=44,所以DTG=127+44=171=0Xab TIM1->BDTR|=0xab; 反过来验算//72Mhz，死区时间=13.89nsX108*2=3000us 经示波器验证，完全正确。 By zxx2013.07.18
如何计算示波器的死区时间
如何计算示波器的死区时间 数字示波器的原理决定了波形观测必然存在死区时间，而死区时间的长短直接影响示波器捕获异常信号的能力。你当前用的示波器的死区时间具体是多少，怎么去计算呢，答案就在此文揭晓。 1、采样时间、死区时间和捕获时间 数字示波器捕获信号的过程是典型的“采集-处理-采集-处理”过程，如图1所示为数字示波器的采集原理，一个捕获周期由采样时间和（处理时间）死区时间组成，如图2所示。 图1 示波器采集原理图 采样时间：是信号采样存储的过程。 死区时间（处理时间）：是示波器对采样存储回来的数字信号进行测量运算，显示等处理的过程。死区时间内示波器不进行采集。 图2 采样时间与死区时间 所以：捕获时间=采样时间+死区时间，而捕获时间又等于波形刷新率的倒数。 波形刷新率即波形捕获率，指的是每秒捕获波形的次数，表示为波形每秒（wfms/s）。 2、死区时间的计算 死区时间的大小影响着遗漏信号的多少，也决定了捕获异常信号概率的大小，那么如何去计算示波器死区时间的大小呢？本次以ZDS2024 Plus示波器为例，ZDS2024 Plus的波形刷新率为330Kwfm/s，将时基档位调制50ns/div，可以看到异常信号闪现在示波器的屏幕上，如图3所示。 图3 ZDS2024 Plus示波器捕获异常信号
根据捕获到的波形进行死区时间的计算，在50ns/div的时基档位下以下为计算的过程： 图4 死区时间计算公式 3、死区时间对捕获信号的影响 上图4和表1为ZDS2024 Plus示波器与普通示波器的死区时间对比，在相同的时基档位下，ZDS2024 Plus有效采样时间为23.1%，普通示波器有效采样时间为0.2%，相当于在1s 内ZDS2024 Plus采集231ms，而普通示波器仅仅采集了20ms，相差20倍以上，如图5所示。 图5 不同示波器死区时间对比 从图5可看出波形刷新率越高，死区时间就越短，捕获异常信号的概率就越高；波形刷新率越低，死区时间就越长，捕获异常信号的概率就越小。
死区时间的影响与形成
死区时间参数 摘要：针对不同厂家IP M要求的死区时间参数的不同，本文从硬件电路角度出发，提出一种延时电路方案，解决了因参数调整而引起软件的不统一问题，进而为M C U的大批量m a s k降低成本提供可能。 关键词：IP M死区时间 随着现代电力电子技术的飞速发展，以绝缘栅双晶体管（IG B T）为代表的功率器件在越来越多的场合得到广泛地应用。I GB T是V D MO S与双极晶体管的组合器件，集M OS FE T与G T R的优点于一身，既具有输入阻抗高，开关速度快，热稳定性好和驱动电路简单的长处，又具有通态电压低，耐压高和承受大电流的优点，特别适合于电机控制。现代逐渐得到普遍推广的变频空调，其内部的压缩机控制单元就是采用以I GB T为主要功率器件的新型智能模块（IP M）。 IP M（智能功率模块）即In te l li ge n t P o we r Mo d ul e的缩写，它是将输出功率器件I GB T和驱动电路、多种保护电路集成在同一模块内，与普通I G B T相比，在系统性能和可靠性上均有进一步提高，而且由于IP M通态损耗和开关损耗都比较低，使散热器的尺寸减小，故整个系统的尺寸减小。下面是IP M内部的电路框图： IP M内部含有门极驱动控制、故障检测和多种保护电路。保护电路分别检测过流、短路、过热、电源欠压等故障，当任一故障出现时，内部电路会封锁驱动信号并向外送出故障信号，以便外部的控制器及时处理现场，避免器件受到进一步损坏。下图是变频空调室外压缩机控制驱动主电路的原理图。
220V交流电压经过由D1～D4和电解电容C1组成的桥式整流和阻容滤波电路后成为给I PM供电的直流电压，六个开关管按照一定规律通断，分别在U、V、W三相输出一系列的矩形信号，通过调整矩形波的频率与占空比达到调节输出电压频率和幅度的目的，即现在应用最广泛的P WM（PU LS E WI D TH M OD UL A TE 脉冲宽度调制）控制技术，PW M控制技术从控制思想上可以分成四类：等脉宽PW M法、正弦波P WM法、磁链追踪PW M法和电流追踪型P W M法。不管采用何种控制方式，都必须注意U、V、W任意一相上下两个桥臂不能同时导通，否则直流电源将在IP M内部形成短路，这是绝对不允许的。为了避免电源元件的切换反应不及时可能造成的短路，一定要在控制信号之间设定互锁时间，这个时间又叫换流时间，或者叫死区时间。 死区时间，一般情况下软件工程师在程序设计时就会考虑并写进控制软件。但是，由于不同公司生产的I P M，对死区时间长短的要求不尽相同，这样软件就会出现多个版本，不便于管理，并且影响CP U的M AS K (掩模)工作。为了控制软件的统一性，有的软件工程师将死区时间放到芯片外扩展的E2中，对不同公司的I P M，只需改变一下E2中的数据，即可简单实现死区时间的匹配。这种方法的缺点是生产成本较高，在实际应用时受到一定限制。随着集成电路工艺的不断改进，各种逻辑门集成电路的价格不断地下降，使采用硬件电路实现死区时间设定应用到生产上成为可能，这种方法的优点是电路简单，延时时间方便可调，成本低廉。 方案原理图如下图3：
死区时间设计
设计课题：PWM死区发生器设计与实现设计者： 姓名： 指导教师：
1、系统设计 (4) 1.1设计要求 (4) 1.2方案框图 (4) 2、单元电路的设计 (4) 2.1多谐振荡电路 (4) 2.1.1原理图 (4) 2.1.2工作原理 (5) 2.1.3参数选择 (5) 2.2死区产生电路 (5) 2.2.1原理图 (5) 2.2.2工作原理 (6) 2.2.3参数选择 (6) 3、系统测试结果 (6) 3.1 555引脚3波形 (6) 3.2死区波形 (7) 4、设计总结 (8) 5、参考文献 (8) 6、附录 (8) 元器件清单 (8) 总原理图 (9) PCB图 (9)
555定时器是一种多用途的数字——模拟混合集成电路，利用它能极方便地构成施密特触发器、单稳态触发器和多谐振荡器。由于使用灵活、方便，所以555定时器在波形的产生与变换、测量与控制、家用电器、电子玩具等许多领域中都得到了应用。CD4001是四2输入或非门。或非门的逻辑关系特点是只有当输入端全部为低电平时，输出端为高电平状态；在其余输入情况下，输出端为低电平状态。该电路是一种由555定时器和CD4001为核心器件组成的PWM 死区发生器电路，电路简单且易调试。 关键词：555;CD4001;PWM；死区
1、系统设计 1.1设计要求 ⑴用555及门电路为主芯片 ⑵555芯片<=1片 ，且门电路芯片数<=1片 ⑶开关频率10KHz ⑷输出高电平有效 ⑸占空比可调 ⑹死区时间3us 1.2方案框图 2、单元电路的设计 2.1多谐振荡电路 2.1.1原理图 TRIG 2 OUT 3 4 CVOLT 5 THOLD 6DISCHG 7 8 1 RESET VCC GND U? 555 D2IN4148 D1 IN4148C1103 R14K3 RW15K C2104 VCC R W 2 5K
死区时间
死区时间 死区时间是PWM输出时，为了使H桥或半H桥的上下管不会因为开关速度问题发生同时导通而设置的一个保护时段。 由于IGBT等功率器件都存在一定的结电容，所以会造成器件导通关断的延迟现象。一般在设计电路时已尽量降低该影响，比如尽量提高控制极驱动电压电流，设置结电容释放回路等。为了使igbt工作可靠，避免由于关断延迟效应造成上下桥臂直通，有必要设置死区时间，也就是上下桥臂同时关断时间。死区时间可有效地避免延迟效应所造成的一个桥臂未完全关断，而另一桥臂又处于导通状态，避免直通炸模块。 死区时间大，模块工作更加可靠，但会带来输出波形的失真及降低输出效率。死区时间小，输出波形要好一些，只是会降低可靠性，一般为us级。 IGBT在关断时的脉冲后沿因少数载流子的存储效应会产生一个较大的“拖尾”电流，因此所产生的关断能耗（Eoff）在早期产品中非常突出。 死区时间调整硬件解决方案 摘要：针对不同厂家IPM要求的死区时间参数的不同，本文从硬件电路角度出发，提出一种延时电路方案，解决了因参数调整而引起软件的不统一问题，进而为MCU的大批量mask降低成本提供可能。 关键词： IPM 死区时间 随着现代电力电子技术的飞速发展，以绝缘栅双晶体管（IGBT）为代表的功率器件在越来越多的场合得到广泛地应用。IGBT是VDMOS与双极晶体管的组合器件，集MOSFET与GTR的优点于一身，既具有输入阻抗高，开关速度快，热稳定性好和驱动电路简单的长处，又具有通态电压低，耐压高和承受大电流的优点，特别适合于电机控制。现代逐渐得到普遍推广的变频空调，其内部的压缩机控制单元就是采用以IGBT为主要功率器件的新型智能模块（IPM）。 IPM（智能功率模块）即Intelligent Power Module的缩写，它是将输出功率器件IGBT和驱动电路、多种保护电路集成在同一模块内，与普通IGBT相比，在系统性能和可靠性上均有进一步提高，而且由于IPM通态损耗和开关损耗都比较低，使散热器的尺寸减小，故整个系统的尺寸减小。下面是IPM内部的电路框图：
IGBT模块IPM死区时间设计方法
IGBT模块/IPM死区时间设计方法 死区时间是PWM输出时，为了使H桥或半H桥的上下IGBT管不会因为开关速度问题发生同时导通而设置的一个保护时段。通常也指pwm响应时间。下图是变频空调室外压缩机控制驱动主电路的原理图。 220V交流电压经过由D1～D4和电解电容C1组成的桥式整流和阻容滤波电路后成为给IPM供电的直流电压，六个开关管按照一定规律通断，分别在U、V、W三相输出一系列的矩形信号，通过调整矩形波的频率与占空比达到调节输出电压频率和幅度的目的，即现在应用最广泛的PWM（PULSE WIDTH MODULATE 脉冲宽度调制）控制技术，PWM控制技术从控制思想上可以分成四类：等脉宽PWM法、正弦波PWM法、磁链追踪PWM法和电流追踪型PWM法。不管采用何种控制方式，都必须注意U、V、W任意一相上下两个桥臂不能同时导通，否则直流电源将在IPM内部形成短路，这是绝对不允许的。为了避免电源元件的切换反应不及时可能造成的短路，一定要在控制信号之间设定互锁时间，这个时间又叫换流时间，或者叫死区时间。转载请注明出处：https://www.wendangku.net/doc/ac11067923.html,/ 由于IGBT（绝缘栅极型功率管）等功率器件都存在一定的结电容，所以会造成器件导通关断的延迟现象。一般在设计电路时已尽量降低该影响，比如尽量提高控制极驱动电压电流，设置结电容释放回路等。为了使igbt工作可靠，避免由于关断延迟效应造成上下桥臂直通，
有必要设置死区时间，也就是上下桥臂同时关断时间。死区时间可有效地避免延迟效应所造成的一个桥臂未完全关断，而另一桥臂又处于导通状态，避免直通炸模块。 死区时间大，模块工作更加可靠，但会带来输出波形的失真及降低输出效率。死区时间小，输出波形要好一些，只是会降低可靠性，一般为us级。一般来说死区时间是不可以改变的，只取决于功率元件制作工艺！ 死区时间是指控制不到的时间域。在变频器里一般是指功率器件输出电压、电流的“0”区，在传动控制里一般是指电机正反向转换电压、电流的过零时间。死区时间当然越小越好。但是所以设置死区时间，是为了安全。因此又不可没有。最佳的设置是：在保证安全的前提下，越小越好。以不炸功率管、输出不短路为目的。 1 基本原理推导 ①IGBT及光耦开关时间的定义 IGBT开关时间定义
STM32高级定时器死区控制
STM32高级定时器都带有死区控制功能，一般来说死区控制主要用于马达、变频器等控制。 一、死区时间概念 BLDC控制换相电路如下 死区时间是两路互补PWM输出时，为了使桥式换相电路上管T1和下管T2、上管T3和下管T4、上管T5和下管T6不会因为开关速度问题发生同时导通（同时导通电源会短路）而设置的一个保护时段。 假设STM32高级定时器OCX和OCXN输出互补通道PWM，极性都是高电平有效，则下图中标注“延迟”那段时间就是死区时间，此时间段上管和下管都没有导通。 二、STM32高级定时器死区时间计算 1. 配置寄存器
2. 死区时间计算示例 假设STM32F407的高级定时器TIM1的时钟为168MHz，设置tDTS=1/168us。 死区时间设置2us，经过估算该死区时间落在DTG[7:5]=110段。 (32+DTG[4:0]) /21 us= 2us，计算出DTG[4:0]=10=01010B， 再与DTG[7:5]拼接，最后算得DTG[7:0]=10=11001010B=0xCA。 死区时间设置4us，经过估算该死区时间落在DTG[7:5]=111段。 2*(32+DTG[4:0]) /21 us= 4us，计算出DTG[4:0]=10=01010B， 再与DTG[7:5]拼接，最后算得DTG[7:0]=10=11101010B=0xEA。 需注意死区时间计算是分段计算，每段公式不一样。
三、配置死区时间过程可能出现的问题 问题：发现插入死区时间后，没有互补脉冲输出了。一般是死区参数设置不合适导致出现了以下两种情况。 如果延迟时间大于有效输出（OCx 或OCxN）的宽度，则不会产生相应的脉冲。 注意：插入死区是为了保证桥式驱动电路中上下桥臂的开关管不会同时导通，提高控制安全性，但不是死区时间越长越好，死区是以牺牲开关管有效驱动脉冲时间为代价的，死区时间长短是由开关管硬件开关的速度决定。
IGBT(IPM)死区时间的设计方法
IGBT（IPM）死区时间的设计方法 1 基本原理推导 ①IGBT及光耦开关时间的定义 IGBT开关时间定义光耦开关时间定义 ②主电路构成 ③逻辑上的死区时间与IGBT端子（C、E）死区时间的关系 下图给出了控制信号、驱动板输出电压和IGBT 端子（C、E）间电压的相位关系。 各延迟时间分别定义为： t1：开通控制信号－驱动板开通电压信号输出的 延迟时间 t2：驱动板开通电压－IGBT开通输出延迟时间 t3：关断控制信号－驱动板关断电压信号输出的 延迟时间 t4：驱动板关断电压－IGBT关断输出延迟时间 （这里不考虑上下桥臂的差别） 逻辑上设定的死区时间（ＴＤ）与IGBT端子（C、 E）死区时间（ＴＤ’）的关系如下式。 ＴＤ'＝ＴＤ－（t3＋t4)＋(t1＋t2) （１） 因此逻辑上的死区时间(ＴＤ)随延迟时间 t1～t4的大小而变化成实际的死区时间（ＴＤ '）。下面分别推导驱动板的延时 (ｔ１、ｔ３)和IGBT延时（ｔ２、ｔ４）。
2 关于死区时间的设计方法 对式ＴＤ'＝ＴＤ－（t3＋t4)＋(t1＋t2)进行变换得 ＴＤ＝ＴＤ'+（t3＋t4)-(t1＋t2)= ＴＤ'+（t3- t1)+(t4-t2) 剩下就是如何界定驱动板的延时 (ｔ１、ｔ３)和IGBT 延时（ｔ２、ｔ４）。设计方法就是分为这两部分进行设计的，分别IGBT 部分的死区时间和HIC 部分的死区时间。 （1）IGBT 部分的死区时间 ①IGBT 开关时间的误差数据的收集及最大误差数据的算出 根据各个公司的IGBT 数据，算出IGBT 开关时间的误差数据（Tj ＝25℃）。根据σ及X ±4σ计算各IGBT 的X ±4σ.(误差最大)以下给出富士IGBT 的σ值供参考. ○ 600V 系列 σ=0.041(最大) ○1200V 系列 σ=0.063(最大) ②结温为25℃和125℃时的开关时间比率计算 根据数据手册中的结温在25℃和125℃、电流为额定电流时的开关时间（ton，toff），计算温升比率（T125/T25）。 开关时间T（uS） 器件额定电流 符号 结温 Tj=125℃ 时倍率 Min 值 Typ 值 Max 值 25 0.512 （typ-4σ）0.764 1.016 （typ+4σ） Ton 125 1.111 0.568 0.849 1.129 25 0.723 0.975 1.227 1MBI300N-120 Toff 125 1.474 1.065 1.437 1.808 ※σ为富士推荐的最大值0.063。 ③结温为125℃时的开关时间计算 由①和②的结果，两者相乘，可以计算出结温为125℃时的开关时间。 ④驱动条件时Rg，Vge 的比率计算 由于数据手册中给出的数据的条件（Rg，Vge）与实际变频器驱动的条件不同，因此需要计算实际IGBT 驱动条件下的开关时间比率。 ⑤修正开关时间的计算 从4的结果可以及③的结果可以计算出考虑这些比率时结温为125℃时的开关时间。然后可
死区时间控制
自控系统死区时间的处理方法 2007-12-06 09:53:57 对于一个反馈控制器而言，如何处理生产过程调节中的死区时间是个棘手的问题，此处我们将讨论几种处理方案。 对于一个反馈控制系统，死区时间可以定义为从“测量传感器检测到变量开始改变的瞬时”到“控制器对生产过程开始施加正确有效干预的瞬时”之间的延迟时间。在死区时间内，生产过程的实际值根本不会对控制器的调节作用起任何反应。在系统反应的死区时间结束之前，任何试图操纵或改变过程实际值的努力都注定是徒劳的。 举个例子，我们不妨想象一下“驾驶一辆方向盘很松的小汽车的过程”。小车司机如想拐弯，他一定要使劲打方向盘才能克服方向盘太松而带来的滞差，并真正施加作用在操纵杆上。只有在此之后，小车司机才能感觉到汽车方向的改变。所有完成这一系列动作的时间就是死区时间。 死区时间问题是有据可查的最难克服的控制类问题之一。在上面的例子中，如果一个司机对汽车拐弯过程中的死区时间大小估计不对的话，可能会因为上次的拐弯动作效果不佳，而在本次的拐弯过程中动作过于剧烈。 图1：如果光学测厚仪安装得离轧辊太远，那么控制器要花 较长的时间才能够纠正钢板的厚度偏差。这时还可能 由于调节过于“冒进”而使情况变得更糟。 然而，如果司机发现“在原来估算的死区时间结束之前汽车就已经开始拐弯”之后再采取缓解措施就为时已晚了，因为此前的操作动作早已矫枉过正，而且本应早些结束的。在此之后，司机又不得不试图再拐回原有方向，这样可能最终引发拐弯过程的失控。 顺便提及一下，类似的原因也是如此众多的酒后驾驶事故的罪魁祸首。也许汽车的方向盘拐弯是灵敏的，但是一个醉酒的司机由于感官不灵，等到他觉察到汽车开始拐弯时汽车就已经拐向过头了。在这种情况下，拐弯过程的失控是由人的感官迟钝导致，而非设备调节过程的死区时间，然而这种情况导致的结果却是灾难性的。
正确计算死区时间_英飞凌
AN2007-04 H o w t o c a l c u l a t e a n d m i n i m i z e t h e d e a d t i m e r e q u i r e m e n t f o r I G B T s p r o p e r l y Power Management and Drives
Edition 2008-05-07 Published by Infineon Technologies AG 81726 München, Germany ? Infineon Technologies AG 2008. All Rights Reserved. Attention please! THE INFORMATION GIVEN IN THIS APPLICATION NOTE IS GIVEN AS A HINT FOR THE IMPLEMENTATION OF THE INFINEON TECHNOLOGIES COMPONENT ONLY AND SHALL NOT BE REGARDED AS ANY DESCRIPTION OR WARRANTY OF A CERTAIN FUNCTIONALITY, CONDITION OR QUALITY OF THE INFINEON TECHNOLOGIES COMPONENT. THE RECIPIENT OF THIS APPLICATION NOTE MUST VERIFY ANY FUNCTION DESCRIBED HEREIN IN THE REAL APPLICATION. INFINEON TECHNOLOGIES HEREBY DISCLAIMS ANY AND ALL WARRANTIES AND LIABILITIES OF ANY KIND (INCLUDING WITHOUT LIMITATION WARRANTIES OF NON-INFRINGEMENT OF INTELLECTUAL PROPERTY RIGHTS OF ANY THIRD PARTY) WITH RESPECT TO ANY AND ALL INFORMATION GIVEN IN THIS APPLICATION NOTE. Information For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office (https://www.wendangku.net/doc/ac11067923.html,). Warnings Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies Office. Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health
一种自动检测设置死区时间的电路设计
一种自动检测设置死区时间的电路设计 【摘要】本文推出一种自动设置死区时间的控制器。该控制器采用栅源电压差与阈值电压相比较的工作原理，得到的输出信号分别控制彼此栅极电平，确保上下桥臂不同时导通。为加速比较信号的反应，比较器电路中运用正反馈特性。最后，在感性负载下，给出阈值电压为1.2V时，死区时间的仿真和实验结果，仿真采用华润上华0.5μm CMOS工艺实现。电路设计简单，驱动电路也不要额外设置死区时间。 【关键词】半桥电路；死区时间；阈值电压；比较器；正反馈 A kind of automatic detection and setting dead time circuit designing HUANG Haiping，JIANG Yanfeng （Microelectronic research center,North China University of Technology,Beijing 100144,China） Abstract：This paper introduced a kind of controller circuit which can automaticly set dead time.The controller works in this way that compares the voltage difference between gate and source of MOS tube to threshold voltage.The results of comparing each controls another gate in order to guarantee that the half bridge can not be turned on at the same time.The circuit with positive feedback is used here as to speed up the comparison of the response signal.At last,in the perceptual load,here gives the simulation and experiment results of dead time under the threshold voltage of 1.2V.The simulat ion results was realized by CSMC 0.5μm CMOS technology.the controller circuit is designed simply,and extra dead time need not to be setted up in the driving circuit. Key words：Half bridge circuit；Dead time；Threshold voltage；Comparator；Positive feedback 1.引言 高效率的DC-DC变换器得到已经广泛应用，比如手机，个人电脑，通讯设备等。开关的损耗包括：传导损耗、开关损耗、直通损耗等。可以通过优化和改善功率管的尺寸和驱动电路来减小前两者的损耗。为了减小第三种损耗，就必须设法缩短死区时间[1]的大小。死区时间是为了使上下桥臂不会因开关延迟而导致同时开通而设置的一个时间段。因此，死区时间的设置，可以有效消除两个开关管之间延迟效应，避免直通损坏模块。如果设置的死区时间较大，电路工作虽然安全可靠，但是会引入输出波形的失真，从而影响输出效率；死区时间较小，输出波形较好，但是降低了电路可靠性，所以死区时间一般为μs级。死区时间的设置如果由定时器或软件延时产生，会增加定时器或CPU的负担。死区时间