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ICS8427DK-02LFT中文资料

Integrated Circuit

Systems, Inc.

ICS8427-02

500MH Z , L OW J ITTER

LVCMOS/C RYSTAL -TO -LVHSTL F REQUENCY S YNTHESIZER

G ENERAL D ESCRIPTION

The ICS8427-02 is a general purpose, six LVHSTL output high frequency synthesizer

and a member of the HiPerClockS? family of

High Performance Clock Solutions from ICS.The ICS8427-02 can support a very wide

output frequency range of 15.625MHz to 500MHz. The device powers up at a default output frequency of 200MHz with a 16.6667MHz crystal interface, and the frequency can then be changed using the serial programm-ing interface to change the M feedback divider and N output divider. F requency steps as small as 125kHz can be achieved using a 16.6667MHz crystal and the output divider set for ÷16. The low jitter and frequency range of the ICS8427-02 make it an ideal clock generator for most clock tree applications.

F EATURES

?Six differential LVHSTL outputs

?Selectable crystal input interface or TEST_CLK input ?TEST_CLK accepts the following input types:LVCMOS, LVTTL ?Output frequency range: 15.625MHz to 500MHz ?VCO range: 250MHz to 500MHz

?Serial interface for programming feedback and output dividers ?Supports SSC, -0.5% downspread. Can be enabled through

use of the serial programming interface.?Output skew: 100ps (maximum)?Cycle-to-cycle jitter: 50ps (maximum)?2.5V core/1.8V output supply voltage ?0°C to 70°C ambient operating temperature

?Industrial temperature information available upon request ?Available in both standard and lead-free RoHS-compliant packages

B LOCK D IAGRAM

32 31 30 29 28 27 26 25

9 10 11 12 13 14 15 1612345678

2423222120191817

XTAL_OUT TEST_CLK XTAL_SEL V DDA S_LOAD S_DATA S_CLOCK MR

V DDO FOUT2nFOUT2

V DDO FOUT3

nFOUT3

OE GND

GND

nFOUT5

FOUT5

V DDO

nFOUT4

FOUT4

V DD

TEST

XTAL_IN

V DD

VCO_SEL

FOUT0

nFOUT0

V DDO

FOUT1

nFOUT1

32-Lead LQFP

7mm x 7mm x 1.4mm package body

Y Package Top View

ICS8427-02

32-Lead VFQFN

5mm x 5mm x 0.75mm package body

K Package T op View

IN A SSIGNMENT

Integrated Circuit

Systems, Inc.

ICS8427-02

500MH Z , L OW J ITTER

LVCMOS/C RYSTAL -TO -LVHSTL F REQUENCY S YNTHESIZER

NOTE: The functional description that follows describes op-eration using a 16.6667MHz crystal. Valid PLL loop divider values for different crystal or input frequencies are defined in the Input Frequency Characteristics, Table 6 NOTE 1.The ICS8427-02 features a fully integrated PLL and therefore requires no external components for setting the loop bandwidth.A parallel-resonant, fundamental crystal is used as the input to the on-chip oscillator. The output of the oscillator is divided by 16 prior to the phase detector. With a 16.6667MHz crystal, this provides a 1.0417MHz reference frequency. The VCO of the PLL operates over a range of 250MHz to 500MHz. The output of the M divider is also applied to the phase detector.

The phase detector and the M divider force the VCO output fre-quency to be 2M times the reference frequency by adjusting the VCO control voltage. Note that for some values of M (either too high or too low), the PLL will not achieve lock. The output of the VCO is scaled by a divider prior to being sent to each of the L VPECL output buffers. The divider provides a 50% output duty cycle.The ICS8427-02 powers up by default to 200MHz output fre-quency, using a 16.6667MHz crystal (M = 192, N = 2). The output frequency can be changed after power-up by using the serial interface to program the M feedback divider and the N output divider.

The relationship between the VCO frequency, the crystal fre-quency and the M divider is defined as follows:

The M value and the required values of M0 through M8 are shown in T able 3B, Programmable VCO F requency F unction T able. Valid M values for which the PLL will achieve lock for a 16.6667MHz reference are defined as 120 ≤ M ≤ 240. The frequency out is defined as follows:Serial operation occurs when S_LOAD is LOW. The shift

register is loaded by sampling the S_DA TA bits with the rising edge of S_CLOCK. The contents of the shift register are loaded into the M divider and N output divider when S_LOAD transitions from LOW-to-HIGH. The M divide and N output divide values are latched on the HIGH-to-LOW transition of S_LOAD. If S_LOAD is held HIGH, data at the S_DATA input is passed directly to the M divider and N outputdivider on each rising edge of S_CLOCK. The serial mode can be used to program the M and N bits and test bits T1 and T0. The internal registers T0 and T1 determine the state of the TEST output as follows:

F UNCTIONAL D ESCRIPTION

N fout =fVCO =162M

fxtal x N 16

fVCO =

fxtal x 2M

T1T0TEST Output

LOW

01S_Data, Shift Register Input

10Output of M divider

CMOS Fout

(Power-up

Default)

Integrated Circuit

Systems, Inc.

ICS8427-02

500MH Z , L OW J ITTER

LVCMOS/C RYSTAL -TO -LVHSTL F REQUENCY S YNTHESIZER

M AND N D IVIDERS , SSC AND T EST M ODE C ONTROL B ITS

T 0

T 2

N 1

N 0

N 8

M 7

M 6

M 5

M 4

M 3

M 2

M 1

M 0

M C

S S Test Mode Control Register

N Divider M Divider

SSC Control Register

S_DATA

ICS8427-02 S HIFT R EGISTER O PERATION – R EAD B ACK C APABILITY

1.Device powers up by default in Test Mode 01.

The Test Output in this case is wired to the shift register.

2.Shift in serial data stream and latch into M, N, T1, T0 and SSC Control Bits.

Shift in T1:T0=00, so that the TEST Output will be turned off after the bits are shifted in and latched.

Integrated Circuit

Systems, Inc.

ICS8427-02

500MH Z , L OW J ITTER

LVCMOS/C RYSTAL -TO -LVHSTL F REQUENCY S YNTHESIZER

T ABLE 1. P IN D ESCRIPTIONS

T ABLE 2. P IN C HARACTERISTICS

l o b m y S r

e t e m a r a P s

n o i t i d n o C t s e T m

u m i n i M l a c i p y T m

u m i x a M s t i n U C N

I e c n a t i c a p a C t u p n I 4F p R P U L L U P r o t s i s e R p u l l u P t u p n I 15k ΩR N

W O D L L U P r

o t s i s e R n w o d l l u P t u p n I 1

5k Ω

r e b m u N e m a N e p y T n o i t p i r c s e D 0

3,31,4,1V O D D r e w o P .

s n i p y l p p u s t u p t u O 3,2,2T U O F 2T U O F n t u p t u O .s l e v e l e c a f r e t n i L T S H .r i a p t u p t u o l a i t n e r e f f i D 6,5,3T U O F 3T U O F n t u p t u O .

s l e v e l e c a f r e t n i L T S H .r i a p t u p t u o l a i t n e r e f f i D 7E O t u p n I p

u l l u P .d e l b a n e e r a s t u p t u o e h t ,H G I H n e h W .e l b a n e t u p t u o h g i H e v i t c A .h g i H =x T U O F n ,w o L =x T U O F ,W O L n e h W .s l e v e l e c a f r e t n i L T T V L /S O M C V L 61,8D N G r e w o P .

d n u o r g y l p p u s r

e w o P 9T S E T t u p t u O .n o i t a r e p o

f o e d o m l a i r e s e h t n i E V I T C A s i h c i h w t u p t u o t s e T .s l e v e l e c a f r e t n i L T T V L /S O M C V L 62,01V D D r e w o P .

s n i p y l p p u s e r o C 21,11,4T U O F 4T U O F n t u p t u O .s l e v e l e c a f r e t n i L T S H .r i a p t u p t u o l a i t n e r e f f i D 5

1,41,5T U O F 5T U O F n t

u p t u O .

s l e v e l e c a f r e t n i L T S H .r i a p t u p t u o l a i t n e r e f f i D 71R

M t

u p n I n

w o d l l u P s r e d i v i d l a n r e t n i e h t ,H G I H c i g o l n e h W .t e s e R r e t s a M h g i H e v i t c A d

e t r e v n i e h t d n a w o l o g o t x T U O F s t u p t u o e u r t e h t g n i s u a c t e s e r e r a s r e d i v i d l a n r e t n i e h t ,W O L c i g o l n e h W .h g i h o g o t x T U O F n s t u p t u o .s l e v e l e c a

f r e t n i L T T V L /S O M C V L .d e l b a n e e r a s t u p t u o e h t d n a 81K C O L C _S t u p n I p

u l l u P .

r e t s i g e r t f i h s e h t o t n i A T A D _S l a i r e s d a o l o t k c o l c t u p n I .

s l e v e l e c a f r e t n i L T T V L /S O M C V L 91A T A D _S t u p n I p

u l l u P f

o e g d e g n i s i r e h t n o d e l p m a s a t a D .t u p n i l a i r e s r e t s i g e r t f i h S .

s l e v e l e c a f r e t n i L T T V L /S O M C V L .K C O L C _S 02D A O L _S t u p n I n

w o d l l u P .

s r e d i v i d e h t o t n i r e t s i g e r t f i h s m o r f a t a d f o n o i t i s n a r t s l o r t n o C .s l e v e l e c a f r e t n i L T T V L /S O M C V L 12V A D D r e w o P .

n i p y l p p u s g o l a n A 22L E S _L A T X t u p n I p

u l l u P e c n e r e f e r L L P e h t s a t u p n i t s e t r o t u p n i L A T X n e e w t e b s t c e l e S K L C _T S E T s t c e l e S .H G I H n e h w t u p n i L A T X s t c e l e S .e c r u o s .

s l e v e l e c a f r e t n i L T T V L /S O M C V L .W O L n e h w 32K L C _T S E T t u p n I n w o d l l u P .

s l e v e l e c a f r e t n i L T T V L /S O M C V L .t u p n i k c o l c t s e T 52,42,T U O _L A T X N I _L A T X t u p n I .t u p n i e h t s i N I _L A T X .e c a f r e t n i r o t a l l i c s o l a t s y r C .

t u p t u o e h t s i T U O _L A T X 72L

E S _O C V t

u p n I p

u l l u P .

e d o m s s a p y b r o L L P n i s i r e z i s e h t n y s r e h t e h w s e n i m r e t e D .

s l e v e l e c a f r e t n i L T T V L /S O M C V L 9

2,82,

0T U O F 0T U O F n t u p t u O .

s l e v e l e c a f r e t n i L T S H .r i a p t u p t u o l a i t n e r e f f i D 23,13,

1T U O F 1

T U O F n t u p t u O .

s l e v e l e c a f r e t n i L T S H .r i a p t u p t u o l a i t n e r e f f i D :E T O N p u l l u P d n a n w o d l l u P .

s e u l a v l a c i p y t r o f ,s c i t s i r e t c a r a h C n i P ,2e l b a T e e S .s r o t s i s e r t u p n i l a n r e t n i o t r e f e r

Integrated Circuit

Systems, Inc.

ICS8427-02

500MH Z , L OW J ITTER

LVCMOS/C RYSTAL -TO -LVHSTL F REQUENCY S

YNTHESIZER

nFOUT0:5FOUT0:5

F IGURE 2. OE T IMIN

G D IAGRAM

nVCO T ABLE 3A. C ONTROL I NPUT F UNCTION T ABLE

t u p n I s

t u p t u O E O L

E S _L A T X e c r u o S d e t c e l e S 5T U O

F :0T U O F 5T U O F n :0T U O F n 00K

L C _T S E T W O L ;d e l b a s i D H G I H ;d e l b a s i D 01T

U O _L A T X ,N I _L A T X W

O L ;d e l b a s i D H

G I H ;d e l b a s i D 1

L C _T S E T d

e l b a n E d

e l b a n E 11T U O _L A T X ,N I _L A T X d e l b a n E d

e l b a n E e g d e O C V g n i l l a

f d n a

g n i s i r a g n i w o l l o f d e l b a n e r o d e l b a s i d e r a s t u p t u o k c o l c e

h t ,s e h c t

i w s E O r e t f A n i n w o h s s a .

2e r u g i F VCO

Integrated Circuit

Systems, Inc.

ICS8427-02

500MH Z , L OW J ITTER

LVCMOS/C RYSTAL -TO -LVHSTL F REQUENCY S YNTHESIZER

T ABLE 3B. P ROGRAMMABLE VCO F REQUENCY F UNCTION T ABLE NOTE 1

T ABLE 3C. S ERIAL M ODE F UNCTION T ABLE

T ABLE 3D. P ROGRAMMABLE O UTPUT D IVIDER F UNCTION T ABLE

t u p n I e

u l a V r e d i v i D N )z H M (y c n e u q e r F t u p t u O 2N 1N 0N m u m i n i M m u m i x a M 000252105200145.26521010852.135.2601161526.5152.131001052005101252105211045.265211

2.135

.26y

c n e u q e r F O C V )

z H M (e d i v i D M 65282146236184218M 7M 6M 5M 4M 3M 2M 1M 0M 05202100111100080.25212100111100171.452221*********???????????0

042

910

0???????????29.79493201110111100504201111000

z H M 7666.61f o y c n e u q e r f t u p n i n a o t d n o p s e r r o c s e i c n e u q e r f g n i t l u s e r e h t d n a s e u l a v e d i v i d M e s e h T :1E T O N s

t u p n I s

n o i t i d n o C R M D

A O L _S K

C O L C _S A

T A D _S H X X X .

h g i H =x T U O F n ,w o L =x T U O F .W O L l a i t n e r e f f i d s t u p t u o s e c r o F .t e s e R L L X X n o i t i s n a r t W O L t x e n l i t n u d e d a o l s n i a m e r d n a s r e t s i g e r t u p n i o t n i d e h c t a l s i a t a D .

s r u c c o t n e v e l a i r e s a l i t n u r o L L ↑a t a D g n i s i r h c a e n o A T A D _S n o a t a d h t i w d e d a o l s i r e t s i g e r t f i h S .e d o m t u p n i l a i r e S .

K C O L C _S f o e g d e L ↑L a t a D .r e d i v i d t u p t u o N d n a r e d i v i d M e h t o t d e s s a p e r a r e t s i g e r t f i h s e h t f o s t n e t n o C L ↓L a t a D .d e h c t a l e r a s e u l a v r e d i v i d t u p t u o N d n a r e d i v i d M L

s r e t s i g e r t f i h s t c e f f a t o n o d t u p n i l a i r e S L H ↑a t a D .

d e k c o l c s i t i s a r e d i v i d M o t y l t c e r i d d e s s a p A T A D _S W

O L =L :E T O N H G I H =H e

r a c t 'n o D =X ↑n o i t i s n a r t e g d e g n i s i R =↓n

o i t i s n a r t e g d e g n i l l a F =

Integrated Circuit

Systems, Inc.

ICS8427-02

500MH Z , L OW J ITTER

LVCMOS/C RYSTAL -TO -LVHSTL F REQUENCY S YNTHESIZER

T ABLE 4A. P OWER S UPPL Y DC C HARACTERISTICS , V DD = V DDA = 2.5V±5%, V DDO = 1.8V±0.2V , T A = 0°C TO 70°C

T ABLE 4B. LVCMOS/L VTTL DC C HARACTERISTICS , V DD = V DDA = 2.5V±5%, V DDO = 1.8V±0.2V , T A = 0°C TO 70°C

l o b m y S r

e t e m a r a P s

n o i t i d n o C t s e T m u m i n i M l

a c i p y T m u m i x a M s t i n U V H I e g a t l o V h g i H t u p n I 7.1V D D 3.0+V V L I e g a t l o V w o L t u p n I 3

.0-7.0V I H

I t

u p n I t

n e r r u C h g i H K L C _T S E T ,D A O L _S ,R M V D D V =N I V 526.2=051A μ,L E S _O C V ,L E S _L A T X E O ,A T A D _S ,K C O L C _S V D D V =N I V 526.2=5

A μI L

I t

u p n I t

n e r r u C w o L K L C _T S E T ,D A O L _S ,R M V D D =V 526.2,V N I V 0=5-A μ,L E S _O C V ,L E S _L A T X E

O ,A T A D _S ,K C O L C _S V D D =,V 526.2V N I V

0=051-A μV H

O t

u p t u O e g a t l o V h g i H 1

E T O N ;T S E T 5

.1V V L

O t

u p t u O e

g a t l o V w o L 1E T O N ;T S E T 4

.0V

05h t i w d e t a n i m r e t s t u p t u O :1E T O N ΩV o t O D D .2/NOTE: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only. Functional operation of product at these conditions or any conditions be-yond those listed in the DC Characteristics or AC Character-istics is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability.

A BSOLUTE M AXIMUM R ATINGS

Supply Voltage, V DD 4.6V

Inputs, V I

-0.5V to V DD + 0.5V Outputs, I O

Continuous Current 50mA Surge Current

100mA

Package Thermal Impedance, θJA for 32 Lead LQFP 47.9°C/W (0 lfpm) for 32 Lead VFQFN 34.8°C/W (0 lfpm)Storage T emperature, T STG

-65°C to 150°C

l o b m y S r e t e m a r a P s

n o i t i d n o C t s e T m u m i n i M l a c i p y T m u m i x a M s t i n U V D D y l p p u S e r o C 573.25.2526.2V V A D D e g a t l o V g o l a n A 573.25.2526.2V V O D D e g a t l o V t u p t u O 6

.18

.10.2V I D D t n e r r u C y l p p u S r e w o P 571A m I A D D t n e r r u C y l p p u S g o l a n A 5

1A m I 0

D D t

n e r r u C y l p p u S t u p t u O d

a o L o N 0

Integrated Circuit

Systems, Inc.

ICS8427-02

500MH Z , L OW J ITTER

LVCMOS/C RYSTAL -TO -LVHSTL F REQUENCY S YNTHESIZER

T ABLE 6. I NPUT C HARACTERISTICS , V DD = V DDA = 2.5V±5%, V DDO = 1.8V±0.2V , T A = 0°C TO 70°C

T ABLE 5. C RYSTAL C HARACTERISTICS

e t e m a r a P s

n o i t i d n o C t s e T m

u m i n i M l a c i p y T m

u m i x a M s t i n U n o i t a l l i c s O f o e d o M l

a t n e m a d n u F y

c n e u q e r F 2

104z H M )R S E (e c n a t s i s e R s e i r e S t n e l a v i u q E 05Ωe c n a t i c a p a C t n u h S 7F p l

e v e L e v i r D 1

m T ABLE 4C. LVHSTL DC C HARACTERISTICS , V DD = V DDA = 2.5V±5%, V DDO = 1.8V±0.2V , T A = 0°C TO 70°C

l o b m y S r

e t e m a r a P s

n o i t i d n o C t s e T m u m i n i M l

a c i p y T m

u m i x a M s t i n U V H O 1E T O N ;e g a t l o V h g i H t u p t u O 9.03.1V V L O 1E T O N ;e g a t l o V w o L t u p t u O 04.0V V X

O 2

E T O N ;e g a t l o V r e v o s s o r C t u p t u O 0

406%V G

N I W S g n i w S e g a t l o V t u p t u O k a e P -o t -k a e P 6.01

.1V

05h t i w d e t a n i m r e t s t u p t u O :1E T O N ΩV 5.2e e S .D N G o t e r u g i f t i u c r i C t s e T d a o L t u p t u O e h t n i .

n o i t c e s n o i t a m r o f n I t n e m e r u s a e M r e t e m a r a P .

n o i t i d n o c n e v i g a t a g n i w s e g a t l o v t u p t u o o t t c e p s e r h t i w d e n i f e D :2E T O N l

o b m y S r

e t e m a r a P s n o i t i d n o C t s e T m

u m i n i M l

a c i p y T m

u m i x a M s t i n U f N

I y

c n e u q e r F t u p n I K

L C _T S E T 1

=t c e l e s O C V 2

104z H M )

e d o m s s a p y b (0=t c e l e s O C V 004z H M 1E T O N ;L A T X 2104z H M K

C O L C _S 05z H M t T

U P N I _r e

m i T e s i R t u p n I K

L C _T S E T 5

n y c n e u q e r f O C V m u m i x a m r o m u m i n i m e h t e v e i h c a o t t e s e b t s u m e u l a v M e h t e g n a r y c n e u q e r f l a t s y r c e h t r o F :1E T O N 761e r a M f o s e u l a v d i l a v z H M 21f o y c n e u q e r f m u m i n i m e h t g n i s U .z H M 005r o z H M 052f o e g n a r ≤M ≤652.e h t g n i s U 05e r a M f o s e u l a v d i l a v z H M 04f o y c n e u q e r f m u m i x a m ≤M ≤.

001

Integrated Circuit

Systems, Inc.

ICS8427-02

500MH Z , L OW J ITTER

LVCMOS/C RYSTAL -TO -LVHSTL F REQUENCY S YNTHESIZER

T ABLE 7. AC C HARACTERISTICS , V DD = V DDA = 2.5V±5%, V DDO = 1.8V±0.2V , T A = 0°C TO 70°C

l o b m y S r e t e m a r a P s n o i t i d n o C t s e T m

u m i n i M l a c i p y T m u m i x a M s t i n U F X

A M y

c n e u q e r F t u p t u O 005z H M t )c c (t i j 3

,1E T O N ;r e t t i J e l c y C -o t -e l c y C F T U O z

H M 002=0305s p F T U O z H M 762=0305s p F T U O z H M 333=0305s p F T U O z H M 004=0

305s p t )05T (t t i j r

e t t i J e l c y C 05T F T U O z H M 002=002s p F T U O z H M 762=002s p F T U O z H M 333=002s p F T U O z

H M 004=0

02s p t )r e p (t i j 1E T O N ;S M R ,r e t t i J d o i r e P 5.25s p t )

o (k s 3

,2E T O N ;w e k S t u p t u O 5

6001s p F M

,4E T O N ;y c n e u q e r F n o i t a l u d o M C S S F T U O z

H M 002=0333.33z H k F T U O z H M 762=0333.33z H k F T U O z H M 333=0333.33z H k F T U O z H M 004=0

333.33z H k F F

M 5

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l a t s y r c z t r a u q z H M 7666.61a g n i s U :5E T O N

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ICS8427-02

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LVCMOS/C RYSTAL -TO -LVHSTL F REQUENCY S YNTHESIZER

P ARAMETER M EASUREMENT I NFORMATION

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ICS8427-02

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LVCMOS/C RYSTAL -TO -LVHSTL F REQUENCY S YNTHESIZER

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LVCMOS/C RYSTAL -TO -LVHSTL F REQUENCY S YNTHESIZER A PPLICATION I NFORMATION

C RYSTAL I NPUT I NTERFACE

The ICS8427-02 has been characterized with 18pF parallel resonant crystals. The capacitor values, C1 and C2, shown in Figure 3 below were determined using a 16.66MHz, 18pF

parallel resonant crystal and were chosen to minimize the ppm error. The optimum C1 and C2 values can be slightly adjusted for different board layouts.

I NPUTS :C RYSTAL I NPUT :

For applications not requiring the use of the crystal oscillator input, both XTAL_IN and XTAL_OUT can be left floating.Though not required, but for additional protection, a 1k Ωresistor can be tied from XT AL_IN to ground.

TEST_CLK I NPUT :

For applications not requiring the use of the test clock, it can be left floating. Though not required, but for additional protection, a 1k Ω resistor can be tied from the TEST_CLK to ground.

LVCMOS C ONTROL P INS :

All control pins have internal pull-ups or pull-downs; additional resistance is not required but can be added for additional protection. A 1k Ω resistor can be used.

R ECOMMENDATIONS FOR U NUSED I NPUT AND O UTPUT P INS O UTPUTS :

LVHSTL O UTPUT

All unused L VHSTL outputs can be left floating. We recommend that there is no trace attached. Both sides of the differential output pair should either be left floating or terminated.

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Spread-spectrum clocking is a frequency modulation tech-nique for EMI reduction. When spread-spectrum is enabled, a 32.55kHz triangle waveform is used with 0.5% down-spread (+0.0% / -0.5%) from the nominal 200MHz clock frequency.An example of a triangle frequency modulation profile is shown in Figure 5A below. The ramp profile can be expressed as:?Fnom = Nominal Clock F requency in Spread OFF mode (200MHz with 16.6667MHz IN)

?Fm = Nominal Modulation F requency = Reference F requency

16 x 32

?δ = Modulation Factor (0.5% down spread)(1 - δ) fnom + 2 fm x δ x fnom x t when 0 < t <,

12 fm

12 fm 1

The ICS8427-02 triangle modulation frequency deviation will

not exceed 0.6% down-spread from the nominal clock fre-quency (+0.0% / -0.5%). An example of the amount of down spread relative to the nominal clock frequency can be seen in the frequency domain, as shown in Figure 5B. The ratio of this width to the fundamental frequency is typically 0.4%, and will not exceed 0.6%. The resulting spectral reduction will be greater than 7dB, as shown in Figure 5B. It is important to note the ICS8427-02 7dB minimum spectral reduction is the component-specific EMI reduction, and will not necessarily be the same as the system EMI reduction.

(A) S PREAD -S PECTRUM OFF (B) S PREAD -S PECTRUM ON

S PREAD S PECTRUM

As in any high speed analog circuitry, the power supply pins are vulnerable to random noise. The ICS8427-02 provides separate power supplies to isolate any high switching noise from the outputs to the internal PLL. V DD , V DDA , and V DDO should be individually connected to the power supply plane through vias, and bypass capacitors should be used for each pin. To achieve optimum jitter performance,power supply isolation is required. Figure 4 illustrates how a 10Ω resistor along with a 10μF and a .01μF bypass capacitor should be connected to each V DDA pin.

P OWER S UPPL Y F ILTERING T ECHNIQUES

F IGURE 4. P OWER S UPPL Y F IL TERING

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ICS8427-02

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F igure 6 shows an application schematic example of the ICS8427-02. In this example, a 16.6667MHz, 18 pF parallel resonant crystal is used. The C1=22pF and C2=22pF are

L AYOUT G UIDELINE

F IGURE 6. S CHEMATIC OF R ECOMMENDED L AYOUT

approximate values for frequency accuracy. The C1 and C2may be slightly adjusted for optimizing frequency accuracy.

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ICS8427-02

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LVCMOS/C RYSTAL -TO -LVHSTL F REQUENCY S YNTHESIZER P OWER C ONSIDERATIONS

This section provides information on power dissipation and junction temperature for the ICS8427-02.Equations and example calculations are also provided.

1. Power Dissipation.

The total power dissipation for the ICS8427-02 is the sum of the core power plus the power dissipated in the load(s).The following is the power dissipation for V DD = 2.5V + 5% = 2.625V , which gives worst case results.NOTE: Please refer to Section 3 for details on calculating power dissipated in the load.

?Power (core)MAX = V DD_MAX * I DD_MAX = 2.625V * 175mA = 459.4mW ?

Power (outputs)MAX = 32.6mW/Loaded Output pair

If all outputs are loaded, the total power is 6 * 32.6mW = 195.6mW

Total Power _MAX (3.465V , with all outputs switching) = 459.37mW + 195.6mW = 655mW

2. Junction Temperature.

Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the device. The maximum recommended junction temperature for HiPerClockS TM devices is 125°C.

The equation for Tj is as follows: Tj = θJA * Pd_total + T A

Tj = Junction T emperature

θJA = Junction-to-Ambient Thermal Resistance

Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)

T A = Ambient T emperature

In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance θJA

must be used. Assuming a

moderate air flow of 200 linear feet per minute and a multi-layer board, the appropriate value is 42.1°C/W per Table 8A below.Therefore, Tj for an ambient temperature of 70°C with all outputs switching is:70°C + 0.655W * 42.1°C/W = 97.6°C. This is well below the limit of 125°C.

This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow,and the type of board (single layer or multi-layer).

θJA by Velocity (Linear Feet per Minute)

200

500

Single-Layer PCB, JEDEC Standard Test Boards 67.8°C/W 55.9°C/W 50.1°C/W Multi-Layer PCB, JEDEC Standard Test Boards 47.9°C/W 42.1°C/W 39.4°C/W

NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.

T ABLE 8A. T HERMAL R ESISTANCE θJA FOR 32-P IN LQFP, F ORCED C ONVECTION

T ABLE 8B. θJA VS . A IR F LOW T ABLE FOR A 32 L EAD VFQFN

θJA by Velocity (Linear Feet per Minute)

Multi-Layer PCB, JEDEC Standard Test Boards

34.8°C/W

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ICS8427-02

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3. Calculations and Equations.

The purpose of this section is to derive the power dissipated into the load.LVHSTL output driver circuit and termination are shown in Figure 7.

T o calculate worst case power dissipation into the load, use the following equations which assume a 50Ω load.

Pd_H is power dissipation when the output drives high.Pd_L is the power dissipation when the output drives low.Pd_H = (V OH_MIN /R L ) * (V

DD_MAX

- V

OH_MIN

)Pd_L = (V

OL_MAX

/R L

) * (V

DD_MAX

- V

OL_MAX

)

Pd_H = (0.9V/50Ω) * (2V - 0.9V) = 19.8mW Pd_L = (0.4V/50Ω) * (2V - 0.4V) = 12.8mW

T otal Power Dissipation per output pair = Pd_H + Pd_L = 32.6mW

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ICS8427-02

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LVCMOS/C RYSTAL -TO -LVHSTL F REQUENCY S YNTHESIZER R ELIABILITY I NFORMATION

T RANSISTOR C OUNT

The transistor count for ICS8427-02 is: 4585

T ABLE 9A. θJA VS . A IR F LOW T ABLE FOR 32 L EAD LQFP

θJA by Velocity (Linear Feet per Minute)

200

500

Single-Layer PCB, JEDEC Standard Test Boards 67.8°C/W 55.9°C/W 50.1°C/W Multi-Layer PCB, JEDEC Standard Test Boards

47.9°C/W

42.1°C/W

39.4°C/W

NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.

T ABLE 9B. θJA VS . A IR F LOW T ABLE FOR A 32 L EAD VFQFN

θJA 0 Air Flow (Linear Feet per Minute)

Multi-Layer PCB, JEDEC Standard Test Boards

34.8°C/W

Integrated Circuit

Systems, Inc.

ICS8427-02

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LVCMOS/C RYSTAL -TO -LVHSTL F REQUENCY S YNTHESIZER

Integrated

Circuit

Systems, Inc.

ICS8427-02

500MH Z

, L

J ITTER

LVCMOS/C RYSTAL -TO -LVHSTL F REQUENCY S YNTHESIZER

P ACKAGE O UTLINE - K S UFFIX FOR A 32 L EAD VFQFN

T ABLE 10B. P ACKAGE D IMENSIONS

Reference Document: JEDEC Publication 95, MO-220

O I T A I R A V C E D E J S

R E T E M I L L I M N I S N O I S N E M I D L L A L

O B M Y S 2

-D H H V M

U M I N I M L

A N I M O N M

U M I X A M N 23A 08.0--00.11A 0

--50.03A .f e R 52.0b 81.05

2.00

3.0N D 8N E 8D C

I S A B 00.52D 5

2.152.25

2.3E C

I S A B 00.52E 52.152.252.3e C

I S A B 05.0L

03.00

4.00

5.0

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ICS8427-02

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T ABLE 11. O RDERING I NFORMA TION

While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems, Incorporated (ICS) assumes no responsibility for either its use or for infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments.The aforementioned trademark, HiPerClockS? is a trademark of Integrated Circuit Systems, Inc. or its subsidiaries in the United States and/or other countries.

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