ht1622v260

HT1622/HT1622G

RAM Mapping 32′8LCD Controller for I/O MCU

PATENTED

PAT No.:099352

Selection Table

Rev.2.601October 31,2013

General Description

HT1622is a peripheral device specially designed for I/O type MCU used to expand the display capability.The max.display segment of the device are 256patterns (32′8).It also supports serial interface,buzzer sound,Watchdog Timer or time base timer functions.The HT1622is a memory mapping and multi-function LCD

controller.The software configuration feature of the HT1622make it suitable for multiple LCD applications in-cluding LCD modules and display subsystems.Only three lines are required for the interface between the host controller and the HT1622.The HT162X series have many kinds of products that match various applications.

Features

·Operating voltage:2.7V~5.2V ·Built-in RC oscillator

·1/4bias,1/8duty,frame frequency is 64Hz ·Max.32′8patterns,8commons,32segments ·Built-in internal resistor type bias generator ·3-wire serial interface

·8kinds of time base or WDT selection ·Time base or WDT overflow output ·Built-in LCD display RAM

·R/W address auto increment

·Two selectable buzzer frequencies (2kHz or 4kHz)·Power down command reduces power consumption ·

Software configuration feature

·Data mode and Command mode instructions ·Three data accessing modes

·VLCD pin to adjust LCD operating voltage ·44/52/64-pin LQFP packages

HT1622G:Gold bumped chip

Block Diagram

Pin Assignment

Rev.2.602October31,2013

Pad Assignment

Chip size:94′98(mil)2

Bump height:18m m±3m m

Min.Bump spacing:23.102m m

Bump size:76′76m m2

*The IC substrate should be connected to VDD in the PCB layout artwork.

Rev.2.603October31,2013

Pad Coordinates Unit:m m

Pad Description

Rev.2.604October31,2013

Absolute Maximum Ratings

Supply Voltage...........................V SS-0.3V to V SS+5.5V Storage Temperature............................-50°C to125°C Input Voltage.............................V SS-0.3V to V DD+0.3V Operating Temperature...........................-40°C to85°C

Note:These are stress ratings only.Stresses exceeding the range specified under2Absolute Maximum Ratings2may cause substantial damage to the device.Functional operation of this device at other conditions beyond those listed in the specification is not implied and prolonged exposure to extreme conditions may affect device reliability. D.C.Characteristics Ta=25°C

Rev.2.605October31,2013

A.C.Characteristics Ta=25°C

Note: 1.If the conditions of Power-on Reset timing are not satisfied in power On/Off sequence,the internal Power-on Reset(POR)circuit will not operate normally.

2.If the VDD drops below the minimum voltage of operating voltage spec.during operating,the conditions

of Power-on Reset timing must be satisfied also.That is,the VDD must drop to0V and keep at0V for

20ms(min.)before rising to the normal operating voltage.

Rev.2.606October31,2013

Rev.2.607October 31,2013

Figure

1Figure 2

Figure 3

Figure 4.Power-on Reset Timing

Functional Description

Display Memory-RAM Structure

The static display RAM is organized into64′4bits and stores the display data.The contents of the RAM are di-rectly mapped to the contents of the LCD driver.Data in the RAM can be accessed by the READ,WRITE and READ-MODIFY-WRITE commands.The following is a mapping from the RAM to the LCD patterns.

Time Base and Watchdog Timer(WDT)

The time base generator and WDT share the same di-vided(?256)counter.TIMER DIS/EN/CLR,WDT DIS/EN/CLR and IRQ EN/DIS are independent from each other.Once the WDT time-out occurs,the pin will remain at logic low level until the CLR WDT or the IRQ DIS command is issued.

If an external clock is selected as the source of system frequency,the SYS DIS command turns out invalid and the power down mode fails to be carried out until the ex-ternal clock source is removed.

Buzzer Tone Output

A simple tone generator is implemented in the HT1622. The tone generator can output a pair of differential driv-ing signals on the BZ and BZ which are used to generate a single tone.

RAM Mapping

Timer and WDT Configurations

Rev.2.608October31,2013

Timing Diagrams

READ Mode (Command Code :110)

READ Mode (Successive Address Reading)

Rev.2.609October 31,2013

Command Format

The HT1622can be configured by the software setting.There are two mode commands to configure the HT1622resource and to transfer the LCD display data.The following are the data mode ID and the command mode ID:

If successive commands have been issued,the com-mand mode ID can be omitted.While the system is op-erating in a non-successive command or a non-successive address data mode,the CS pin should be set to 212and the previous operation mode will be re-set also.The CS pin returns to 202,a new operation mode ID should be issued first.

WRITE Mode(Successive Address Writing)

READ-MODIFY-WRITE Mode(Command Code:101)

READ-MODIFY-WRITE Mode(Successive Address Accessing)

Rev.2.6010October31,2013

Mode(Data and Command Mode)

Rev.2.6011October31,2013

Application Circuits

Note:The connection of IRQ and RD pin can be selected depending on the requirement of the MCU.

The voltage applied to V LCD pin must be equal to or lower than V DD.

Adjust VR to fit LCD display,at V DD=5V,V LCD=4V,VR=15k W±20%.

Adjust R(external pull-high resistance)to fit user￠s time base clock.

Command Summary

Rev.2.6012October31,2013

Note:X:Don￠t care

A5~A0:RAM address

D3~D0:RAM data

D/C:Data/Command mode

Def.:Power on reset default

All the bold forms,namely110,101,and100,are mode commands.Of these,100indicates the command mode ID.If successive commands have been issued,the command mode ID except for the first command will be omitted.The source of the tone frequency and of the time base or WDT clock frequency can be derived from an on-chip32kHz RC oscillator or an external32768Hz clock.Calculation of the frequency is based on the sys-tem frequency sources as stated above.It is recommended that the host controller should initialize the HT1622 after power on reset,for power on reset may fail,which in turn leads to the malfunctioning of the HT1622. Rev.2.6013October31,2013

Package Information

Note that the package information provided here is for consultation purposes only.As this information may be updated at regular intervals users are reminded to consult the Holtek website for the latest version of the package information.

Additional supplementary information with regard to packaging is listed below.Click on the relevant section to be trans-ferred to the relevant website page.

·Further Package Information(include Outline Dimensions,Product Tape and Reel Specifications)

·Packing Meterials Information

·Carton information

·PB FREE Products

·Green Packages Products

Rev.2.6014October31,2013

44-pin LQFP(10mm′10mm)(FP2.0mm)Outline Dimensions

Rev.2.6015October31,2013

Rev.2.6016October31,2013

Rev.2.6017October31,2013

Copyrightó2013by HOLTEK SEMICONDUCTOR INC.

The information appearing in this Data Sheet is believed to be accurate at the time of publica-tion.However,Holtek assumes no responsibility arising from the use of the specifications de-scribed.The applications mentioned herein are used solely for the purpose of illustration and Holtek makes no warranty or representation that such applications will be suitable without fur-ther modification,nor recommends the use of its products for application that may present a risk to human life due to malfunction or otherwise.Holtek￠s products are not authorized for use as critical components in life support devices or systems.Holtek reserves the right to alter its products without prior notification.For the most up-to-date information,please visit our web site at https://www.wendangku.net/doc/c08922739.html,.

Rev.2.6018October31,2013