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MAX4687EBT-T中文资料

MAX4687EBT-T中文资料
MAX4687EBT-T中文资料

General Description

The MAX4686/MAX4687/MAX4688 low on-resistance (R ON ), low-voltage analog switches operate from a sin-gle +1.8V to +5.5V supply. The MAX4686/MAX4687 are single-pole/single-throw (SPST) analog switches, and the MAX4688 is a single-pole/double-throw (SPDT) ana-log switch. The MAX4686 is a normally open (NO)switch, and the MAX4687 is a normally closed (NC)switch. The MAX4688 has one normally open (NO)switch and one normally closed (NC) switch.

When powered from a 3V supply these devices feature 2.5?(max) R ON , with 0.4?(max) R ON matching and 1?(max) flatness. The MAX4686/MAX4687/MAX4688 offer fast switching speeds (t ON = 30ns max, t OFF = 12ns max). The MAX4688 offers break-before-make action.The digital logic inputs are 1.8V logic compatible from a +2.7V to +3.3V supply. The MAX4686/MAX4687/MAX4688 are available in the chip-scale package (UCSP?), significantly reducing the required PC board area. The chip occupies only a 1.50mm x 1.02mm area.The 3 x 2 array of solder bumps are spaced with a 0.5mm bump pitch.

________________________Applications

MP3 Players Cellular Phones Power Routing

Battery-Operated Equipment Relay Replacement

Audio and Video Signal Routing Communications Circuits PCMCIA Cards Cellular Phones Hard Drives

Features

o 6-Bump, 0.5mm Pitch, UCSP o R ON

2.5?max (+3V Supply)10?max (+1.8V Supply)

o 0.4?max R ON Match Between Channels o 1?max R ON Flatness Over Signal Range o Low Leakage Currents Over Temperature

0.5nA (max) at T A = +25°C o Fast Switching: t ON = 30ns, t OFF = 12ns o Guaranteed Break-Before-Make (MAX4688)o +1.8V to +5.5V Single-Supply Operation o Rail-to-Rail ?Signal Handling o Low Crosstalk: -95dB (100kHz)o High Off-Isolation: -90dB (100kHz)o 1.8V Logic Compatible

MAX4686/MAX4687/MAX4688

2.5?, Low-Voltage, SPST/SPDT Analog Switches in UCSP Package

________________________________________________________________Maxim Integrated Products

1

Pin Configurations/Functional Diagrams/Truth Table

19-2042; Rev 1; 2/03

Ordering Information

UCSP is a trademark of Maxim Integrated Products, Inc.

For pricing, delivery, and ordering information,please contact Maxim/Dallas Direct!at 1-888-629-4642, or visit Maxim’s website at https://www.wendangku.net/doc/cb14744710.html,.

M A X 4686/M A X 4687/M A X 4688

2.5?, Low-Voltage, SPST/SPDT Analog Switches in UCSP Package

ABSOLUTE MAXIMUM RATINGS

ELECTRICAL CHARACTERISTICS

(V+ = +2.7V to +3.3V, V IH = +1.4V, V IL = 0.5V, T A = T MIN to T MAX , unless otherwise noted. Typical values are at 3V and T A = +25°C.)(Notes 3, 4)

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

All Voltages Referenced to GND

V+, IN .......................................................................-0.3V to +6V COM, NO, NC (Note1)..................................-0.3V to (V+ + 0.3V)Continuous Current NO, NC, COM ................................±100mA Peak Current NO, NC, COM

(pulsed at 1ms, 10% duty cycle) ...............................±200mA

Continuous Power Dissipation (T A = +70°C)

3 x 2 UCSP (derate 10.1mW/°C at +70°C)..................808mW Operating Temperature Range ...........................-40°C to +85°C Storage Temperature Range ............................-65°C to +150°C Bump Reflow Temperature .............................................+235°C

Note 1:Signals on NO, NC, and COM exceeding V+ are clamped by an internal diode. Limit forward-diode current to maximum cur-rent rating.

Note 2:This device is constructed using a unique set of packaging techniques that impose a limit on the thermal profile the device

can be exposed to during board level solder attach and rework. This limit permits only the use of the solder profiles recom-mended in the industry standard specification, JEDEC 020A, paragraph 7.6, Table 3 for IR/VPR and convection reflow.Preheating is requied. Hand or wave soldering is not allowed.

MAX4686/MAX4687/MAX4688

2.5?, Low-Voltage, SPST/SPDT Analog Switches in UCSP Package

_______________________________________________________________________________________

3

Note 4:UCSP parts are 100% tested at +25°C only and guaranteed by correlation at the full hot-rated temperature.Note 5:?R ON = R ON(MAX ) - R ON(MIN), between switches.

Note 6:Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the

specified analog signal ranges.

Note 7:Guaranteed by design.

Note 8:Off Isolation = 20log 10(V COM / V NO ), V COM = output, V NO = input to off switch.Note 9:Between switches.

ELECTRICAL CHARACTERISTICS (continued)

(V+ = +2.7V to +3.3V, V IH = +1.4V, V IL = 0.5V, T A = T MIN to T MAX , unless otherwise noted. Typical values are at 3V and T A = +25°C.)(Notes 3, 4)

M A X 4686/M A X 4687/M A X 4688

2.5?, Low-Voltage, SPST/SPDT Analog Switches in UCSP Package 4_______________________________________________________________________________________

631291518-40

10

-15

35

60

85

TURN-ON/OFF TIME vs. TEMPERATURE

TEMPERATURE (°C)

t O N /O F F (n s )

1000100

10

10.1

-40

10

-15

35

60

85

ON/OFF-LEAKAGE CURRENT

vs. TEMPERATURE

TEMPERATURE (°C)

O N /O F F -L E A K A G E C U R R E N T (p A )

80

6040

20

00

21

3

4

5

CHARGE INJECTION vs. V COM

V COM (V)

Q (p C )

0428

610120

2

3

1

4

5

6

SUPPLY CURRENT vs. SUPPLY VOLTAGE

M A X 4686/7/8 t o c 01

SUPPLY VOLTAGE (V)

S U P P L Y C U R R E N T (p A )

1.0

2.01.5

3.02.5

3.5

4.00

2

1

3

4

5

ON-RESISTANCE vs. V COM

V COM (V)

R O N (?)

0.5

1.0

2.0

1.5

2.5

3.0

1.0

0.5

1.5

2.0

2.5

3.0

ON-RESISTANCE vs. V COM (V+ = +3V)

V COM (V)

R O N (?)

0.5

1.10.90.71.31.51.71.9

2.12.32.5

2

1

3

4

5

ON-RESISTANCE vs. V COM (V+ = +5V)

V COM (V)

R O N (?)

00.5

1.0

1.5

2.01.5

2.5

3.5

4.5

2.0

3.0

4.0

5.0

5.5

LOGIC THRESHOLD VOLTAGE vs. SUPPLY VOLTAGE

V+ (V)

L O G I C T H R E S H O L D V O L T A G E (V )

0105

20153025351

32

4

5

6

TURN-ON/OFF TIME vs. SUPPLY VOLTAGE

V+ (V)

t O N /O F F (n s )

Typical Operating Characteristics

(T A = +25°C, unless otherwise noted.)

Applications Information

Logic Inputs

Where the MAX4686/MAX4687/MAX4688 have a +3.3V supply, IN may be driven low to GND and driven high to 5.5V. Driving IN rail-to-rail minimizes power con-sumption. Logic inputs accept up to +5.5V regardless of supply voltage.

Analog Signal Levels

Analog signals that range over the entire supply volt-age (V+ to GND) are passed with very little change in R ON (see T ypical Operating Characteristics ). The switches are bidirectional, so the NO, NC, and COM pins are both inputs or outputs.

Power-Supply Sequencing and Overvoltage Protection

CAUTION: Do not exceed the absolute maximum ratings because stresses beyond the listed ratings may cause permanent damage to devices.

MAX4686/MAX4687/MAX4688

2.5?, Low-Voltage, SPST/SPDT Analog Switches in UCSP Package

_______________________________________________________________________________________5

-120

0.01

1

10

0.1

100

FREQUENCY RESPONSE

FREQUENCY (MHz)

L O S S (d B )

-100-80-60-40-2010

1k 100k

TOTAL HARMONIC DISTORTION PLUS

NOISE vs. FREQUENCY

M A X 4686/7/8 t o c 11

FREQUENCY (Hz)

T H D + N (%)

1

0.01

0.1

100

10k

Typical Operating Characteristics (continued)

(T A = +25°C, unless otherwise noted.)

Figure 1. Overvoltage Protection Using External Blocking Diodes

Proper power-supply sequencing is recommended for all CMOS devices. Always apply V+ before applying analog signals, especially if the analog signal is not current limit-ed. If this sequencing is not possible, and if the analog inputs are not current limited to <20mA, add a small-sig-nal diode (D1) as shown in Figure 1. Adding a protection diode reduces the analog range to a diode drop (about 0.7V) below V+ (for D1). R ON increases slightly at low supply voltages. Maximum supply voltage (V+) must not exceed +6V.Protection diode D1 also protects against some overvoltage situations. No damage will result on Figure 1’s circuit if the supply voltage is below the absolute maximum rating and if a fault voltage up to the absolute maximum rating is applied to an analog signal pin.

UCSP Package Consideration

For general UCSP package information and PC layout considerations, please refer to the Maxim Application Note (Wafer-Level Ultra-Chip-Board-Scale Package).

UCSP Reliability

The chip-scale package (UCSP) represents a unique packaging form factor that may not perform equally to a packaged product through traditional mechanical relia-bility tests. CSP reliability is integrally linked to the user ’s assembly methods, circuit board material, and usage environment. The user should closely review these areas when considering use of a CSP package. Performance through Operating Life Test and Moisture Resistance remains uncompromised as it is primarily determined by the wafer-fabrication process.

Mechanical stress performance is a greater considera-tion for a CSP package. CSPs are attached through direct solder contact to the user ’s PC board, foregoing the inherent stress relief of a packaged product lead frame. Solder joint contact integrity must be https://www.wendangku.net/doc/cb14744710.html,rmation on Maxim ’s qualification plan, test data, and recommendations are detailed in the UCSP application note, which can be found on Maxim ’s website at https://www.wendangku.net/doc/cb14744710.html,.

M A X 4686/M A X 4687/M A X 4688

2.5?, Low-Voltage, SPST/SPDT Analog Switches in UCSP Package

6

_______________________________________________________________________________________

Figure 3. Break-Before-Make Interval (MAX4688 only)

MAX4686/MAX4687/MAX4688

2.5?, Low-Voltage, SPST/SPDT Analog Switches in UCSP Package

_______________________________________________________________________________________

7

Figure 4. Charge Injection

Test Circuits/Timing Diagrams (continued)

Figure 5. Off-Isolation/On-Channel Bandwidth, Crosstalk

Chip Information

TRANSISTOR COUNT: 150

Figure 6. Channel Off/On-Capacitance

M A X 4686/M A X 4687/M A X 4688

2.5?, Low-Voltage, SPST/SPDT Analog Switches in UCSP Package Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.

8_____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600?2003 Maxim Integrated Products

Printed USA

is a registered trademark of Maxim Integrated Products.

Package Information

(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,go to https://www.wendangku.net/doc/cb14744710.html,/packages .

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