LTC2951IDDB-1中文资料
128ms
25ms/DIV2951 TA01b
2
2951f
Supply Voltage (V IN ) ..................................–0.3V to 33V Input Voltages
P B ............................................................–6V to 33V KILLT ....................................................–0.3V to 2.7V OFFT .....................................................–0.3V to 2.7V K I L L .........................................................–0.3V to 7V Output Voltages
I N T .........................................................–0.3V to 10V EN/E N ....................................................–0.3V to 10V
(Note 1)
Operating Temperature Range
LTC2951C-1 ..............................................0°C to 70°C LTC2951C-2 ..............................................0°C to 70°C LTC2951I-1 ..........................................–40°C to 85°C LTC2951I-2 ..........................................–40°C to 85°C Storage Temperature Range DFN Package .....................................–65°C to 125°C TSOT-23 ............................................–65°C to 150°C Lead Temperature (Soldering, 10 sec) ..................300°C
ORDER PART NUMBER DDB PART*MARKING T JMAX = 125°C, θJA = 165°C/W EXPOSED PAD (PIN 9) UNCONNECTED
Consult LTC Marketing for parts speci? ed with wider operating temperature ranges. *The temperature grade is identi? ed by a label on the shipping container.
LBTB LBTD LBTB LBTD
T JMAX = 125°C, θJA = 140°C/W
ORDER PART NUMBER TS8 PART*MARKING LTBTC LTBTF LTBTC LTBTF
LTC2951CDDB-1LTC2951CDDB-2LTC2951IDDB-1LTC2951IDDB-2
LTC2951CTS8-1LTC2951CTS8-2LTC2951ITS8-1LTC2951ITS8-2
V IN 1PB 2KILLT 3GND 4
8 KILL 7 OFFT 6 EN/EN 5 INT
TOP VIEW
TS8 PACKAGE
8-LEAD PLASTIC TSOT-23TOP VIEW
DDB8 PACKAGE
8-LEAD (3mm × 2mm) PLASTIC DFN 5
6789
4
321INT EN/EN OFFT KILL
GND KILLT PB V IN The ● denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at T A = 25°C. V IN = 2.7V to 26.4V, unless otherwise noted. (Note 2)
SYMBOL PARAMETER CONDITIONS
MIN TYP MAX UNITS
V IN Supply Voltage Range Steady State Operation ● 2.7 26.4 V I IN V IN Supply Current System Power On ● 6 12 μA V UVL V IN Undervoltage Lockout V IN Falling ● 2.2 2.3 2.4 V
V UVL(HYST) V IN Undervoltage Lockout Hysteresis
● 50
300 600 mV
ABSOLUTE AXI U RATI GS
W W W
U PACKAGE/ORDER I FOR ATIO
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W ELECTRICAL CHARACTERISTICS
The
● denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at T A = 25°C. V IN = 2.7V to 26.4V, unless otherwise noted. (Note 2)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Push Button Pin (P B)
V P B(MIN, MAX)P B Voltage Range Single-Ended●–126.4V
I P B P B Input Current 2.5V < V P B < 26.4V
V P B = 1V
V P B = 0.6V ●
●
●
–1
–3
–6
–9
±1
–12
–15
μA
μA
μA
V P B(VTH)P B Input Threshold P B Falling●0.60.81V V P B(VOC)P B Open Circuit Voltage I P B = –1μA●1 1.62V Timing Pins (KILLT, OFFT)
I KILLT, OFFT(PU)KILLT/OFFT Pull Up Current V KILLT, OFFT = 0V●–2.4–3–3.6μA I KILLT, OFFT(PD)KILLT/OFFT Pull Down Current V KILLT, OFFT = 1.3V● 2.43 3.6μA t DB, ON Turn On Debounce Time P B Falling →Enable Asserted●100128163ms t DB, OFF Internal Turn Off Debounce Time OFFT Pin Float, P B Falling →I N T Falling●263241ms t OFFT Additional Adjustable Turn Off Time C OFFT = 1500pF●911.513.5ms μP Handshake Pins (I N T, K I L L)
I I N T(LKG)I N T Leakage Current V I N T = 3V●±1μA V I N T(VOL)I N T Output Voltage Low I I N T = 3mA●0.110.4V V K I L L(TH)K I L L Input Threshold Voltage K I L L Falling●0.570.60.63V V K I L L(HYST)K I L L Input Threshold Hysteresis●103050mV I K I L L(LKG)K I L L Leakage Current V K I L L = 0.6V●±0.1μA t K I L L(PW)K I L L Minimum Pulse Width●30μs t K I L L(PD)K I L L Propagation Delay K I L L Falling →Enable Released●30μs t K I L L, ON BLANK K I L L Turn On Blanking (Note 3)K I L L = Low, Enable Asserted → Enable
Released
●400512650ms
t K I L L, OFF DELAY Internal K I L L Turn Off Delay
(Note 4)KILLT Pin Float, K I L L = High, I N T Asserted →
Enable Released
●100128163ms
t K I L L, OFF DELAY, ADDITIONAL Additional Adjustable K I L L Turn Off
Delay (Note 4)
C KILLT = 1500pF●911.513.5ms
t EN/E N, Lock Out EN/E N Lock Out Time (Note 5)Enable Released → Enable Asserted●200256325ms I EN/E N(LKG)EN/E N Leakage Current V EN/E N = 1V, Sink Current Off●±0.1μA V EN/E N(VOL)EN/E N Voltage Output Low I EN/E N = 3mA●0.110.4V
Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired.
Note 2: All currents into pins are positive; all voltages are referenced to GND unless otherwise noted.
Note 3: The K I L L turn on blanking timer period is the waiting period immediately after the enable output is asserted. This blanking time allows suf? cient time for the DC/DC converter and the μP to perform power up tasks. The K I L L and P B inputs are ignored during this period. If K I L L remains low at the end of this time period, the enable output is released, thus turning off system power. This time delay does not include t DB, ON.Note 4: The internal K I L L turn off delay (t K I L L, OFF DELAY) is the default delay from the initiation of a power off sequence (I N T falling, K I L L = high), to the release of the enable output. The additional, adjustable K I L L turn off delay (t K I L L, OFF DELAY, ADDITIONAL) uses an optional external capacitor (C KILLT) to provide extra delay from I N T falling to the release of the enable output. If the K I L L input switches low at any time during K I L L turn off delay, enable is released, thus turning off system power.
Note 5: The enable lock out time is designed to allow an application to properly power down such that the next power up sequence starts from a consistent powered down con? guration. P B is ignored during this lock out time. This time delay does not include t DB, ON.
ELECTRICAL CHARACTERISTICS
32951f
6
2951f
V IN (Pin 1/Pin 4): Power Supply Input: 2.7V to 26.4V.
P B (Pin 2/Pin 3): Push Button Input. Connecting P B to
ground through a momentary switch provides on/off
control via the EN/E N pin. An internal 100k pull-up resis-tor connects to an internal 1.9V bias voltage. The rugged
P B input can be pulled up to 26.4V externally without
consuming extra current.
KILLT (Pin 3/Pin 2): Additional, Adjustable K I L L Turn Off
Delay Input (t K I L L , OFF DELAY , ADDITIONAL ). A capacitor to
ground provides additional delay time (beyond the internal
default 128ms, t K I L L , OFF DELAY ) from I N T falling to the
automatic release of the enable output. The K I L L turn off
delay feature ensures the release of the enable pin under
system fault conditions, such as the μP not responding
to the LTC2951 interrupt signal (I N T low).
GND (Pin 4/Pin 1): Device Ground.
I N T (Pin 5/Pin 8): Open Drain Interrupt Output. After a push button turn-off event is detected (t DB, OFF + t OFFT ), the LTC2951 interrupts the system (μP) by bringing the I N T pin low. Once the system ? nishes its power down and housekeeping tasks, it sets K I L L low, which in turn releases the enable output. If at the end of the power down timer period (t K I L L , OFF DELAY + t K I L L , OFF DELAY , AD-DITIONAL ) K I L L is still high, the enable output is released immediately. I N T may optionally be tied to K I L L to release
the enable output immediately after the turn-off event has
been detected (I N T low).
EN (LTC2951-1, Pin 6/Pin 7): Open Drain Enable Output.
This pin is intended to enable system power. EN goes high after a valid P B turn on event (t DB, ON ). EN goes low if: a) K I L L is not driven high within 512ms of the initial valid P B
power turn-on event, b) K I L L is driven low during normal
operation, or c) a second valid P B event (power turn-off)
is detected. The operating range for this pin is 0V to 10V.
A 100k pull-up is recommended if not available in the
DC/DC converter.
E N (LTC2951-2, Pin 6/Pin 7): Open Drain Enable Output.
This pin is intended to enable system power. E N is asserted
low after a valid P B turn-on event (t DB, ON ). E N releases
high if: a) K I L L is not driven high within 512ms of the
initial valid P B power turn-on event, b) K I L L is driven low
during normal operation, or c) a second valid P B event
(power turn-off) is detected. The operating range of this
pin is 0V to 10V. A 100k pull-up is recommended if not
available in the DC/DC converter.
OFFT (Pin 7/Pin 6): Additional Adjustable Turn Off Time
Input (t OFFT ). A capacitor to ground determines the ad-ditional time (beyond the internal default 32ms, t DB, OFF ) that the P B pin must be held low before initiating a power down sequence (I N T falling). Floating this pin results in a default turn off debounce time of 32ms. K I L L (Pin 8/Pin 5): K I L L Input. Forcing K I L L low releases
the enable output. During system turn on, this pin is blanked
by a 512ms internal timer (t K I L L , ON BLANK ) to allow the
system to pull K I L L high. This pin has an accurate 0.6V
threshold and can be used as a voltage monitor input.
Exposed Pad (Pin 9): Exposed Pad may be left open or
connected to device ground.
(TSOT-23/DFN)
PI FU CTIO S
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9
2951f
Description
The LTC2951 is a low power (6μA), wide input voltage range (2.7V to 26.4V), push button On/Off controller that can interface to a μP and a power supply. The part incorporates all the ? exible timing needed to debounce the push button input (P B ). The LTC2951 also provides a simple interface (I N T output, K I L L input) to allow a system to power on and power off in a controlled manner. The wide input voltage range allows a system designer to operate from single cell to multi-cell battery stacks. Very low quiescent current makes the LTC2951 ideal for continuously monitoring the On/Off push button of a handheld device.Turn On
When power is ? rst applied to the LTC2951, the part initial-izes the output pins. Any DC/DC converters connected to the EN/E N pin will therefore be off. To assert the enable output, P B must be held low for a minimum of 128ms (t DB , ON ).
Once the enable output is asserted, any DC/DC converters connected to this pin are turned on. The K I L L input from the μP is ignored during the succeeding 512ms blanking time (t K I L L , ON BLANK ). This blanking time represents the maximum time required to power up the DC/DC converter and the μP . If K I L L is not brought high during this 512ms time window, the enable output is released. The assump-tion is that 512ms is suf? cient time for the system to power up.Turn Off
To initiate a power off sequence, P B must be held low for a minimum of 32ms (t DB , OFF ). Additional turn off debounce time may be added via an optional capacitor connected to the OFFT pin (t OFFT ). The following equation describes the additional time that P B must be held low to initiate a power off sequence. C OFFT is the OFFT external capacitor: C OFFT = 1.56E-4 [μF/ms] ? (t OFFT – 1ms)
Once P B has been validly pressed, I N T is switched low. This alerts the μP to perform its power down and house-keeping tasks.
K I L L Turn Off Delay
The LTC2951 provides a failsafe feature that allows the user to turn off system power (via P B ) under system fault conditions. During a normal power down sequence, the LTC2951 ? rst interrupts the μP by setting I N T low. The μP then performs power down and housekeeping tasks and drives K I L L low when done. The LTC2951 releases the enable output, thus turning off system power. The K I L L turn off timer starts when I N T is driven low. If the μP fails to respond during this timeout period, the enable output will automatically release. The default power down timeout period is 128ms (t K I L L , OFF DELAY ), which can be extended by placing an optional capacitor on the KILLT pin (t K I L L , OFF DELAY , ADDITIONAL ). The following equation describes the additional power down timeout period. C KILLT is the KILLT external capacitor:
C KILL T = 1.56e-4 [μF/ms] ? (t K I L L , OFF DELAY , ADDITIONAL – 1ms)Note that K I L L can be driven low (thereby releasing the enable output) at any time after t K I L L , ON BLANK period.Simpli? ed Power On/Off Sequence
Figure 1 shows a simpli? ed LTC2951-1 power on and power off sequence. A high to low transition on P B (t 1) initiates the power on sequence. This diagram does not show any bounce on P B . In order to assert the enable output, the P B pin must stay low continuously (P B high resets timers) for 128ms (t 2–t 1). Once EN goes high (t 2), an internal 512ms blanking timer is started. This blanking timer is designed to give suf? cient time for the DC/DC converter to reach its ? nal voltage, and to allow the μP enough time to perform power on tasks.
The K I L L pin must be pulled high within 512ms of the EN pin going high. Failure to do so results in the EN pin going low 512ms after it went high. (EN = low, see Figure 2). Note that the LTC2951 does not sample K I L L and P B until after the 512ms internal timer has expired. The reason P B is ignored is to ensure that the system is not forced off while powering on. Once the 512ms timer expires (t 4), the release of the P B pin is then debounced with an internal 32ms timer. The system has now properly powered on and the LTC2951 monitors P B
APPLICATIO S I FOR ATIO
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Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
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LT/TP 0405 500 ? PRINTED IN USA