L6385ED013TR;L6385E;L6385ED;中文规格书,Datasheet资料

October 2007Rev 11/16

L6385E

High-voltage high and low side driver

Features

■High voltage rail up to 600V

■dV/dt immunity ±50V/nsec in full temperature range

■

Driver current capability:–400mA source,–650mA sink

■Switching times 50/30 nsec rise/fall with 1nF load

■CMOS/TTL Schmitt trigger inputs with hysteresis and pull down

■Under voltage lock out on lower and upper driving section

■Internal bootstrap diode ■

Outputs in phase with inputs

Description

The L6385E is an high-voltage device, manufactured with the BCD"OFF-LINE"

technology. It has an Half - Bridge Driver structure that enables to drive independent referenced N Channel Power MOS or IGBT . The High Side (Floating) Section is enabled to work with voltage Rail up to 600V . The Logic Inputs are CMOS/TTL compatible for ease of interfacing with controlling devices.

https://www.wendangku.net/doc/c516701810.html,

Contents L6385E

Contents

1Electrical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

1.1Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

1.2Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

1.3Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

3Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

3.1AC operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

3.2DC operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

3.3Timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

4Bootstrap driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

4.1CBOOT selection and charging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 5Typical characteristic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 6Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 7Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 8Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

2/16

L6385E Electrical data

3/16

1 Electrical data

1.1

Absolute maximum ratings

Note:ESD immunity for pins 6, 7 and 8 is guaranteed up to 900 V (Human Body Model)

1.2 Thermal data

1.3 Recommended operating conditions

Table 1.

Absolute maximum ratings

Symbol Parameter

Value Unit V out Output voltage -3 to V boot -18 V V cc Supply voltage - 0.3 to +18 V V boot Floating supply voltage -1 to 618 V V hvg High sidegate output voltage -1 to V boot V V lvg Low side gate output voltage -0.3 to V cc +0.3 V V i Logic input voltage -0.3 to V cc +0.3

V dV out /d t Allowed output slew rate

50 V/ns P tot T otal power dissipation (T J = 85 °C) 750 mW T j Junction temperature 150 °C T s

Storage temperature

-50 to 150

°C

Table 2.

Thermal data

Symbol Parameter SO-8 DIP-8Unit R th(JA)

Thermal Resistance Junction to ambient

150

100

°C/W

Table 3.

Recommended operating conditions

Symbol Pin Parameter

Test condition

Min

Typ Max Unit

V out 6 Output voltage (1)1.If the condition Vboot - Vout < 18V is guaranteed, Vout can range from -3 to 580V 580 V

V BS (2)2.V BS = V boot - V out

8

Floating supply voltage (1)

17 V

f sw Switchin

g frequency HVG,LVG load C L = 1nF

400 kHz V cc

3 Supply voltage

17

V T J

Junction temperature

-45 125

°C

Pin connection L6385E

4/16

2 Pin connection

Table 4.

Pin description

N°Pin Type Function

1 LIN I Low side driver logic input 2

HIN

I

High side driver logic input 3 V cc Low voltage power supply 4 GND

Ground 5 LVG (1) 1.The circuit guarantees 0.3V maximum on the pin (@ Isink = 10mA). This allows to omit the "bleeder"

resistor connected between the gate and the source of the external MOSFET normally used to hold the pin low.

O

Low side driver output

6 VOUT O

High side driver floating reference 7 HVG (1) O

High side driver output 8 V boot

Bootstrap supply voltage

5/16

3 Electrical characteristics

3.1 AC operation

3.2 DC operation

Table 5.

AC operation electrical characteristcs (V CC = 15V; T J = 25°C)

Symbol Pin

Parameter

Test condition Min

Typ Max

Unit t on 1 vs 5 2 vs 7High/low side driver turn-on

propagation delay

V out = 0V 110ns t off 1 vs 52 vs 7High/low side driver turn-off propagation delay V out = 0V 105ns t r 5, 7Rise time C L = 1000pF 50 ns t f

5, 7

Fall time

C L = 1000pF

30

ns

Table 6.

DC operation electrical characteristcs (V CC = 15V; T J = 25°C)

Symbol

Pin

Parameter

Test condition

Min

Typ

Max

Unit

Low supply voltage section V cc 3

Supply voltage

17 V V ccth1Vcc UV turn on threshold 9.19.610.1V V ccth2Vcc UV turn off threshold 7.9

8.38.8

V V cchys Vcc UV hysteresis 1.3 V I qccu Undervoltage quiescent

supply current V cc ≤ 9V 150 220μA I qcc Quiescent current V in = 15V 250320μA R dson

Bootstrap driver on resistance (1)

V cc ≥12.5V

125

?

Bootstrapped supply voltage section V BS 8

Bootstrap supply voltage 17 V V BSth1 V BS UV turn on threshold 8.5 9.5 10.5 V V BSth2 V BS UV turn off threshold 7.2

8.2 9.2

V V BShys V BS UV hysteresis 1.3

V I QBS V BS quiescent current HVG ON 200 μA I LK

High voltage leakage current

V hvg = V out = V boot = 600V

10 μA

High/low side driver I so 5,7

Source short circuit current V IN = V ih (t p < 10μs) 300 400 mA I si

Sink short circuit current

V IN = V il (tp < 10μs) 450 650

mA

6/16

3.3 Timing diagram

Symbol

Pin

Parameter

Test condition

Min

Typ

Max

Unit

Logic inputs V il

1, 2

Low level logic threshold voltage

1.5 V

V ih High level logic threshold voltage

3.6 V

I ih 1, 2

High level logic input current V IN = 15V 50

70 μA I il

Low level logic input current V IN = 0V

1

μA

1.R DS(on) is tested in the following way:

where I 1 is pin 8 current when V CBOOT = V CBOOT1, I 2 when V CBOOT = V CBOOT2

Table 6.

DC operation electrical characteristcs (continued)(V CC = 15V; T J = 25°C)

R DSON V CC

V CBOOT1–()V CC V CBOOT2–()–I 1V CC ,V CBOOT1()I 2V CC ,V CBOOT2()

–------------------------------------------------------------------------------------------------------=

L6385E Bootstrap driver

7/16

4 Bootstrap driver

A bootstrap circuitry is needed to supply the high voltage section. This function is normally

accomplished by a high voltage fast recovery diode (Figure 4 a). In the L6385E a patented integrated structure replaces the external diode. It is realized by a high voltage DMOS, driven synchronously with the low side driver (LVG), with in series a diode, as shown in Figure 4 b. An internal charge pump (Figure 4 b) provides the DMOS driving voltage. The diode connected in series to the DMOS has been added to avoid undesirable turn on of it.

4.1 C BOOT selection and charging

To choose the proper C BOOT value the external MOS can be seen as an equivalent capacitor. This capacitor C EXT is related to the MOS total gate charge:

The ratio between the capacitors C EXT and C BOOT is proportional to the cyclical voltage loss.

It has to be:

C BOOT >>>C EXT

e.g.: if Q gate is 30nC and V gate is 10V , C EXT is 3nF . With C BOOT = 100nF the drop would be 300mV.

If HVG has to be supplied for a long time, the C BOOT selection has to take into account also the leakage losses.

e.g.: HVG steady state consumption is lower than 200μA, so if HVG T ON is 5ms, C BOOT has to supply 1μC to C EXT . This charge on a 1μF capacitor means a voltage drop of 1V .The internal bootstrap driver gives great advantages: the external fast recovery diode can be avoided (it usually has great leakage current).

This structure can work only if V OUT is close to GND (or lower) and in the meanwhile the LVG is on. The charging time (T charge ) of the C BOOT is the time in which both conditions are fulfilled and it has to be long enough to charge the capacitor.

The bootstrap driver introduces a voltage drop due to the DMOS R DSON (typical value: 125 ?). At low frequency this drop can be neglected. Anyway increasing the frequency it must be taken in to account.

The following equation is useful to compute the drop on the bootstrap DMOS:

where Q gate is the gate charge of the external power MOS, R dson is the on resistance of the

bootstrap DMOS, and T charge is the charging time of the bootstrap capacitor.

C EXT Q

gate V gate

--------------=V drop I ch e arg R dson V drop →Q gate

T ch e arg -------------------R dson

==

Bootstrap driver L6385E

8/16For example: using a power MOS with a total gate charge of 30nC the drop on the bootstrap DMOS is about 1V, if the T charge is 5μs. In fact:

V drop has to be taken into account when the voltage drop on C BOOT is calculated: if this drop is too high, or the circuit topology doesn’t allow a sufficient charging time, an external diode can be used.

V drop

30nC

5μs

--------------125?0.8V

～

?

=

L6385E Typical characteristic

9/16

5 Typical characteristic

Figure 5.

Typical rise and fall times vs

Figure 6.

Quiescent current vs supply

Figure 9.

VBOOT UV turn On threshold

Figure 10.Vcc UV turn Off threshold vs

Typical characteristic L6385E

10/16Figure 11.V BOOT UV turn Off threshold

Figure 12.Output source current vs Figure 13.Vcc UV turn On threshold vs

Figure 14.Output sink current vs

分销商库存信息:

STM

L6385ED013TR L6385E L6385ED