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Application Report

SLOA103 - July 2003

1Layout Guidelines for TPA300x Series Parts High Performance Linear/Audio Power Amplifiers

ABSTRACT

This article provides a well-reinforced procedure for the PCB layout task as it pertains to the

TPA300x series of class D amplifiers. This information can also be used in the layout of the

TPA200x series, or any other class D audio amplifier.

This task needs a logical sequence. If we simply jump into the layout task, without

understanding how the circuits work, we risk not having an optimal end result. Whether the

design engineer does the layout on his or her own or hands the layout task off to the

appropriate PCB specialist, there needs to be a clear understanding of the fundamentals of

the circuit on the designer’s part. As is true in most any engineering practice, there is no

unique solution to a given problem. In this case, there is no unique solution to a given layout.

However, several unique steps should be followed in order to achieve an optimal solution.

This article has four major parts. The first is the power train analysis and output inductor

specification section. This is the most important section as well as the most involved. Second,

there is a brief section on noise and grounding. Third, there is a detailed section on the

component placement and layout tasks. The fourth section is an EMI mitigation example

performed on the same principles illustrated in this document. From front to back this should

be a two hour read. More importantly before, throughout, and after the process of building the end product, this application note serves as a reference to the designer.

Contents

1

Power Train Analysis 2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.1Specifying the Output Inductors 10. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

Noise 11. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.1Grounding 12. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3Component Placement 13

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.1Design Example 13

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.1.1Design Example Constraints 13

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.1.2Placement 14

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2PCB Layout 17

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.1Trace, Via, and Wire Consideration 17

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.2Routing 17

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4EMC-The Final Word: Did Those Tricks Really Work?18

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.1The Arsenal 18

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.2The Mitigation Task 19

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5References 22

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Trademarks 22

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

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2Layout Guidelines for TPA300x Series Parts

Appendix A Copper Wire Current Density 23

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A.1Current Density Table 23

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Appendix B PCB Layers 25

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . B.1Board Layers 25

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Appendix C Bruce Carsten Associates, Inc.31

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C.1Appnote 31

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . List of Figures

1Switching Waveforms 3

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2Power Train Schematic For 1 Channel of TPA300x 4

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3Power Cycle 4

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4Dead Time 5

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5t2-Q3 Channel Turned On 5

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6Time t3 And t1 - Equivalent Paths 6

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7Time t4 Is The Same as t06

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8t5-Freewheel Cycle 6

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9t6-Q2 Is Turned On 7

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10Time t7-Similar to t57

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11Time t8-A Power Cycle 8

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12Current Waveforms 8

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13Schematic 14

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14PCB Layout 16

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15Initial Layout Noise 19

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16Noise-First Segmentation Change 20

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17Noise-With Staggered MLCCs Along the Trace Length 20

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18Noise Signature-After Adding a Common Mode Choke 21

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . List of Tables

1Header Pinout-Output Side 15

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1Power Train Analysis

The first critical step is to map the power current flow through the system. In this case, the

system includes the PCB, Vcc/Return header, and the output connections. The first thing that

needs to be understood for any switchmode circuit is the current flow through the system in each

switch state. Usually there are fixed physical aspects of the board that determine some of this,

namely the board dimensions and the placement of the input, output and Vcc/Return

connections. Once these physical constraints are known, it is important to look at the key

elements in the power train and place them so that they can be optimally routed. The routing of

every current path in this chain is critical to the over all performance of the amplifier. A good

understanding of the operation of the amplifier proves invaluable in the placement task as well

as the PCB layout.

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3

Layout Guidelines for TPA300x Series Parts Energy is switched from the input decoupling capacitors through the TPA300x, to the filter

elements, to the load, through the other filter leg, through OUT-/OUT+, through the ‘300x, and

back to the input decoupling capacitors. This power path is lengthy and complex. The nodes

involved with this switching action are: Out ±, Pvcc, Pgnd. When positioning, it is a good idea to

visualize the current flowing through various switching cycles. The switching waveforms and

corresponding switch diagrams may serve to clarify the switching intervals and the current paths

involved during various switching intervals. The state diagrams below illustrate a positive

excursion. For a negative excursion, simply switch the half bridge legs.

VCC

GND

VCC

GND

OUT+

OUT-

VCC

GND

VCC

GND

OUT+

OUT-

t0t1t2t3t4t5t6t7t8

Figure 1.Switching Waveforms

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4Layout Guidelines for TPA300x Series Parts

Power Trans Schematic for 1 Channel of TPA300x

Figure 2.Power Train Schematic For 1 Channel of TPA300x

Note that the mosfets (Q1 thru Q4) are modeled with ideal switches, in parallel with ideal diodes

(D1 thru D4), for this analysis.

Q4 = SHORT

Q3 = OPEN t0

Figure 3.Power Cycle

Time t0 is a power cycle. Energy from the decoupling capacitors is switched through the output

inductors and through the load. The inductors are charged in this cycle, while the decoupling

capacitors are discharged slightly. The current path consists of Pvcc, OUTP , the output filters,

output capacitors, the load, OUTN, and Pgnd.

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5

Layout Guidelines for TPA300x Series Parts

Q4 = OPEN

Q3 = OPEN Figure 4.Dead Time

Time t1 occurs during the dead time between the high side and low side switches in the OUTN

leg of the bridge. At this time, both Q3 and Q4 are open. Since there is no connection to the

decoupling capacitors, this is a freewheel cycle. At this time, both switches are off. The

inductors are no longer being driven from the input decoupling capacitors. The current waveform

changes slope at this instant. The voltage across the inductors changes instantaneously in an

attempt to keep the current flowing. This polarity change forward biases the body diode of Q3.

The channel of Q3 is off, however, the body diode is conducting. The current path consists of

PVcc, OUTP

, the output filters, the load, and OUTN.Q4 = OPEN

Figure 5.t2-Q3 Channel is Turned On

At time t2, the channel of Q3 is turned on. Since current had been flowing through the body

diode, the voltage drop across Q3 is very low (Vf of the body diode) when Q3 is turned on. The

current path consists of PVcc, OUTP , the output filters, the load, and OUTN.

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6Layout Guidelines for TPA300x Series Parts

Q4 = OPEN

Q3 = OPEN Figure 6.Time t3 and t1 - Equivalent Paths

Time t3 and t1 are equivalent paths. This is also a transition. The difference lies in the transition

to t4. The transition from t1 to t2 was a soft transition. The output inductors forward biased the

body diode of Q3 before it turned on. In this case, the output inductors source current around

the same loop; only the next transition turns on Q4. This is a hard transition.

Q4 = SHORT

Q3 = OPEN t4

Figure 7.

Time t4 Is The Same as t0

t5

Figure 8.t5-Freewheel Cycle

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7

Layout Guidelines for TPA300x Series Parts Time t5 is a freewheel cycle that occurs during the dead time of the OUTP leg of the bridge. At

this time, both switches are off in the OUTP leg and the current through the output inductors

forward biases the body diode of Q2. The current path consists of Pgnd, OUTP , the output

filters, the load, and OUTN.

t6

Figure 9.t6-Q2 Is Turned On

At time t6, Q2 is turned on. Since the body diode of Q2 was conducting, the voltage across Q2 is

minimal when it is turned on (Vf of the body diode). The current path is the same as t4.

t7

Figure 10.Time t7-Similar to t5

Time t7 is similar to t5. The only exception is in the next cycle. Time t4 to time t5 was a soft

transition. Time t6 to t7 is a hard transition. The current path is the same as t5.

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8Layout Guidelines for TPA300x Series Parts

Q4 = SHORT

Q3 = OPEN

t8

Figure 11.Time t8-A Power Cycle

Time t8 is the same as t0. This is a power cycle having the same current path as t0.

From the switching diagrams above, the current waveforms through the power transistors are:

i Q1

i Q2

i Q3

i Q4

t0t1t2t3t4t5t6t7t8

Figure 12.Current Waveforms

Note that FB1, FB2, C5, and C6 are for high frequency noise filtering and do not effect the

power train operation.

In every switch state above, it is important to understand the role of the filter inductors (L1 and

L2). These parts are excited with a square wave from the half bridge legs. We know that an

inductor wants to look like a current source, that is, it opposes any change in current.

If we look into Ohm’s law for an inductor, we see the equation:

V +*Ldi

dt In the case of the switching amplifier, V across the inductor is known with each switch state, L is

a constant value, and dt is the time spent in a particular cycle. There is then a dependant

variable, di. If we approximate dt as ?t and di as ?i, we can rearrange the approximation:

(1)

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9

Layout Guidelines for TPA300x Series Parts D i +ǒ*V L

ǔ D t This is the ripple current in the output inductor.From the diagrams above, it is clear that there are two states for the output inductors. When the

inductors are switched to Vcc on one leg and ground on the other leg, they are charging. This is

a charge cycle. When the output is switched any other way, the inductor begins to discharge, at

this point the slope of the current in the inductor changes. The voltage across the inductor

reverses polarity at this instant to oppose the change in current flow. We also know that an ideal

inductor cannot sustain a dc voltage drop. This means that the volt-time product in the charge

state of the inductor is equal to the volt-time product in the discharge state.

Building on the example above, the duty cycle of OUTP is about 2/3 or 67%. The duty cycle of

OUTN is then (1-2/3) or 33%. If the switching frequency is 250 kHz then t cycle = 4 μs. Looking at

each half bridge leg on its own.

OUTP is tied to Vcc for 2.66 μs and then tied to ground for 1.33 μs. OUTN is tied to Vcc for

1.33μs and then tied to ground for

2.66 μs.

Assuming that these duty cycles are steady state, if we look at L1:

?

V × t (charge) = (Vcc - VC1) × 2.66 μs ?

V ×t (discharge) = (VC1) × 1.33 μs Since these volt-time products are equal, we can combine these two equations to get:?

VC1 = Vcc × (2.66/4)To solve this equation for VC1, we get:?VC1=Vcc*D outp

This is the dc transfer function of the OUTP leg of this amplifier. In this example, this is 2 Vcc/3.

We can do the same for L2 to get:

?

VC2 = Vcc × (1.33/4)?VC2 = Vcc × (1-D outp )

In this example, this is Vcc/3. This is the dc transfer function for the OUTN leg of this amplifier.

So the output voltage across the bridge legs is then:

?VC1 - VC2 or Vcc/3.

If we apply equation 2), and there is no interaction between the half bridges, the ripple current in

the inductor (L1) is then:

?

?i=((Vcc - 2/3 × Vcc) × 2/3 × 4 μs)/L1which can be simplified to:??i = (2/9) × (Vcc × t cycle /L1)

The same is true for L2. For this discussion, if Vcc = 12 V, ?i = 711 mA in both L1 and L2.

(2)

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Note that the ripple current can not be completely analyzed in this fashion. When the bridge

traverses its various states, the inductors are actually charged in series. Due to our proprietary modulation scheme, there are two charge cycles for the inductors for each t cycle. Both of these charge cycles are equivalent as are the discharge cycles. Relative to the output, the frequency is effectively doubled. The interaction between the two half bridge legs serves to reduce the ripple current dramatically.

If we work through this, we see that the inductors are charged in series for 0.66 μs. They then discharge for 1.33 μs. If the output has the same steady state value of Vcc/3, and we apply

equation 2), it becomes clear that the ripple current is:

??i = [(Vcc - Vcc/3) × 0.66μs]/2 × L1

which simplifies to:

??i = (2/9) × (Vcc × t’cycle)/ (2 × L1)

Note: Due to the output frequency doubling, t’cycle= (t cycle)/2

In this example, If Vcc = 12 V, ?i = 177 mA

By having the bridge legs interleaved, the ripple current dropped by a factor of 4.

While the switch diagrams and equations illustrate the complexity of the power train, the nodes involved are reasonably simple. The output filters, the load, Pgnd, Pvcc, and the connections to the input decoupling capacitors. These node voltages and mesh currents need to be visualized for proper component placement. As we get beyond the placement task into the layout, the

switch diagrams are useful for analyzing mesh currents to use the PCB traces to cancel noise.

1.1Specifying the Output Inductors

There are a few important parameters that need to be addressed when specifying the output

inductors. These specifications are:

?Inductance value

?Current carrying capability

?Saturation current

?Self resonant frequency

?DC resistance (DCR)

?Max Volt-time product (V*μs)

The current carrying capability is usually specified as two different values: I rms and I sat. I rms is clearly the RMS current that the part can withstand. I sat varies from manufacturer to

manufacturer. It is usually specified as the dc current value that causes the inductance to drop 10%. Recall, a totally saturated inductor has a permeability of 1.0 μ0, the same as free space, while the permeability of the core in an unsaturated state is much higher. Since μ is proportional to inductance, we can conclude that a saturated inductor has minimal inductance. This minimal inductance can cause excessive ripple currents in the bridge switches and premature failure of the TPA300x.

The worst case I rms in our output is the root of the sums of the squares of peak output current as seen by the load and the RMS ripple current in the inductor. We use the peak output current

because the amplifier may have to source this current to the load for several cycles in clipping.

The saturation current indicates the maximum dc stress that the inductor can handle in a dc

circuit.

10Layout Guidelines for TPA300x Series Parts

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11

Layout Guidelines for TPA300x Series Parts I rms (worst case)+???

ǒV CC RI ǔ2)ǒD i 3?ǔ2????ǒA rms ǔI peak (worst case)+ǒV CC RI ǔ)D i 2ǒA peak ǔ

In our example, if the load has a 4-? DCR, this is 3.002 A RMS, and 3.11 A peak.

The self resonant frequency (SRF) of the inductor is the paralell resonant frequency of the part.

This exists due to the parasitic capacitance between the windings. At frequencies above the

SRF, the inductor looks like a coupling capacitor. This frequency should be much higher than the

switching frequency of the amplifier.

?SRF>10 × fsw

The volt-time product indicates how much stress the inductor can handle in the ac domain.

Recall that any given inductor in a circuit has a BH curve. The curve has a linear region and a

saturated region. For the purpose of this discussion, I sat determines the H axis boundary, and

B sat determines the B axis boundary. B is proportional to the volt-time product seen by the core.

Most inductor manufacturers do not readily specify this data in their data sheets. I strongly

suggest verifying that the inductor you choose is specified to safely handle the volt time product

applied.

?Volt × time = worst case on time × Vcc [V × μs]

In our example, the core needs to withstand a max volt × time product of 48V × μs.

The DCR should be kept to a minimum to maximize output swing under load.

Summary of specifications:

?

I rms (worst case) = 3.002 A ?

I peak (worst case) = 3.11 A ?

SRF> 5 MHz ?Max V × t = 48 V × μs

For the sake of margin, I recommend an inductor with an I sat rating of greater than 4.5 A, an I rms rating of 4 A, an SRF above 2.5 MHz, and a max volt-time product handling of 200 V*μs or

greater. (All of the temperature rise in the core, and most of the temperature rise in the windings

can be derived from the ac flux in the core—the volt-time product. It is worthwhile to specify a

much larger value to keep the ac heating to a minimum)

2Noise

Noise as it pertains to switching circuitry resides in the fast rising edges of the voltage and

current waveforms at various switching cycles. With the bridge switches constantly switching

and the output inductors charging and discharging, we have both electric and magnetic fields to

mitigate as part of our design task. From a near field standpoint, transmitting magnetic noise in a

magnetic field requires a current loop while transmitting noise in an electric field requires surface

area.

SLOA103

To minimize the noise transmitters in a given circuit, keep the loop areas of the power train as small as possible. Ideally, this means that the current into a component flows as close to the

current out of the component as possible. This scenario not only minimizes loop area, but the magnetic fields associated with the opposing currents are cancelled to a large degree. Bruce

Carsten has developed an excellent seminar series on this topic that can be viewed in most any of the APEC literature from 1997 on. We also need to keep the nodes from capacitively radiating energy through large copper areas tied to high dv/dt switching nodes. There has to be some

compromise on copper area since we need a given trace width for a given RMS current through the trace.

The noise receivers are necessary evils. In this example, the noise receivers are the signal

components around the amplifier: the inputs, the oscillator connections, the shutdown pins,

headphone outputs (if on IC), etc. All we can do in this case is try to minimize the loop area and keep the copper traces short and narrow.

Oddly, the output and input cables can be either noise transmitters or noise receivers. In most applications of the TPA300X series, the output cable needs to be addressed as a noise

transmitter.

The higher level EMI textbooks, such as Controlling Radiated Emissions by Design by Michel Mardiguian, and Noise Reduction Techniques in Electronic Systems by Henry Ott get into

modeling and noise sources. For the purposes of this discussion, I truncate most of the

modeling techniques and assume that any noise above 1 MHz is common to the cables and

traces (a common mode source), and that any noise source below 1 MHz is a differential

source. This is a gross truncation that only works due to the simplicity, small area, and low parts count of this circuit.

2.1Grounding

At this stage it is paramount that we acknowledge the need for separate grounds. Noise currents in the output power stage need to be returned to output noise ground and nowhere else. Were these currents to circulate elsewhere, they may get into the power supply, the signal ground, etc, worse yet, they may form a loop and radiate noise. Any of these instances results in degraded amplifier performance. The logical returns for the output noise currents associated with class D switching are the respective Pgnd pins for each channel. The switch state diagram illustrates

that Pgnd is instrumental in nearly every switch state. This is the perfect point to which the

output noise ground trace should return. Also note that output noise ground is channel specific.

A two channel amplifier has two mutually exclusive channels and consequently must have two

mutually exclusive output noise ground traces. The layout of the IC offers separate Pgnd

connections for each channel and in some cases each side of the bridge. Output noise

ground(s) must tie to system ground at the PowerPAD exclusively. Signal currents for the

inputs, oscillator, etc need to be returned to quiet ground. This ground only ties to the signal

components and the Agnd pin(s). Agnd then ties to the PowerPAD . System ground is the

connection between the power pad and the main decoupling capacitors. These ground

connections should all tie together in a Kelvin or star fashion at the PowerPAD connection.

Ground planes are strongly discouraged due to the noise currents in the ground plane having the ability to circulate wherever they choose. The main decoupling capacitor may be fed from a ground plane, but system ground, output noise ground, and quiet ground must not tie to the

ground plane. The PowerPAD requires as much copper connection as possible for heat

dissipation. This copper flood is usually connected to system ground.

12Layout Guidelines for TPA300x Series Parts

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13

Layout Guidelines for TPA300x Series Parts 3Component Placement

Now that we have mapped the current paths, we have a good idea of how current circulates in

the power train. The placement task is greatly simplified. The first elements to be placed are the

power train elements. When placing these elements, it is important to remain focused on the

whole amplifier circuit. Clearly the Vcc decoupling capacitors need to be close to the Pvcc and

Pgnd pins. The output filters need to be close to the OUTP and OUTN pins. The load needs to

be close to the output filters. However, the signal level pins of the IC also need real estate

consideration. The inputs need to be routed away from the power train, yet they need to remain

close to the IC to maintain a small loop area to maximize the amplifier’s noise immunity. So just

when we think we’ve got it figure out, there is a compromise.

3.1

Design Example 3.1.1Design Example Constraints

Below, I have included an example of the schematic, placement, and layout of a basic amplifier

application. The IC featured is the TPA3004D2. I have explained the major decisions throughout

the process. The constraints for this placement were:

?

4 layer board, 1-oz. copper (1.4 mil thick) on each layer. Inside layers are reserved for +Vcc and ground flood, nothing else ?

Inputs and outputs combined on a two row Molex Cgrid connector. Pin placement and pin count is negotiable.?

Component placement allowed only on top of the PCB ?

Amplifier inputs are single ended ?

Amplifier circuitry must occupy minimal real estate ?4-? speakers

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L4

Figure 13.Schematic

3.1.2Placement

In the component placement of the TPA3004D2 circuit, we first place the header. This header accommodates the outputs and the inputs. Precautions must be taken to avoid crosstalk

between the output and the input sections. I have segmented the header such that the outputs are on one extreme end and the inputs are on the other extreme end. If we could place Rout+ next to Rout-, we could maximize the cancellation of the noise fields around Rout+ and Rout-by minimizing the loop area between Rout+ and Rout-. The same holds true for Lout+ and

Lout-. Additionally, if we could place ground connections between the right and left connections, this would further reduce the chance of right or left channel noise coupling into the inputs.

So we have some tentative notions on how the output structure should be positioned. The

outputs should be next to each other, each output should be guarded, the inputs should be on the other end of the header, and the output loop areas should be as small as possible.

On the schematic, if we spend a little time envisioning the output traces, we quickly realize a few things, namely: if the output traces and output ground are to be routed for a short trace length, and minimal loop area, one side of the IC is trapped in the output area. This is either pins 25 thru 36, or pins 1 thru 12. Pins 1 thru 12 are the signal inputs, and as such they are far more noise sensitive than pins 25 thru 36. I have chosen to trap pins 25 thru 36 in the output area and leave the inputs as far from the output current paths as possible.

The pinout of the output side of the header was an iterative process. It took a couple of iterations to get the pins to flow without traces having to jump over one another. The header was finally

pinned out as:

14Layout Guidelines for TPA300x Series Parts

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15

Layout Guidelines for TPA300x Series Parts Table 1.Header Pinout-Output Side PIN NUMBER

NODE 1

Output ground 2

Right out +3

Right out –4

Output ground 5

Left out +6

Left out –7

Output ground 8

NC 9

Mode 10

Quiet ground 11

Left + input 12

Quiet ground 13

Right + input 14Quiet ground

Once the schematic looks reasonable, we move on to the placement task. It is worthwhile to

note that the output inductor is a coupling cap for all purposes beyond its self-resonant

frequency. The ferrite beads (FB1 thru FB4) should be located as near to the output leads as

possible in this example. They are used as secondary filters to filter out noise above the self

resonant frequency of the output inductor. The shunt capacitors (C22, C23, C26, C25, C13, C14,

C15, and C17) provide a path for noise energy to output noise ground. This helps with noise

reduction both at the output inductors and at the ferrite beads. The shunt capacitors (C14, C15,

C25, C26) need to be close the both the ferrite beads and the output pins of the ‘3004D2 IC. The

shunt capacitors (C13, C17, C22, and C23) need to be between the output inductor and the

ferrite beads. All shunt capacitors need to be tied to the output noise ground with the shortest,

lowest impedance traces possible.

Wrapping up the placement of the output structure, we still have the bootstrap capacitors (C8,

C9, C10, and C11) and the PVcc capacitors (C6, C7, C12, and C28). These capacitors need to

be placed as close to the IC as possible. Noise currents flow through the bootstrap capacitors as

the high side switches in the output bridge are switched on and off. Similarly noise currents flow

through the PVcc capacitors as the bridge transitions through its switching states. In the

positioning sketch, I compromised a little trace length in the bootstrap capacitors to allow the

best possible placement of the PVcc capacitors. From the switching diagrams above, these

capacitors are a vital part of the power train and need to have as little loop area as possible. The

bootstrap capacitors are also a vital path, but the power currents through the switches have to

flow from the PVcc capacitors. The bootstrap capacitors were given second priority in the

placement.

C16 is the main decoupling capacitor for the whole circuit. The PVcc feeders and the Avcc

feeder should connect to C16 through a Kelvin or ‘star’ connection. This eliminates any noise

currents on PVcc from getting into the signal components tied to AVcc. The ground connection

from C16 is the system ground. This should tie from C16 to the PowerPAD . The pad of C16

may tie to the system ground plane as this is the purest point to reference.

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16Layout Guidelines for TPA300x Series Parts

The trapped components that tie to the trapped pins are C18, C19, C20, C21, C29, and R11.

These components form the relaxation oscillator that determines the switching frequency of the

amplifier, the clamp circuits for the right and left channel, and the decoupling for the 5V output

line. The relaxation oscillator components (C19, R11) and the Avcc decoupling capacitor (C29)

get first priority in placement. These parts need to be located as close to their respective pins as

possible. The ground connection for all trapped components is to be a quiet ground whose only

tie to system ground is at the power pad of the IC. All other trapped components are then placed

as close to their respective pins as possible.

The only components left are the input components (C1 thru C5, R12, and R13). These

components are placed as near to their respective pins as possible. All grounds pertaining to the

input are to be on a quiet ground whose only tie to system ground is at the power pad.

The sketch below illustrates how these steps were followed through the placement task. For

scaling purposes, the header is on a 0.100” grid. The asymptotic box around the entire

positioning is about 2.0” x 2.2”.

Figure 14.PCB Layout

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17

Layout Guidelines for TPA300x Series Parts 3.2

PCB Layout 3.2.1Trace, Via, and Wire Consideration

Similar to the component placement, the first portion of the circuit to be routed is the output

portion. It is easiest to start at one end and work through the other. I chose to start at the output

header and work back through the IC. For maximal field cancellation through all switching

states, the best layout we can have is Out+ next to Out-, with output noise ground flowing under

these traces back to the IC. From the specifications called out above, the board will have 1 oz

copper on all layers. The load impedance is 4 ?. If the IC can deliver 10 W RMS into a 4-? load,

there is approximately 1.6 A RMS flowing through each output trace at the fundamental

frequency. Additionally, in the traces between the TPA300x and the output inductors, the RMS

current is somewhat larger. This is due to the ripple current flowing into the output inductor of

?I (p-p) where ?I = (Vin - Vout) × ?t/L. The RMS contribution of this ripple current is

approximately ?I √12. While we should not forget about this ripple current, it is negligible.

Per Appendix A, a good safe current density in the output trace is 100 CM/A (circular mils per

amp) or greater. If we look down the 100 CM/A column, our 1.6 A RMS current falls right on the

values corresponding to #28 AWG wire. In 1 oz copper, we can use about 90 mil trace width

(2.3mm). This is only a guideline. It is always safer to use wider traces. The PVcc lines should

be much thicker to minimize voltage ripple. No current density on the PC board should ever fall

below 30 CM/A for any trace length. The current density in the output cable from the header

should be much higher to avoid losses. A good current density for the wire harness is 300CM/A.

From the table this corresponds to a #23 AWG wire. For design purposes, #22 AWG wire is

much more readily available.

3.2.2Routing

The routing task should start at the output pins. The output filters, inductors, caps etc should be

routed first. This may need to be an iterative process to get the noise currents returned to output

noise ground through as short and wide of a trace as possible. Note that this same trace is used

to shield the output traces, inductors, etc.

The next traces to be considered are the Pvcc traces. Recall from the switch diagrams that Pvcc

is the critical node in the power train. In this example there are 4 different connections to Pvcc

(C6, C7, C12, and C28). We need a very low impedance trace to all 4 of these connection

points. This trace should be considered noisy in that it carries ripple current to the power train.

Consequently it should be routed as far away from the amplifier inputs as possible. It should also

have a ground trace flowing under it.

The next task is to route the trapped pins. These pins have a separate connection to system

ground. While it is difficult to minimize loop area, we can keep the components as close to the IC

as possible, and flood the underside of these components with quiet ground.

The last task is to route the inputs. These pins are the most susceptible to noise. They should be

surrounded by as much quiet ground copper as possible. In this case, I routed guard traces

around and between the inputs, and quiet ground under the inputs. This should keep any

incident noise out of the inputs.

Appendix B contains printouts of each layer of the PCB. These printouts can be photocopied to

transparencies for viewing purposes.

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18Layout Guidelines for TPA300x Series Parts

A good trick that I learned early on in power electronics layout is to hold the final board up to a

light source. You should not see a lot of light coming through the power train areas. If you do,

you probably have excessive loop area and (or) not enough grounded copper. That results in

excessive noise. This is, of course, a loose guideline to be used only after good placement and

routing techniques have been used.

4

EMC-The Final Word: Did Those Tricks Really Work?4.1The Arsenal

Before undertaking the mitigation task, we need to put together an arsenal. Most of the time the

EMI test chamber is located somewhere else and very seldom do they have all the comforts of

your home lab. I strongly suggest bringing along a few items to assist in mitigation and

modeling. These items include:

?Bruce Carsten’s EMI probe—Plans for this probe are available at https://www.wendangku.net/doc/d0353144.html, and

included in Appendix C of this article. It allows an ordinary analog oscilloscope to be used to

pinpoint the source of radiated energy.

?Copper Tape—It is nice because it can quickly be used to create a stick on ground plane.

Note that terminations to the copper tape need to be soldered and the adhesive should not

be assumed to be either a good insulator or a good conductor. 3M is a good source for this

material.

?Ferrites—I would suggest bringing along a kit consisting of various high current beads,

toroids, surface mount common mode filters, clam shells, etc., in various ferrite materials.

The clamshells are often too expensive for mass production; however, they are a very fast

way to determine a common mode radiator. If you suspect that a cable is radiating, place a

clam shell around it. If the levels drop, your suspicion was correct. You should then begin

looking for the source that is coupling the energy into the cable.

?Spare parts—as the models grow in complexity, you may wish to try different inductors from

different manufacturers, all having the proper ratings for your circuitry. Perhaps manufacturer

A has a better shielded part than Manufacturer B.

?Spare boards—you might get into a lengthy modeling/modification that is irreversible. A few

virgin spares are always a good idea.

?Solder wick—for desoldering and ground strap, trace-thickening agent, etc. Solder wick is a

great low impedance conductor and it remains flexible until it is consumed or in the case of a

wiring mod, tinned.

?Exacto knife and spare blades—just in case you need to alter a current path on the board

?Dremel tool and a good selection of bits—just in case you REALLY need to alter a current

path.

?Soldering Irons—bring a couple. A small one for surface-mount work, a large one for

grounding large copper masses, etc.

?Solder—it is the glue that holds our world together.

?

Various electronic tools—Cutters, screwdrivers, picks, pliers, etc.

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19

Layout Guidelines for TPA300x Series Parts 4.2The Mitigation Task

The layout included in this article is very similar to the final layout of an internal project that we

recently did. The goal of this project was to pass the EMI limits put forth by CISPR22. Initially the

layout had a ground plane where all connections to ground returned. There was no

segmentation, or attempts to isolate output noise ground, quiet ground and system ground. The

outputs were lengthy, employed little or no field cancellation and had no ground running

underneath them. I have included an initial plot of the radiated noise from this layout:

80

70

60

5040

30

20

10

30 M 50 M 70 M 100 M 200 M 300 M 500 M 1 G

f - Frequency - Hz

L e v e l - [d B V /m ]μFigure 15.Initial Layout Noise

The first change I made to this layout was to segment the groundplane layer such that all output

noise currents returned to Pgnd and then tied to the power pad. The results of this segmentation

are shown in Figure 16.

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20

Layout Guidelines for TPA300x Series Parts

80

70

60

50

40

30

20

10

30 M50 M70 M100 M200 M300 M500 M 1 G

f - Frequency - Hz

L

e

v

e

l

-

[

d

B

V

/

m

]

μ

Figure 16.Noise-First Segmentation Change

From this point, I decided to investigate the broadband noise source around 150 MHz. I did this with the use of Bruce Carsten’s EMI probe. (Plans for this probe are available at

https://www.wendangku.net/doc/d0353144.html, and included in Appendix C). I regularly use this probe in mitigating EMI noise. It is easy to build, works best with an oscilloscope, and gets within 1/32” of the offender. I strongly recommend this probe for finding noise sources on PCB’s. The probe showed that the thin trace connecting the Pvcc decoupling capacitors was radiating fiercely. I added a few MLCCs, staggered along the length of the trace, to get the plot shown in Figure 17.

80

70

60

50

40

30

20

10

30 M50 M70 M100 M200 M300 M500 M 1 G

f - Frequency - Hz

L

e

v

e

l

-

[

d

B

V

/

m

]

μ

Figure 17.Noise-With Staggered MLCCs Along the Trace Length

开关电源入门必读:开关电源工作原理超详细解析

开关电源入门必读:开关电源工作原理超详细解析 第1页:前言:PC电源知多少 个人PC所采用的电源都是基于一种名为“开关模式”的技术,所以我们经常会将个人PC电源称之为——开关电源(Sw itching Mode P ow er Supplies,简称SMPS),它还有一个绰号——DC-DC转化器。本次文章我们将会为您解读开关电源的工作模式和原理、开关电源内部的元器件的介绍以及这些元器件的功能。 ●线性电源知多少 目前主要包括两种电源类型:线性电源(linear)和开关电源(sw itching)。线性电源的工作原理是首先将127 V或者220V市电通过变压器转为低压电,比如说12V,而且经过转换后的低压依然是AC交流电;然后再通过一系列的二极管进行矫正和整流,并将低压AC交流电转化为脉动电压(配图1和2中的“3”);下一步需要对脉动电压进行滤波,通过电容完成,然后将经过滤波后的低压交流电转换成DC直流电(配图1和2中的“4”);此时得到的低压直流电依然不够纯净,会有一定的波动(这种电压波动就是我们常说的纹波),所以还需要稳压二极管或者电压整流电路进行矫正。最后,我们就可以得到纯净的低压DC直流电输出了(配图1和2中的“5”) 配图1:标准的线性电源设计图

配图2:线性电源的波形 尽管说线性电源非常适合为低功耗设备供电,比如说无绳电话、PlayStation/W ii/Xbox等游戏主机等等,但是对于高功耗设备而言,线性电源将会力不从心。 对于线性电源而言,其内部电容以及变压器的大小和AC市电的频率成反比:也即说如果输入市电的频率越低时,线性电源就需要越大的电容和变压器,反之亦然。由于当前一直采用的是60Hz(有些国家是50Hz)频率的AC市电,这是一个相对较低的频率,所以其变压器以及电容的个头往往都相对比较大。此外,AC市电的浪涌越大,线性电源的变压器的个头就越大。 由此可见,对于个人PC领域而言,制造一台线性电源将会是一件疯狂的举动,因为它的体积将会非常大、重量也会非常的重。所以说个人PC用户并不适合用线性电源。 ●开关电源知多少 开关电源可以通过高频开关模式很好的解决这一问题。对于高频开关电源而言,AC输入电压可以在进入变压器之前升压(升压前一般是50-60KHz)。随着输入电压的升高,变压器以及电容等元器件的个头就不用像线性电源那么的大。这种高频开关电源正是我们的个人PC以及像VCR录像机这样的设备所需要的。需要说明的是,我们经常所说的“开关电源”其实是“高频开关电源”的缩写形式,和电源本身的关闭和开启式没有任何关系的。 事实上,终端用户的PC的电源采用的是一种更为优化的方案:闭回路系统(closed loop system)——负责控制开关管的电路,从电源的输出获得反馈信号,然后根据PC的功耗来增加或者降低某一周期内的电压的频率以便能够适应电源的变压器(这个方法称作PW M,Pulse W idth Modulation,脉冲宽度调制)。所以说,开关电源可以根据与之相连的耗电设备的功耗的大小来自我调整,从而可以让变压器以及其他的元器件带走更少量的能量,而且降低发热量。 反观线性电源,它的设计理念就是功率至上,即便负载电路并不需要很大电流。这样做的后果就是所有元件即便非必要的时候也工作在满负荷下,结果产生高很多的热量。 第2页:看图说话:图解开关电源 下图3和4描述的是开关电源的PW M反馈机制。图3描述的是没有PFC(P ow er Factor Correction,功率因素校正)电路的廉价电源,图4描述的是采用主动式PFC设计的中高端电源。 图3:没有PFC电路的电源 图4:有PFC电路的电源 通过图3和图4的对比我们可以看出两者的不同之处:一个具备主动式PFC电路而另一个不具备,前者没有110/220V转换器,而且也没有电压倍压电路。下文我们的重点将会是主动式PFC电源的讲解。

开关电源基本术语

ATCA(Advanced Telecommunications Computing Architecture) 高级电信计算架构:主要为了解决电信系统目前面临的系统带宽问题、可扩展性、可管理性问题、现场升级及可互操作问题,并最终降低成本。Artesyn公司 ATC210-48D12-03J 二路(A路和B路)输入ATCA的总线变换器,输出功率达210W(12V/17.5A),带有一个 3.3V/6W 的独立管理电源,具有I2C和热插拔等功能。 AUX(Auxiliary power supply) 辅助电源:在有些AC/DC电源和DC/DC变换器中,有一个辅助的电源,一般加上输入电压以后就会有输出 (少数辅助电源,例如,给风扇的电源也有受控的),它主要用作控制信号的电源,例如Cosel的DBS400B12,它是一个输入200-400Vdc,输出12V/400W的模块,它有三个开关控制端,一个是输入端RC1,负逻辑,把它和-Vin端短接。这时可以利用AUX、RC2、RC3和-S之间的不同连接方法来控制模块的输出。一般多个模块并联使用时,每个AUX输出端应该加接隔离二极管。 Brick “砖”:DC/DC变换器中,“Brick”是用来表示模块大小的“单位”,有所谓的全砖、半砖、1/4砖、1/8砖、1/16砖等,例如,密封的半砖模块,其大小为2.40×2.30×0.50(单位为英寸),而开架结构半砖模块的大小为2.40×2.28×0.30(单位为英寸)(高度还有0.34英寸等不同的数值)。 CB (Current Balance)

均流端:为了增加输出功率,把多个具有相同输出电压和输出功率的电源并联使用,把它们的“CB”端连接在一起,以达到各个模块的输出电流大致相等,以免由于不均流而导致个别电流太大的模块损坏,均流端也有用“PC”,“SWP”,“ C Share”等表示。 CFM(Cube feet minute)、LFM(Line feet minute) 立方英尺/分钟和英尺/分钟:风冷的流量单位,CFM=LFM×面积S。风速的另一个单位为米/秒。 Common Mode Noise 共模噪声:指两导体对某个基准点具有大小基本相等,方向相同的噪声,通常指交流输入L 线和N线对地的噪声,可通过共模电感和Y电容来抑制它们。 Derating 降额:当环境温度较高时(例如50℃以上),有的电源必须要降低使用的输出功率,另外,有些电源在规定的输入电压范围的低端,不能满足所有的输出参数(例如:电压可调范围或功率),要降额使用。 Differential Mode Noise 差模噪声:排除共模噪声后,在两条电源线之间测出的电源线对公共基准点的噪声,测试结果为两电源线的噪声分量之差,在电源系统中通常在直流输出端和直流返回端测试噪声。DIP(Dual in-line package) 双列直插封装:模块的一种封装形式。一般为小功率模块采用。例如,Artesyn公司的BXA3系列,C&D公司的NMV0505DA都是双列直插封装。

高效率开关电源设计实例.pdf

高效率开关电源设计实例--10W同步整流B u c k变换器 以下设计实例中,包含了各种技巧来提高开关电源的总体效率。有源钳位和元损吸收电路的设计主 要依靠经验来完成的,所以不在这里介绍。 采用新技术时必须小心,因为很多是有专利的,可能需要直接付专利费给专利持有人,或在购买每 一片控制IC芯片时,支付附加费用。在将这些电源引入生产前,请注意这个问题。 10W同步整流Buck变换器 应用 此设计实例是PWM设计实例1的再设计,它包括了如何设计同步整流器(板载的10W降压Buck 变换器)。 在设计同步整流开关电源时,必须仔细选择控制IC。为了效率最高和体积最小,一般同步控制器在 系统性能上各有千秋,使得控制器只是在供应商提到的应用场合中性能较好。很多运行性能的微妙 之处不能确定,除非认真读过数据手册。例如,每当作者试图设计一个同步整流变换器,并试图使 用现成买来的IC芯片时,3/4设计会被丢弃。这是因为买来的芯片功能或工作模式往往无法改变。 更不用说,当发现现成方案不能满足需求时,是令人沮丧的(见图20的电路图)。 设计指标 输入电压范围: DC+10~+14V 输出电压: DC+5.0V 额定输出电流: 2.0A 过电流限制: 3.0A 输出纹波电压: +30mV(峰峰值) 输出调整:±1% 最大工作温度: +40℃ “黑箱”预估值 输出功率: +5.0V*2A=10.0W(最大) 输入功率: Pout/估计效率=10.0W/0.90=11.1W 功率开关损耗 (11.1W-10W) * 0.5=0.5W 续流二极管损耗: (1l.lW-10W)*0.5=0.5W 输入平均电流 低输入电压时 11.1W/10V=1.1lA 高输入电压时: 11.1W/14V=0.8A 估计峰值电流: 1.4Iout(rated)=1.4×2.0A=2.8A 设计工作频率为300kHz。

开关电源的分类及运用

开关电源的分类及运用 1.开关电源的分类 开关电源可分为AC/DC和DC/DC两大类,DC/DC变换器现已实现模块化,且设计技术及生产工艺在国内外均已成熟和标准化,并已得到用户的认可,但AC/DC的模块化,因其自身的特性使得在模块化的进程中,遇到较为复杂的技术和工艺制造问题。以下分别对两类开关电源的结构和特性作以阐述。 1.1DC/DC变换 DC/DC变换是将固定的直流电压变换成可变的直流电压,也称为直流斩波。斩波器的工作方式有两种,一是脉宽调制方式Ts不变,改变ton (通用),二是频率调制方式,ton不变,改变Ts(易产生干扰)。其具体的电路由以下几类: (1)Buck电路降压斩波器,其输出平均电压Uo小于输入电压Ui,极性相同。 (2)Boost电路升压斩波器,其输出平均电压Uo大于输入电压Ui,极性相同。 (3)Buck-Boost电路降压或升压斩波器,其输出平均电压Uo大于或小于输入电压Ui,极性相反,电感传输。 (4)Cuk电路降压或升压斩波器,其输出平均电压Uo大于或小于输入电压UI,极性相反,电容传输。 当今软开关技术使得DC/DC发生了质的飞跃,美国VICOR公司设计制

造的多种ECI软开关DC/DC变换器,其最大输出功率有300W、600W、800W等,相应的功率密度为(6、2、10、17)W/cm3,效率为(80-90)%。日本NemicLambda公司最新推出的一种采用软开关技术的高频开关电源模块RM系列,其开关频率为(200~300)kHz,功率密度已达到27W/cm3,采用同步整流器(MOS-FET代替肖特基二极管),是整个电路效率提高到90%。 1.2AC/DC变换 AC/DC变换是将交流变换为直流,其功率流向可以是双向的,功率流由电源流向负载的称为整流,功率流由负载返回电源的称为有源逆变。AC/DC变换器输入为50/60Hz的交流电,因必须经整流、滤波,因此体积相对较大的滤波电容器是必不可少的,同时因遇到安全标准(如UL、CCEE等)及EMC指令的限制(如IEC、FCC、CSA),交流输入侧必须加EMC滤波及使用符合安全标准的元件,这样就限制AC/DC电源体积的小型化,另外,由于内部的高频、高压、大电流开关动作,使得解决EMC电磁兼容问题难度加大,也就对内部高密度安装电路设计提出了很高的要求,由于同样的原因,高电压、大电流开关使得电源工作消耗增大,限制了AC/DC变换器模块化的进程,因此必须采用电源系统优化设计方法才能使其工作效率达到一定的满意程度。 AC/DC变换按电路的接线方式可分为,半波电路、全波电路。按电源相数可分为,单项、三相、多相。按电路工作象限又可分为一象限、二象限、三象限、四象限。

开关电源拓扑结构详解

开关电源拓扑结构详解 主回路——开关电源中,功率电流流经的通路。主回路一般包含了开关电源中的开 入端和负载端。 开关电源(直流变换器)的类型很多,在研究开发或者维修电源系统时,全面了解开关电源主回路的各种基本类型,以及工作原理,具有极其重要的意义。 开关电源主回路可以分为隔离式与非隔离式两大类型。 1. 非隔离式电路的类型: 非隔离——输入端与输出端电气相通,没有隔离。 1.1. 串联式结构 串联——在主回路中开关器件(下图中所示的开关三极管T)与输入端、输出端、电感器L、负载RL四者成串联连接的关系。 开关管T交替工作于通/断两种状态,当开关管T导通时,输入端电源通过开关管T及电感器L对负载供电,并同时对电感器L充电,当开关管T关断时,电感器L中的反向电动势使续流二极管D自动导通,电感器L中储存的能量通过续流二极管D形成的回路,对负载R继续供电,从而保证了负载端获得连续的电流。 串联式结构,只能获得低于输入电压的输出电压,因此为降压式变换。例如buck 拓扑型开关电源就是属于串联式的开关电源。 上图是在图1-1-a电路的基础上,增加了一个整流二极管和一个LC滤波电路。其中L是储能滤波电感,它的作用是在控制开关K接通期间Ton限制大电流通过,防止输入电压Ui直接加到负载R上,对负载R进行电压冲击,同时对流过电感的电流iL转化成磁能进行能量存储,然后在控制开关T关断期间Toff把磁能转化成电流iL继续向负

载R提供能量输出;C是储能滤波电容,它的作用是在控制开关K接通期间Ton把流过储能电感

L的部分电流转化成电荷进行存储,然后在控制开关K关断期间Toff把电荷转化成电流继续向负载R提供能量输出;D是整流二极管,主要功能是续流作用,故称它为续流二极管,其作用是在控制开关关断期间Toff,给储能滤波电感L释放能量提供电流通路。 在控制开关关断期间Toff,储能电感L将产生反电动势,流过储能电感L的电流iL由反电动势eL的正极流出,通过负载R,再经过续流二极管D的正极,然后从续流二极管D的负极流出,最后回到反电动势eL的负极。 对于图1-2,如果不看控制开关T和输入电压Ui,它是一个典型的反г 型滤波电路,它的作用是把脉动直流电压通过平滑滤波输出其平均值。 串联式开关电源输出电压uo的平均值Ua为: 1.2. 并联式结构 并联——在主回路中,相对于输入端而言,开关器件(下图中所示的开关三极管T)与输出端负载成并联连接的关系。 开关管T交替工作于通/断两种状态,当开关管T导通时,输入端电源通过开关管T对电感器L充电,同时续流二极管D关断,负载R靠电容器存储的电能供电;当开关管T关断时,续流二极管D导通,输入端电源电压与电感器L中的自感电动势正向叠加后,通过续流二极管D对负载R供电,并同时对电容器C充电。

高效率开关电源设计实例

高效率开关电源设计实 例 文档编制序号:[KKIDT-LLE0828-LLETD298-POI08]

高效率开关电源设计实例--10W同步整流B u c k变换器 以下设计实例中,包含了各种技巧来提高开关电源的总体效率。有源钳位和元损吸收电路的设计主要依靠经验来完成的,所以不在这里介绍。 采用新技术时必须小心,因为很多是有专利的,可能需要直接付专利费给专利持有人,或在购买每一片控制IC芯片时,支付附加费用。在将这些电源引入生产前,请注意这个问题。 10W同步整流Buck变换器 应用 此设计实例是PWM设计实例1的再设计,它包括了如何设计同步整流器()。 在设计同步整流开关电源时,必须仔细选择控制IC。为了效率最高和体积最小,一般同步控制器在系统性能上各有千秋,使得控制器只是在供应商提到的应用场合中性能较好。很多运行性能的微妙之处不能确定,除非认真读过数据手册。例如,每当作者试图设计一个同步整流变换器,并试图使用现成买来的IC芯片时,3/4设计会被丢弃。这是因为买来的芯片功能或工作模式往往无法改变。更不用说,当发现现成方案不能满足需求时,是令人沮丧的(见图20的电路图)。 设计指标 输入电压范围: DC+10~+14V 输出电压: DC+ 额定输出电流: 过电流限制: 输出纹波电压: +30mV(峰峰值) 输出调整:±1% 最大工作温度: +40℃ “黑箱”预估值 输出功率: +*2A=(最大) 输入功率: Pout/估计效率=/= 功率开关损耗* 0.5= 续流二极管损耗:*= 输入平均电流 低输入电压时/10V= 高输入电压时:/14V=0.8A 估计峰值电流: 1.4Iout(rated)=1.4×2.0A=2.8A 设计工作频率为300kHz。

简单的开关电源电路

简单易作的开关电源 原理图如图所示。虽然稳压精度不高,但能满足一般要求,且电路简洁,采用常规元件,成本极低,输出允许开路和短路。 市电经D1整流及C1滤波后得到300V的直流电加在变压器的①脚,同时此电压经R1给V1加上偏置后使其微微导通,有电流流过L1,同时反馈线圈L2的上端(③脚)形成正电压,此电压经C4、R3反馈给V1,使其进一步导通,直至饱和,最后随反馈电流的减小,V1迅速退出饱和并截止,如此循环形成振荡,在次级线圈L3上感应出所需的输出电压。L2是反馈线圈,同时与D4、D3、C3一起组成稳压电路。当线圈L3经D6整流后在C5上的电压升高后,同时也表现为L2经D4整流后在C3负极上的电压更低,当低至约为稳压管D3(6.2V)的稳压值时D3导通,使V1有基极短路到地,关断V1,最终使输出电压降低。电路中R4、D5、V2组成过流保护电路。当某些原因引起V1的工作电流大太时,R4上产生的电压互感器经D5加至V2基极,V2导通,V1基极电压下降,使V1电流减小。在实际应用时,若要改变输出电压,只要更换不同稳压值的D3即可,稳压值越小,输出电压越低,反之则越高。 自制时,高频变压器是关键,可参考以下参数制作:选用E形4*4mm高频磁芯,L1用0.15mm漆包线绕160匝;L2用0.15mm漆包线绕10匝;L3用0.39mm漆包线绕12匝。绕制时一定要做好层间绝缘,同时在两个E形磁芯之间也垫上一层薄膜胶带,防止磁饱和。连接电路时注意相位关系,否由不起振(图中线圈已有黑点作为标志)。在实际绕制变压器时,与V1相连的L1就绕在骨架的最里层,其下端(变压器的②脚)为起始端,其上端(变压器的①脚)为电源(300V直流)供电端,然后绕制反馈线圈L2和输出线圈L3,这样做的好处是反馈及输出线圈与V1集电极(有较高的脉冲电压)之间的分布电容将大大减小,有助于提高性能。

开关电源的用途

开关电源的用途 开关电源产品广泛应用于工业自动化控制、军工设备、科研设备、LED照明、工控设备、通讯设备、电力设备、仪器仪表、医疗设备、半导体制冷制热、空气净化器,电子冰箱,液晶显示器,LED灯具,通讯设备,视听产品,安防,电脑机箱,数码产品和仪器类等领域 开关电源的主要类型和分类 开关电源的主要类型 现代开关电源有两种:一种是直流开关电源;另一种是交流开关电源。这里主要介绍的只是直流开关电源,其功能是将电能质量较差的原生态电源(粗电),如市电电源或蓄电池电源,转换成满足设备要求的质量较高的直流电压(精电)。直流开关电源的核心是DC/DC转换器。因此直流开关电源的分类是依赖DC/DC转换器分类的。也就是说,直流开关电源的分类与DC/DC 转换器的分类是基本相同的,DC/DC转换器的分类基本上就是直流开关电源的分类。

直流DC/DC转换器按输入与输出之间是否有电气隔离可以分为两类:一类是有隔离的称为隔离式DC/DC转换器;另一类是没有隔离的称为非隔离式DC/DC转换器 隔离式DC/DC转换器也可以按有源功率器件的个数来分类。单管的DC/DC转换器有正激式(Forward)和反激式(Flyback)两种。双管DC/DC转换器有双管正激式(DoubleTransistor Forward Converter),双管反激式(Double Transistr Flyback Converter)、推挽式(Push-Pull Converter)和半桥式(Half-Bridge Converter)四种。四管DC/DC转换器就是全桥DC/DC转换器(Full-Bridge Converter)。 非隔离式DC/DC转换器,按有源功率器件的个数,可以分为单管、双管和四管三类。单管DC/DC转换器共有六种,即降压式(Buck)DC/DC转换器,升压式(Boost)DC/DC转换器、升压降压式(Buck Boost)DC/DC转换器、Cuk DC/DC转换器、Zeta DC/DC转换器和SEPIC DC/DC转换器。在这六种单管DC/DC 转换器中,Buck和Boost式DC/DC转换器是基本的,Buck-Boost、Cuk、Zeta、SEPIC式DC/DC转换器是从中派生出来的。双管DC/DC转换器有双管串接的升压式(Buck-Boost)DC/DC转换器。四管DC/DC转换器常用的是全桥DC/DC转换器(Full-Bridge Converter)。

开关电源工作原理详细解析

开关电源工作原理详细解析 个人PC所采用的电源都是基于一种名为―开关模式‖的技术,所以我们经常会将个人PC电源称之为——开关电源(Switching Mode Power Supplies,简称SMPS),它还有一个绰号——DC-DC转化器。本次文章我们将会为您解读开关电源的工作模式和原理、开关电源内部的元器件的介绍以及这些元器件的功能。 ●线性电源知多少 目前主要包括两种电源类型:线性电源(linear)和开关电源(switching)。线性电源的工作原理是首先将127 V或者220 V市电通过变压器转为低压电,比如说12V,而且经过转换后的低压依然是AC交流电;然后再通过一系列的二极管进行矫正和整流,并将低压AC 交流电转化为脉动电压(配图1和2中的―3‖);下一步需要对脉动电压进行滤波,通过电容完成,然后将经过滤波后的低压交流电转换成DC直流电(配图1和2中的―4‖);此时得到的低压直流电依然不够纯净,会有一定的波动(这种电压波动就是我们常说的纹波),所以还需要稳压二极管或者电压整流电路进行矫正。最后,我们就可以得到纯净的低压DC 直流电输出了(配图1和2中的―5‖) 配图1:标准的线性电源设计图

配图2:线性电源的波形 尽管说线性电源非常适合为低功耗设备供电,比如说无绳电话、PlayStation/Wii/Xbox等游戏主机等等,但是对于高功耗设备而言,线性电源将会力不从心。 对于线性电源而言,其内部电容以及变压器的大小和AC市电的频率成反比:也即说如果输入市电的频率越低时,线性电源就需要越大的电容和变压器,反之亦然。由于当前一直采用的是60Hz(有些国家是50Hz)频率的AC市电,这是一个相对较低的频率,所以其变压器以及电容的个头往往都相对比较大。此外,AC市电的浪涌越大,线性电源的变压器的个头就越大。 由此可见,对于个人PC领域而言,制造一台线性电源将会是一件疯狂的举动,因为它的体积将会非常大、重量也会非常的重。所以说个人PC用户并不适合用线性电源。 ●开关电源知多少 开关电源可以通过高频开关模式很好的解决这一问题。对于高频开关电源而言,AC输入电压可以在进入变压器之前升压(升压前一般是50-60 KHz)。随着输入电压的升高,变压器以及电容等元器件的个头就不用像线性电源那么的大。这种高频开关电源正是我们的个人PC以及像VCR录像机这样的设备所需要的。需要说明的是,我们经常所说的―开关电源‖其实是―高频开关电源‖的缩写形式,和电源本身的关闭和开启式没有任何关系的。

常用开关电源芯片大全复习课程

常用开关电源芯片大 全

常用开关电源芯片大全 第1章DC-DC电源转换器/基准电压源 1.1 DC-DC电源转换器 1.低噪声电荷泵DC-DC电源转换器AAT3113/AAT3114 2.低功耗开关型DC-DC电源转换器ADP3000 3.高效3A开关稳压器AP1501 4.高效率无电感DC-DC电源转换器FAN5660 5.小功率极性反转电源转换器ICL7660 6.高效率DC-DC电源转换控制器IRU3037 7.高性能降压式DC-DC电源转换器ISL6420 8.单片降压式开关稳压器L4960 9.大功率开关稳压器L4970A 10.1.5A降压式开关稳压器L4971 11.2A高效率单片开关稳压器L4978 12.1A高效率升压/降压式DC-DC电源转换器L5970 13.1.5A降压式DC-DC电源转换器LM1572 14.高效率1A降压单片开关稳压器LM1575/LM2575/LM2575HV 15.3A降压单片开关稳压器LM2576/LM2576HV 16.可调升压开关稳压器LM2577 17.3A降压开关稳压器LM2596 18.高效率5A开关稳压器LM2678 19.升压式DC-DC电源转换器LM2703/LM2704 20.电流模式升压式电源转换器LM2733 21.低噪声升压式电源转换器LM2750 22.小型75V降压式稳压器LM5007 23.低功耗升/降压式DC-DC电源转换器LT1073 24.升压式DC-DC电源转换器LT1615 25.隔离式开关稳压器LT1725 26.低功耗升压电荷泵LT1751

27.大电流高频降压式DC-DC电源转换器LT1765 28.大电流升压转换器LT1935 29.高效升压式电荷泵LT1937 30.高压输入降压式电源转换器LT1956 31.1.5A升压式电源转换器LT1961 32.高压升/降压式电源转换器LT3433 33.单片3A升压式DC-DC电源转换器LT3436 34.通用升压式DC-DC电源转换器LT3460 35.高效率低功耗升压式电源转换器LT3464 36.1.1A升压式DC-DC电源转换器LT3467 37.大电流高效率升压式DC-DC电源转换器LT3782 38.微型低功耗电源转换器LTC1754 39.1.5A单片同步降压式稳压器LTC1875 40.低噪声高效率降压式电荷泵LTC1911 41.低噪声电荷泵LTC3200/LTC3200-5 42.无电感的降压式DC-DC电源转换器LTC3251 43.双输出/低噪声/降压式电荷泵LTC3252 44.同步整流/升压式DC-DC电源转换器LTC3401 45.低功耗同步整流升压式DC-DC电源转换器LTC3402 46.同步整流降压式DC-DC电源转换器LTC3405 47.双路同步降压式DC-DC电源转换器LTC3407 48.高效率同步降压式DC-DC电源转换器LTC3416 49.微型2A升压式DC-DC电源转换器LTC3426 50.2A两相电流升压式DC-DC电源转换器LTC3428 51.单电感升/降压式DC-DC电源转换器LTC3440 52.大电流升/降压式DC-DC电源转换器LTC3442 53.1.4A同步升压式DC-DC电源转换器LTC3458 54.直流同步降压式DC-DC电源转换器LTC3703 55.双输出降压式同步DC-DC电源转换控制器LTC3736 56.降压式同步DC-DC电源转换控制器LTC3770

开关电源保护电路

开关电源保护电路 为使开关电源在恶劣环境及突发故障状况下安全可靠,提出了几种实用的保护电路,并对电路的工作原理进行了详尽分析。 关键词:开关电源;保护电路;可靠性 1 引言 评价开关电源的质量指标应该是以安全性、可靠性为第一原则。在电气技术指标满足正常使用要求的条件下,为使电源在恶劣环境及突发故障情况下安全可靠地工作,必须设计多种保护电路,比如防浪涌的软启动,防过压、欠压、过热、过流、短路、缺相等保护电路。 2 开关电源常用的几种保护电路 2.1 防浪涌软启动电路 开关电源的输入电路大都采用电容滤波型整流电路,在进线电源合闸瞬间,由于电容器上的初始电压为零,电容器充电瞬间会形成很大的浪涌电流,特别是大功率开关电源,采用容量较大的滤波电容器,使浪涌电流达100A以上。在电源接通瞬间如此大的浪涌电流,重者往往会导致输入熔断器烧断或合闸开关的触点烧坏,整流桥过流损坏;轻者也会使空气开关合不上闸。上述现象均会造成开关电源无法正常工作,为此几乎所有的开关电源都设置了防止流涌电流的软启动电路,以保证电源正常而可靠运行。 图1是采用晶闸管V和限流电阻R1组成的防浪涌电流电路。在电源接通瞬间,输入电压经整流桥(D1~D4)和限流电阻R1对电容器C充电,限制浪涌电流。当电容器C充电到约80%额定电压时,逆变器正常工作。经主变压器辅助绕组产生晶闸管的触发信号,使晶闸管导通并短路限流电阻R1,开关电源处于正常运行状态。 图1 采用晶闸管和限流电阻组成的软启动电路

图2是采用继电器K1和限流电阻R1构成的防浪涌电流电路。电源接通瞬间,输入电压经整流(D1~D4)和限流电阻R1对滤波电容器C1充电,防止接通瞬间的浪涌电流,同时辅助电源V cc经电阻R2对并接于继电器K1线包的电容器C2充电,当C2上的电压达到继电器K1的动作电压时,K1动作,其触点K1.1闭合而旁路限流电阻R1,电源进入正常运行状态。限流的延迟时间取决于时间常数(R2C2),通常选取为0.3~0.5s。为了提高延迟时间的准确性及防止继电器动作抖动振荡,延迟电路可采用图3所示电路替代RC延迟电路。 图2 采用继电器K1和限流电阻构成的软启动电路 图3 替代RC的延迟电路 2.2 过压、欠压及过热保护电路 进线电源过压及欠压对开关电源造成的危害,主要表现在器件因承受的电压及电流应力超出正常使用的范围而损坏,同时因电气性能指标被破坏而不能满足要求。因此对输入电源的上限和下限要有所限制,为此采用过压、欠压保护以提高电源的可靠性和安全性。 温度是影响电源设备可靠性的最重要因素。根据有关资料分析表明,电子元器件温度每升高2℃,可靠性下降10%,温升50℃时的工作寿命只有温升25℃时的1/6,为了避免功率器件过热造成损坏,在开关电源中亦需要设置过热保护电路。

开关电源基础学习知识原理及各功能电路详解

开关电源原理及各功能电路详解 一、开关电源的电路组成 开关电源的主要电路是由输入电磁干扰滤波器(EMI)、整流滤波电路、功率变换电路、PWM控制器电路、输出整流滤波电路组成。辅助电路有输入过欠压保护电路、输出过欠压保护电路、输出过流保护电路、输出短路保护电路等。开关电源的电路组成方框图如下: 开关电源电路方框图 二、输入电路的原理及常见电路 1、AC输入整流滤波电路原理:

输入滤波、整流回路原理图 ①防雷电路:当有雷击,产生高压经电网导入电源时,由MOV1、MOV2、MOV3:F1、F2、F3、FDG1组成的电路进行保护。当加在压敏电阻两端的电压超过其工作电压时,其阻值降低,使高压能量消耗在压敏电阻上,若电流过大,F1、F2、F3会烧毁保护后级电路。 ②输入滤波电路:C1、L1、C2、C3组成的双π型滤波网络主要是对输入电源的电磁噪声及杂波信号进行抑制,防止对电源干扰,同时也防止电源本身产生的高频杂波对电网干扰。当电源开启瞬间,要对C5充电,由于瞬间电流大,加RT1(热敏电阻)就能有效的防止浪涌电流。因瞬时能量全消耗在RT1电阻上,一定时间后温度升高后RT1阻值减小(RT1是负温系数元件),这时它消耗的能量非常小,后级电路可正常工作。 ③整流滤波电路:交流电压经BRG1整流后,经C5滤波后得到较为纯净的直流电压。若C5容量变小,输出的交流纹波将增大。 2、DC输入滤波电路原理: ①输入滤波电路:C1、L1、C2组成的双π型滤波网络主要是对输入电源的

电磁噪声及杂波信号进行抑制,防止对电源干扰,同时也防止电源本身产生的高频杂波对电网干扰。C3、C4为安规电容,L2、L3为差模电感。 ②R1、R2、R3、Z1、C6、Q1、Z2、R4、R5、Q2、RT1、C7组成抗浪涌电路。在起机的瞬间,由于C6的存在Q2不导通,电流经RT1构成回路。当C6上的电压充至Z1的稳压值时Q2导通。如果C8漏电或后级电路短路现象,在起机的瞬间电流在RT1上产生的压降增大,Q1导通使Q2没有栅极电压不导通,RT1将会在很短的时间烧毁,以保护后级电路。 三、功率变换电路 1、MOS管的工作原理:目前应用最广泛的绝缘栅场效应管是MOSFET (MOS管),是利用半导体表面的电声效应进行工作的。也称为表面场效应器件。由于它的栅极处于不导电状态,所以输入电阻可以大大提高,最高可达105欧姆,MOS管是利用栅源电压的大小,来改变半导体表面感生电荷的多少,从而控制漏极电流的大小。 2、常见的原理图:

开关电源的制作流程

开关电源的制作流程 开关电源(Switch Mode Power Supply,SMPS)具有高效率、低功率、体积小、重量轻等显著优点,代表了稳压电源的发展方向,现已成为稳压电源的主流产品。开关电源的设计与制作要求设计者具有丰富的实践经验,既要完成设计制作,又要懂得调试、测试与分析等。本文章介绍开关电源组成及制作、调试所需的基本步骤和方法。 第一节开关电源的电路组成 开关电源一般是指输入与输出隔离的电源变换器,包括AC/DC电源变换器和DC/DC电源变换器,也称为AC/DC开关电源和DC/DC开关电源。非隔离式DC/DC变换器也属于开关电源,通常称之为开关稳压器。 1、AC/DC开关电源的组成 AC/DC开关电源的典型结构如图1-1-1所示。电源由输入电磁干扰(EMI)滤波器、输入整流/滤波电路、功率变换电路、PWM控制器电路、输出整流/滤波电路和输出电压反馈电路组成。 图1-1-1 AC/DC开关电源的典型结构 其中输入整流/滤波电路、功率变换电路、输出整流/滤波电路和PWM控制器电路是主要电路,其他为辅助电路。有些开关电源中还有防雷击电路、输入过压/欠压保护电路、输出过压保护电路、输出过流保护电路、输出短路保护电路等其他辅助电路。 2. DC/DC开关电源的组成 DC/DC开关电源的组成相对AC/DC开关电源要简单一点,其典型结构如图1-1-2所示。电源由输入滤波电路、功率变换电路、PWM控制器电路、输出整流/滤波电路和输出电压反馈电路组成。当然,有些DC/DC开关电源也会包含其他辅助电路。 图1-1-2 DC/DC开关电源的典型结构

第二节开关电源的制作流程 开关电源的设计与制作要从主电路开始,其中功率变换电路是开关电源的核心。功率变换电路的结构也称开关电源拓扑结构,该结构有多种类型。拓扑结构也决定了与之配套的PWM控制器和输出整流/滤波电路。下面介绍开关电源设计与制作一般流程。 1.解定电路结构(DC/DC变换器的结构) 无论是AC/DC开关电源还是DC/DC开关电源,其核心都是DC/DC变换器。因此,开关电源的电路结构就是指DC/DC变换器的结构。开关电源中常用的DC/DC变换器拓扑结构如下: (1)降压式变换器,亦称降压式稳压器。 (2)升压式变换器,亦称升压式稳压器。 (3)反激式变换器。 (4)正激式变换器。 (5)半桥式变换器。 (6)全桥式变换器。 (7)推挽式变换器。 降压式变换器和升压式变换器主要用于输入、输出不需要隔离的DC/DC变换器中;反激式变换器主要用于输入、输出需要隔离的小功率AC/DC或DC/DC变换器中;正激式变换器主要用于输入/输出需要隔离的较大功率AC/DC或DC/DC变换器中;半桥式变换器和全桥式变换器主要用于输入/输出需要隔离的大功率AC/DC或DC/DC变换器中,其中全桥式变换器能够提供比半桥式变换器更大的输出功率;推挽式变换器主要用于输入/输出需要隔离的较低输入电压的DC/DC或DC/AC变换器中。 顾名思义,降压式变换器的输出电压低于输入电压,升压式变换器的输出电压高于输入电压。在反激式、正激式、半桥式、全桥式和推挽式等具有隔离变压器的DC/DC变换器中,可以通过调节高频变压器的一、二次匝数比,很方便地实现电源的降压、升压和极性变换。此类变换器既可以是升压型,也可以是降压型号,还可以是极性变换型。在设计开关电源时,首先要根据输入电压、输出电压、输出功率的大小及是否需要电气隔离,选择合适的电路结构。 2.选择控制电路(PWM) 开关电源是通过控制功率晶体管或功率场效应管的导通与关断时间来实现电压变换的,其控制方式主要有脉冲宽度调制、脉冲频率调制和混合调制三种。脉冲宽度调制方式,简称脉宽度调制,缩写为PWM;脉冲频率调制方式,简称脉频调制,缩写PFM;混合调制方式,是指脉冲宽度与开关频率均不固定,彼此都能改变的方式。 PWM方式,具有固定的开关频率,通过改变脉冲宽度来调节占空比,因此开关周期也是固定的,这就为设计滤波电路提供了方便,所以应用最为普通。目前,集成开关电源大多采用此方式。为便于开关电源的设计,众多厂家将PWM控制器设计成集成电路,以便用户选择。开关电源中常用的PWM控制器电路如下: (1)自激振荡型PWM控制电路。 (2)TL494电压型PWM控制电路。 (3)SG3525电压型PWM控制电路。 (4)UC3842电流型PWM控制电路。 (5)TOPSwitch-II系列的PWM控制电路。 (6)TinySwitch系列的PWM控制电路。 3.确定辅助电路

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