基于FPGA的四位一体7段数码管驱动程序
可选择其中一位或几位点亮,或全灭;可显示小数点。
可以十进制的形式显示0~9等十个数字,也可以十六进制显示0~9,A,B,C,D,E,F等数字。
必要是稍作修改可扩展到两个四位一体数码管。
其中
CODE 为待显示的数字;
BIT为待显示的数码管的位;
(0001 显示最低位;0010 显示第二位;0100显示第三位;1000 显示第四位;其余情况不予列出);
PIONT为是否显示小数点的选择位,置1选择显示,清零选择不显示;
SEL接输出数码管的位选;
SEG接输出数码管的段选;
BEEP在没有使用蜂鸣器时可去掉(包括涉及到BEEP的语句)。
/*************************************************************************** This module implements a 4_bit 7_segment decoder for 0,1,2,...,9,A,b,C,d,E and F.The number to be coded is input from a 4_bit CODE.There are 4 bits of 7_segment can be selected by the 4_bit BIT.Setting the bit POINT can display the decimal point of the displaying bit of 7_segment.The SEL and SEG should be connected to the corresponding pin of a 4_bit 7_segment.The assignments that refer to BEEP can be deleted.
***************************************************************************/
module code_4b_7seg (CODE,BIT,POINT,SEL,SEG,BEEP);
input [3:0] CODE,BIT;
input POINT;
output [3:0] SEL;
output [7:0] SEG;
output BEEP;
assign BEEP = 1;//This assignment can be deleted if there is no buzzer
assign SEL=BIT;
assign SEG[0]=((CODE==1)||(CODE==4)||(CODE==11)||(CODE==13));
assign
SEG[1]=((CODE==5)||(CODE==6)||(CODE==11)||(CODE==12)||(CODE==14)||(CODE==15)); assign SEG[2]=((CODE==2)||(CODE==12)||(CODE==14)||(CODE==15));
assign SEG[3]=((CODE==1)||(CODE==4)||(CODE==7)||(CODE==10)||(CODE==15));
assign SEG[4]=((CODE==1)||(CODE==3)||(CODE==4)||(CODE==5)||(CODE==7)||(CODE==9)); assign SEG[5]=((CODE==1)||(CODE==2)||(CODE==3)||(CODE==7)||(CODE==13));
assign SEG[6]=((CODE==0)||(CODE==1)||(CODE==7)||(CODE==12)); assign SEG[7]=~POINT;
endmodule