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NTMS4503N中文资料

NTMS4503N

Power MOSFET

28 V, 14 A, N?Channel, SOIC?8

Features

?Low R DS(on)

?High Power and Current Handling Capability

?Low Gate Charge

?Pb?Free Package is Available

Applications

?DC/DC Converters

?Motor Drives

?Synchronous Rectifier ? POL

?Buck Low?Side

MAXIMUM RATINGS (T J = 25°C unless otherwise noted)

Rating Symbol Value Unit Drain?to?Source Voltage V DSS28V Gate?to?Source Voltage ? Continuous V GS$20V

Drain Current

Continuous @ T A = 25°C (Note 1) Continuous @ T A = 25°C (Note 2) Continuous @ T A = 25°C (Note 3) Single Pulse (tp = 10 m s)

I D

I DM

9.0

Total Power Dissipation T A = 25°C (Note 1) T A = 25°C (Note 2) T A = 25°C (Note 3)P D

2.5

1.66

0.93

Operating and Storage Temperature T J, T stg?

55 to

150

°C

Single Pulse Drain?to?Source Avalanche

Energy ? Starting T J = 25°C

(V DD = 30 V, V GS = 10 V, I L = 12.2 A,

L = 1.0 mH, R G = 25 W)

E AS75mJ

Maximum Lead Temperature for Soldering Purposes, 1/8″ from case for 10 seconds T L

260°C

THERMAL RESISTANCE RATINGS

Rating Symbol Value

Unit

Thermal Resistance

Junction?to?Ambient (Note 1) Junction?to?Ambient (Note 2) Junction?to?Ambient (Note 3)R q JA

135

°C/W

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.

1.Surface?mounted on FR4 board using minimum recommended pad size

(Cu area 0.412 in sq), t < 10 s.

2.Surface?mounted on FR4 board using 1″ pad size

(Cu area 1.127 in sq) steady state.

3.Surface?mounted on FR4 board using minimum recommended pad size

(Cu area 0.412 in sq), steady state.

Device Package Shipping?

ORDERING INFORMATION

NTMS4503NR2SOIC?82500/T ape & Reel

https://www.wendangku.net/doc/d68947041.html,

?For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.

SOIC?8

CASE 751

STYLE 12

MARKING DIAGRAM &

PIN ASSIGNMENT

4503N= Specific Device Code

A= Assembly Location

Y= Year

WW= Work Week

G= Pb?Free Package

(Note: Microdot may be in either location)

NTMS4503NR2G SOIC?8

(Pb?Free)

2500/T ape & Reel

ELECTRICAL CHARACTERISTICS (T J = 25°C unless otherwise noted)

Characteristic Symbol Test Condition Min Typ Max Unit OFF CHARACTERISTICS

Drain?to?Source Breakdown Voltage V(BR)DSS V GS = 0 V, I D = 250 m A2831?V

Drain?to?Source Breakdown Voltage Temperature Coefficient V(BR)DSS/

T J

??22?mV/°C

Zero Gate Voltage Drain Current I DSS

V GS = 0 V, V DS = 24 V T J = 25°C?? 1.0m A T J = 100°C??25

Gate?to?Source Leakage Current I GSS V DS = 0 V, V GS = $20 V??$100nA ON CHARACTERISTICS (Note 4)

Gate Threshold Voltage V GS(TH)V GS = V DS, I D = 250 m A 1.0? 2.0V Negative Threshold Temperature Coefficient V GS(TH)/T J???5.0?mV/°C Drain?to?Source On Resistance R DS(on)V GS = 10 V, I D = 14 A?7.08.0m W

V GS = 4.5 V, I D = 10 A?8.89.8

Forward Transconductance g FS V DS = 10 V, I D = 14 A?30?S CHARGES, CAPACITANCES AND GATE RESISTANCE

Input Capacitance C ISS

V GS = 0 V, f = 1.0 MHz, V DS = 16 A ?2400?pF

Output Capacitance C OSS?1000?Reverse Transfer Capacitance C RSS?375?

Total Gate Charge Q G(TOT)

V GS = 4.5 V, V DS = 16 V, I D = 10 A ?23?nC

Threshold Gate Charge Q G(TH)? 2.0?Gate?to?Source Charge Q GS? 5.0?Gate?to?Drain Charge Q GD?12?SWITCHING CHARACTERISTICS, V GS = V (Note 5)

Turn?On Delay Time t d(ON)

V GS = 4.5 V, V DD = 16 V, I D = 10 A,

R G = 2.0 W ?18.5?ns

Rise Time tr?70?Turn?Off Delay Time t d(OFF)?21?Fall Time t f?23?DRAIN?SOURCE DIODE CHARACTERISTICS

Forward Diode Voltage V SD

V GS = 0 V, I S = 10 A T J = 25°C?0.82 1.2V T J = 125°C?0.65?

Reverse Recovery Time t RR

V GS = 0 V,

d ISD/d t = 100 A/m s,

I S = 14 A ?48?ns

Charge Time T a?23?Discharge Time T b?25?Reverse Recovery Charge Q RR?25?nC

4.Pulse Test: Pulse Width v 300 m s, Duty Cycle v 2%.

5.Switching characteristics are independent of operating junction temperatures.

20I D , D R A I N C U R R E N T (A M P S )

1550R D S (o n ), D R A I N ?T O ?S O U R C E R E S I S T A N C E (W )

?50

0?252550150Figure 5. On ?Resistance Variation with

Temperature T J , JUNCTION TEMPERATURE (°C)75R D S (o n ), D R A I N ?T O ?S O U R C E R E S I S T A N C E (N O R M A L I Z E D )

18Figure 6. Drain ?to ?Source Leakage Current

vs. Voltage

V DS , DRAIN ?TO ?SOURCE VOLTAGE (VOLTS)

1412161020

3025125100210468

V SD , SOURCE ?TO ?DRAIN VOLTAGE (VOLTS)

Figure 9. Resistive Switching Time Variation vs. Gate Resistance

Figure 10. Diode Forward Voltage vs. Current

GATE C , C A P A C I T A N C E (p F )

R G , GATE RESISTANCE (OHMS)

t , T I M E (n s )

PACKAGE DIMENSIONS

SOIC ?8 NB CASE 751?07NOTES:

1.DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 198

2.CONTROLLING DIMENSION: MILLIMETER.

3.DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION.

4.MAXIMUM MOLD PROTRUSION 0.15 (0.006)PER SIDE.

5.DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR

PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION.

6.751?01 THRU 751?06 ARE OBSOLETE. NEW STANDARD IS 751?0

DIM A MIN MAX MIN MAX INCHES

4.80

5.000.1890.197MILLIMETERS B 3.80 4.000.1500.157C 1.35 1.750.0530.069D 0.330.510.0130.020G 1.27 BSC 0.050 BSC H 0.100.250.0040.010J 0.190.250.0070.010K 0.40 1.270.0160.050M 0 8 0 8 N 0.250.500.0100.020S

5.80

6.20

0.2280.244

0.25 (0.010)

Z S

____ǒmm inches

ǔSCALE 6:1

*For additional information on our Pb ?Free strategy and soldering

details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.

SOLDERING FOOTPRINT*

STYLE 12:

PIN 1.SOURCE

2.SOURCE

3.SOURCE

4.GATE

5.DRAIN

6.DRAIN

7.DRAIN

8.DRAIN

ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

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