HS9-1840ARH中文资料
HS-1840ARH-T
Radiation Hardened 16 Channel CMOS Analog Multiplexer with High-Z Analog Input Protection
Intersil’s Satellite Applications Flow TM(SAF)devices are fully tested and guaranteed to100kRAD T otal Dose.These QML Class T devices are processed to a standard ?ow intended to meet the cost and shorter lead-time needs of large volume satellite manufacturers, while maintaining a high level of reliability.
The HS-1840ARH-T is a Radiation Hardened,monolithic16 channel multiplexer constructed with the Intersil Rad-Hard Silicon Gate, Dielectric Isolation process. It is designed to provide a high input impedance to the analog source if device power fails (open), or the analog signal voltage inadvertently exceeds the supply by up to±35V, regardless of whether the device is powered on or off. Selection of one of sixteen channels is controlled by a 4-bit binary address plus an Enable-Inhibit input,which conveniently controls the ON/OFF operation of several multiplexers in a system. All inputs have electrostatic discharge protection.
Speci?cations
Speci?cations for Rad Hard QML devices are controlled by the Defense Supply Center in Columbus (DSCC). The SMD numbers listed below must be used when ordering. Detailed Electrical Speci?cations for the HS-1840ARH-T are contained in SMD 5962-95630.A “hot-link” is provided from our website for downloading.
https://www.wendangku.net/doc/d89372042.html,/spacedefense/newsafclasst.asp Intersil’s Quality Management Plan (QM Plan), listing all Class T screening operations, is also available on our website.
https://www.wendangku.net/doc/d89372042.html,/quality/manuals.asp Features
?QML Class T, Per MIL-PRF-38535
?Radiation Performance
-Gamma Dose (γ) 1 x 105 RAD(Si)
-No Latch-Up, Dielectrically Isolated Device Islands ?Improved r DS(ON) Linearity
?Improved Access Time 1.5μs (Max) Over T emp and Rad ?High Analog Input Impedance 500M?During Power Loss (Open)
?±35V Input Over Voltage Protection (Power On or Off)?Excellent in Hi-Rel Redundant Systems
?Break-Before-Make Switching
Pinouts
HS1-1840ARH-T (SBDIP), CDIP2-T28
TOP VIEW
HS9-1840ARH-T (FLATPACK) CDFP3-F28
TOP VIEW
Ordering Information
ORDERING NUMBER
PART
NUMBER
TEMP.
RANGE
(o C)
5962R9563002TXC HS1-1840ARH-T-55 to 125 HS1-1840ARH/Proto HS1-1840ARH/Proto-55 to 125 5962R9563002TYC HS9-1840ARH-T-55 to 125 HS9-1840ARH/Proto HS9-1840ARH/Proto-55 to 125 NOTE:Minimum order quantity for-T is150units through distribution, or 450 units direct.
+V S
NC
NC
IN 16
IN 15
IN 14
IN 13
IN 12
IN 11
IN 10
IN 9
GND
(+5V S) V REF
ADDR A3
OUT
IN 8
IN 7
IN 6
IN 5
IN 3
IN 1
ENABLE
ADDR A0
ADDR A1
ADDR A2
-V S
IN 4
IN 2
28
27
26
25
24
23
22
21
20
19
18
17
16
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
+V S
NC
NC
IN 16
IN 15
IN 14
IN 13
IN 12
IN 11
IN 10
IN 9
GND
(+5V S) V REF
ADDR A3
OUT
-V S
IN 8
IN 7
IN 6
IN 5
IN 4
IN 3
IN 2
IN 1
ENABLE
ADDR A0
ADDR A1
ADDR A2
Data Sheet July 1999File Number4589.1元器件交易网https://www.wendangku.net/doc/d89372042.html,
Functional Diagram
TRUTH TABLE
A3A2A1A0EN “ON” CHANNEL
X X X X H None L L L L L 1L L L H L 2L L H L L 3L L H H L 4L H L L L 5L H L H L 6L H H L L 7L H H H L 8H L L L L 9H L L H L 10H L H L L 11H L H H L 12H H L L L 13H H L H L 14H H H L L 15H
H
H
H
L
16
P
EN
IN 1
OUT
IN 16
DIGITAL ADDRESS
DECODERS
ADDRESS INPUT BUFFER AND LEVEL SHIFTER
MULTIPLEX SWITCHES
A0
A1
A2
P
A3
1
16
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certi?cation.
Intersil semiconductor products are sold by description only.Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with-out notice.Accordingly,the reader is cautioned to verify that data sheets are current before placing https://www.wendangku.net/doc/d89372042.html,rmation furnished by Intersil is believed to be accurate and reliable.However,no responsibility is assumed by Intersil or its subsidiaries for its use;nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site https://www.wendangku.net/doc/d89372042.html,
Die Characteristics
DIE DIMENSIONS:
(2820μm x 4080μm x 483μm ±25.4μm)111 x 161 x 19mils ±1mil METALLIZATION:
T ype: Al Si Cu
Thickness: 16.0k ?±2k ?SUBSTRATE POTENTIAL:Unbiased (DI)BACKSIDE FINISH:Silicon
PASSIVATION:
T ype: Nitride (Si 3N 4) over Silox (S i O 2)Nitride Thickness: 4.0k ?±0.5k ?Silox Thickness: 12.0k ?±1.3k ?WORST CASE CURRENT DENSITY:< 2.0e5 A/cm 2TRANSISTOR COUNT:407PROCESS:
Radiation Hardened Silicon Gate, Dielectric Isolation
Metallization Mask Layout
HS-1840ARH-T
I N 7
I N 6
I N 5
I N 4
I N 3
I N 2
I N 1
ENABLE
A0
A1
A2
A3
V REF
GND
IN8
-V
OUT
+V
IN16
I N 15
I N 14
I N 13
I N 12
I N 11
I N 10
I N 9