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MAX6423XS16-T中文资料

MAX6423XS16-T中文资料
MAX6423XS16-T中文资料

General Description

The MAX6340/MAX6421–MAX6426 low-power micro-processor supervisor circuits monitor system voltages from 1.6V to 5V. These devices perform a single function:they assert a reset signal whenever the V CC supply volt-age falls below its reset threshold. The reset output remains asserted for the reset timeout period after V CC rises above the reset threshold. The reset timeout is exter-nally set by a capacitor to provide more flexibility.

The MAX6421/MAX6424 have an active-low, push-pull reset output. The MAX6422 has an active-high,push-pull reset output and the MAX6340/MAX6423/MAX6425/MAX6426 have an active-low, open-drain reset output. The MAX6421/MAX6422/MAX6423 are offered in 4-pin SC70 or SOT143 packages. The MAX6340/MAX6424/MAX6425/MAX6426 are available in 5-pin SOT23-5 packages.

Applications

Portable Equipment

Battery-Powered Computers/Controllers Automotive Medical Equipment Intelligent Instruments Embedded Controllers Critical μP Monitoring Set-Top Boxes Computers

Features

o Monitor System Voltages from 1.6V to 5V o Capacitor-Adjustable Reset Timeout Period o Low Quiescent Current (1.6μA typ)o Three RESET Output Options

Push-Pull RESET Push-Pull RESET Open-Drain RESET o Guaranteed Reset Valid to V CC = 1V o Immune to Short V CC Transients

o Small 4-Pin SC70, 4-Pin SOT143, and 5-Pin SOT23Packages o MAX6340 Pin Compatible with LP3470o MAX6424/MAX6425 Pin Compatible with NCP300–NCP303, MC33464/MC33465,S807/S808/S809, and RN5VD o MAX6426 Pin Compatible with PST92XX

MAX6340/MAX6421–MAX6426

Low-Power, SC70/SOT μP Reset Circuits with Capacitor-Adjustable Reset Timeout Delay

________________________________________________________________Maxim Integrated Products

1

Ordering Information

Pin Configurations

19-2440; Rev 2; 10/02

For pricing, delivery, and ordering information,please contact Maxim/Dallas Direct!at 1-888-629-4642, or visit Maxim’s website at https://www.wendangku.net/doc/d411304816.html,.

Typical Operating Circuit appears at end of data sheet.Selector Guide appears at end of data sheet.

Note: The MAX6340/MAX6421–MAX6426 are available with fac-tory-trimmed reset thresholds from 1.575V to 5.0V in approxi-mately 0.1V increments. Insert the desired nominal reset threshold suffix (from Table 1) into the blanks. There are 50 stan-dard versions with a required order increment of 2500 pieces.Sample stock is generally held on standard versions only (see Standard Versions Table). Required order increment is 10,000pieces for nonstandard versions. Contact factory for availability.All devices are available in tape-and-reel only.

M A X 6340/M A X 6421–M A X 6426

Low-Power, SC70/SOT μP Reset Circuits with Capacitor-Adjustable Reset Timeout Delay

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ABSOLUTE MAXIMUM RATINGS

ELECTRICAL CHARACTERISTICS

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

All Voltages Referenced to GND

V CC ........................................................................-0.3V to +6.0V SRT, RESET , RESET (push-pull).................-0.3V to (V CC + 0.3V)RESET (open drain)...............................................-0.3V to +6.0V Input Current (all pins)......................................................±20mA Output Current (RESET , RESET)......................................±20mA

Continuous Power Dissipation (T A = +70°C)

4-Pin SC70 (derate 3.1mW/°C above +70°C)..............245mW 4-Pin SOT143 (derate 4mW/°C above +70°C).............320mW 5-Pin SOT23 (derate 7.1mW/°C above +70°C)............571mW Operating Temperature Range .........................-40°C to +125°C Storage Temperature Range.............................-65°C to +150°C Junction Temperature......................................................+150°C Lead Temperature (soldering, 10s).................................+300°C

MAX6340/MAX6421–MAX6426

Low-Power, SC70/SOT μP Reset Circuits with Capacitor-Adjustable Reset Timeout Delay

_______________________________________________________________________________________3

00.51.01.52.02.53.03.54.00

2

1

3

4

56

SUPPLY CURRENT vs. SUPPLY VOLTAGE

SUPPLY VOLTAGE (V)

S U P P L Y C U R R E N T (μA )

0.11

100

10

1000

10,0000.001

0.1

0.01

110

100

1000

RESET TIMEOUT PERIOD vs. C SRT

M A X 6421/26 t o c 02

C SRT (nF)

R E S E T T I M E O U T P E R I O D

(m s )

4.10

4.20

4.15

4.25

4.30

-50

-25

25

50

75

100

125

RESET TIMEOUT PERIOD vs. TEMPERATURE

TEMPERATURE (°C)

R E S E T T I M E O U T P E R I O D (m s )

RESET TIMEOUT PERIOD vs. TEMPERATURE

200

250350300500550450400600R E S E T T I M E O U T P E R I O D (μs )-50

25

-25

50

75

100125

TEMPERATURE (°C)0

50

25100751501251750

400

200

600

800

1000

MAXIMUM TRANSIENT DURATION vs. RESET THRESHOLD OVERDRIVE

RESET THRESHOLD OVERDRIVE (mV)

T R A N S I E N T D U R A T I O N (μs )

V CC

TO RESET DELAY

vs. TEMPERATURE (V CC FALLING)

8090

110100140150130120160

V C C T O R E S E T D E L A Y (μs )-50

25

-25

50

75100

125

TEMPERATURE (°C)

POWER-UP/POWER-DOWN

CHARACTERISTIC

1V/div

1V/div

400μs/div

0.994

0.9980.9961.0021.0001.0041.006-502550-25075100125

NORMALIZED RESET THRESHOLD

vs. TEMPERATURE

M A X 6421/26 t o c 08

TEMPERATURE (°C)

N O R M A L I Z E D R E S E T T H R E S H O L D

Typical Operating Characteristics

(V CC = 5V, C SRT = 1500pF, T A = +25°C, unless otherwise noted.)

M A X 6340/M A X 6421–M A X 6426

Low-Power, SC70/SOT μP Reset Circuits with Capacitor-Adjustable Reset Timeout Delay

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Detailed Description

Reset Output

The reset output is typically connected to the reset input of a μP. A μP ’s reset input starts or restarts the μP in a known state. The MAX6340/MAX6421–MAX6426 μP supervisory circuits provide the reset logic to prevent code-execution errors during power-up, power-down,and brownout conditions (see Typical Operating Characteristics ).

RESET changes from high to low whenever V CC drops below the threshold voltage. Once V CC exceeds the threshold voltage, RESET remains low for the capacitor-adjustable reset timeout period.

The MAX6422 active-high RESET output is the inverse logic of the active-low RESET output. All device outputs are guaranteed valid for V CC > 1V.

The MAX6340/MAX6423/MAX6425/MAX6426 are open-drain RESET outputs. Connect an external pullup resis-tor to any supply from 0 to 5.5V. Select a resistor value large enough to register a logic low when RESET is asserted and small enough to register a logic high while supplying all input current and leakage paths connected to the RESET line. A 10k ?to 100k ?pullup is sufficient in most applications.

Selecting a Reset Capacitor

The reset timeout period is adjustable to accommodate a variety of μP applications. Adjust the reset timeout period (t RP ) by connecting a capacitor (C SRT ) between SRT and ground. Calculate the reset timeout capacitor as follows:

RESET Output Allows Use with Multiple Supplies

MAX6340/MAX6421–MAX6426

Low-Power, SC70/SOT μP Reset Circuits with Capacitor-Adjustable Reset Timeout Delay

_______________________________________________________________________________________

5

C SRT = (t RP - 275μs) / (2.73 ?106)

where t RP is in seconds and C SRT is in farads.

The reset delay time is set by a current/capacitor-con-trolled ramp compared to an internal 0.65V reference.An internal 240nA ramp current source charges the external capacitor. The charge to the capacitor is cleared when a reset condition is detected. Once the reset condition is removed, the voltage on the capacitor ramps according to the formula: dV/dt = I/C. The C SRT capacitor must ramp to 0.65V to deassert the reset.C SRT must be a low-leakage (<10nA) type capacitor;ceramic is recommended.

Operating as a Voltage Detector

The MAX6340/MAX6421–MAX6426 can be operated in a voltage detector mode by floating the SRT pin. The reset delay times for V CC rising above or falling below the threshold are not significantly different. The reset output is deasserted smoothly without false pulses.

Applications Information

Interfacing to Other Voltages for Logic

Compatibility

The open-drain outputs of the MAX6340/MAX6423/MAX6425/MAX6426 can be used to interface to μPs with other logic levels. As shown in Figure 1, the open-drain output can be connected to voltages from 0 to 5.5V. This allows for easy logic compatibility to various μPs.

Wired-OR Reset

To allow auxiliary circuitry to hold the system in reset,an external open-drain logic signal can be connected to the open-drain RESET of the MAX6340/MAX6423/MAX6425/MAX6426, as shown in Figure 2. This config-uration can reset the μP, but does not provide the reset timeout when the external logic signal is released.Negative-Going V CC Transients

In addition to issuing a reset to the μP during power-up,power-down, and brownout conditions, these supervisors are relatively immune to short-duration negative-going transients (glitches). The graph Maximum Transient Duration vs. Reset Threshold Overdrive in the Typical Operating Characteristics shows this relationship.

The area below the curve of the graph is the region in which these devices typically do not generate a reset pulse. This graph was generated using a negative-going pulse applied to V CC , starting above the actual reset threshold (V TH ) and ending below it by the magni-tude indicated (reset-threshold overdrive). As the mag-nitude of the transient decreases (farther below the reset threshold), the maximum allowable pulse width decreases. Typically, a V CC transient that goes 100mV below the reset threshold and lasts 50μs or less does not cause a reset pulse to be issued.

Ensuring a Valid RESET or RESET

Down to V CC = 0

When V CC falls below 1V, RESET /RESET current-sink-ing (sourcing) capabilities decline drastically. In the case of the MAX6421/MAX6424, high-impedance CMOS-logic inputs connected to RESET can drift to undetermined voltages. This presents no problems in most applications, since most μPs and other circuitry do not operate with V CC below 1V.

In those applications where RESET must be valid down to zero, adding a pulldown resistor between RESET and ground sinks any stray leakage currents, holding RESET low (Figure 3). The value of the pulldown resis-tor is not critical; 100k ?is large enough not to load RESET and small enough to pull RESET to ground. For applications using the MAX6422, a 100k ?pullup resis-

M A X 6340/M A X 6421–M A X 6426

Low-Power, SC70/SOT μP Reset Circuits with Capacitor-Adjustable Reset Timeout Delay

6

_______________________________________________________________________________________

tor between RESET and V CC holds RESET high when V CC falls below 1V (F igure 4). Open-drain RESET ver-sions are not recommended for applications requiring valid logic for V CC down to zero.

Layout Consideration

SRT is a precise current source. When developing the layout for the application, be careful to minimize board capacitance and leakage currents around this pin.Traces connected to SRT should be kept as short as possible. Traces carrying high-speed digital signals and traces with large voltage potentials should be rout-ed as far from SRT as possible. Leakage current and stray capacitance (e.g., a scope probe) at this pin could cause errors in the reset timeout period. When evaluating these parts, use clean prototype boards to ensure accurate reset periods.

Figure 3. Ensuring RESET Valid to V CC

= 0

CC

MAX6340/MAX6421–MAX6426

Low-Power, SC70/SOT μP Reset Circuits with Capacitor-Adjustable Reset Timeout Delay

7

factory for availability of nonstandard versions.

Typical Operating Circuit

M A X 6340/M A X 6421–M A X 6426

Low-Power, SC70/SOT μP Reset Circuits with Capacitor-Adjustable Reset Timeout Delay

8_______________________________________________________________________________________

Pin Configurations (continued)

Chip Information

TRANSISTOR COUNT: 295PROCESS: BiCMOS

MAX6340/MAX6421–MAX6426

Low-Power, SC70/SOT μP Reset Circuits with Capacitor-Adjustable Reset Timeout Delay

_______________________________________________________________________________________

9

Package Information

(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,go to https://www.wendangku.net/doc/d411304816.html,/packages .)

M A X 6340/M A X 6421–M A X 6426

Low-Power, SC70/SOT μP Reset Circuits with Capacitor-Adjustable Reset Timeout Delay

Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.

10____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600?2002 Maxim Integrated Products

Printed USA

is a registered trademark of Maxim Integrated Products.

Package Information (continued)

(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,go to https://www.wendangku.net/doc/d411304816.html,/packages .)

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