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TDA8718中文资料

DATA SHEET

Product speci?cation

Supersedes data of April 1993

File under Integrated Circuits, IC02

June 1994

INTEGRATED CIRCUITS

Philips Semiconductors

TDA8718

8-bit high-speed analog-to-digital converter

TDA8718

FEATURES ?8-bit resolution

?Sampling rate up to 600MHz

?ECL (100K family) compatible for digital inputs and outputs

?Overflow/Underflow output ?50? load drive capability ?Low input capacitance (5pF typ.).APPLICATIONS

?High speed analog-to-digital conversion ?Industrial instrumentation ?Data communication ?RF communication.

GENERAL DESCRIPTION

The TDA8718 is an 8-bit analog-to-digital converter (ADC)designed for professional applications. The device

converts the analog input signal into 8-bit binary coded digital words at a sampling rate of 600MHz. It has an effective bandwidth capability up to 150MHz full-scale sine wave. All digital outputs are ECL compatible.

QUICK REFERENCE DATA

Measured over full voltage and temperature ranges, unless otherwise speci?ed.ORDERING INFORMATION

SYMBOL PARAMETER

CONDITIONS

MIN.TYP .MAX.UNIT V EEA analog supply voltage ?4.2?4.5?4.8V V EED digital supply voltage ?4.2?4.5?4.8V I ref resistive ladder current R = 48?

304560mA I EEA analog supply current 304254mA I EED digital supply current

100120150mA I EEO(L)LOW level output supply current R L = 50?407090mA I EEO(H)HIGH level output supply current R L = 50?155170185mA ILE DC integral linearity error ?±0.7±1.0LSB DLE DC differential linearity error ?±0.3±0.5LSB EB

effective bits

f i = 4.43MHz; I ref =45mA;f clk =100MHz

?7.5?bits f i = 4.43MHz; I ref =45mA;f clk =100MHz

? 6.5?bits f clk(max)maximum clock frequency 600??MHz P tot

total power dissipation

990

1250

TYPE NUMBER PACKAGE

PINS PIN POSITION MATERIAL CODE TDA8718K

PLCC28

plastic

SOT261-2

8-bit high-speed analog-to-digital converter

TDA8718

BLOCK DIAGRAM

Fig.1 Block diagram.

handbook, full pagewidth

V RB

V I

2123

CLK CLK V EED 28

V EEA 16151317D2D3D4D5D6

192010D1D0

D7ECL OUTPUTS

CLOCK DRIVER

TDA8718

analog voltage input

clock inputs

underflow output

data outputs

LSB

MSB

14ANALOG SIGNAL PROCESSING

RESISTOR LADDER

INPUT AND OUTPUT LATCHES

&DIGITAL DECODING

MBB854 - 2

24DGND 27AGND

analog ground

digital ground

V BB

OGND2OF overflow output output ground analog negative supply voltage

digital negative supply voltage

3288V RT V RM 2reference voltage middle

reference voltage TOP

reference voltage BOTTOM

11618?

OGND1

8-bit high-speed analog-to-digital converter TDA8718

PINNING

SYMB

PIN DESCRIPTION

V RB1reference voltage BOTTOM

V RM2reference voltage MIDDLE decoupling

V I3analog input voltage

n.c.4not connected

V RT5reference voltage TOP

OF6over?ow digital output

n.c.7not connected

CLK8clock input

CLK9complementary clock input

D710digital output; bit 7 (MSB)

V BB11ECL reference voltage

OGND112output ground 1 (0V)

D613digital output; bit 6

D514digital output; bit 5

D415digital output; bit 4

D316digital output; bit 3

D217digital output; bit 2

OGND218output ground 2 (0V)

D119digital output; bit 1

D020digital output; bit 0 (LSB)

UF21under?ow digital output

n.c.22not connected

V EED23digital supply voltage (?4.5V)

DGND24digital ground

n.c.25not connected

n.c.26not connected

AGND27analog ground

V EEA28analog supply voltage (?4.5V)

Fig.2 Pin configuration.

handbook, halfpage

43212

TDA8718

V RT

n.c.

CLK

V BB

n.c.

V EED

DGND

n.c.

CLK

MBB850 - 2

8-bit high-speed analog-to-digital converter

TDA8718

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 134).

Note

1.The circuit has two clock inputs CLK and CLK. Sampling takes place on the falling edge of the clock input signal;

CLK and CLK are two complementary signals.THERMAL CHARACTERISTICS

SYMBOL PARAMETER

CONDITIONS

MIN.MAX.UNIT V EEA analog supply voltage (pin 28)?7.0+0.3V V EED digital supply voltage (pin 23)

?7.0+0.3V ?V EE supply voltage difference between V EEA and V EED

?1.00+1.0V V I input voltage (pin 3)

referenced to AGND V EEA 0V ?V clk(p-p)

clock input voltage difference between CLK and CLK pin 8 to pin 9(peak-to-peak value)

referenced to V EED ;note 1

2.0

I O output current for each digital output ?30mA T stg storage temperature

?55+150°C T amb operating ambient temperature 0+70°C T j junction temperature

+150

°C

SYMBOL PARAMETER

VALUE UNIT R th j-a

thermal resistance from junction to ambient in free air

K/W

Fig.3 Average effect of air flow on R th j-a .

Test conditions: PCB (2.24×2.24×0.062inches).LFPM = Linear Foot Per Minute.

handbook, halfpage

01000

MBB851

200400600800airflow (LFPM)

R th j-a (%)

8-bit high-speed analog-to-digital converter TDA8718

CHARACTERISTICS

V EEA =?4.2 to?4.8V;V EED =?4.2 to?4.8V;V EEA to V EED =?0.1 to +0.1V; AGND and DGND shorted together;

T amb = 0 to +70°C; typical values measured at V EEA =?4.5V,V EED =?4.5V and T amb = 25°C;

unless otherwise speci?ed.

SYMBOL PARAMETER CONDITIONS MIN.TYP.MAX.UNIT Supply

V EEA analog supply voltage (pin 28)?4.2?4.5?4.8V

V EED digital supply voltage (pin 23)?4.2?4.5?4.8V

I EEA analog supply current (pin 28)304254mA

I EED digital supply current (pin 23)100120150mA

I EEO(L)LOW level output supply current R L = 50?407090mA

I EEO(H)HIGH level output supply current R L = 50?155170185mA Reference voltages for the resistor ladder (see Table1)

I RT reference current (pin 5)R = 48?304560mA

V RB reference voltage BOTTOM (pin1)?48?× I RT?V

V RT reference voltage TOP (pin 5)?0?V

R LAD resistor ladder?48??

?175?M?/K TC RLAD temperature coef?cient of the

resistor ladder

V osB voltage offset BOTTOM note1?8?×I RT?mV

V osT voltage offset TOP note1?8?×I RT?mV Inputs

CLK INPUT(PIN8);CLK INPUT(PIN9)

V IL LOW level input voltage??1.8?V

V IH HIGH level input voltage??0.8?V

I IL LOW level input current V clk =?1.8V?0?μA

I IH HIGH level input current V clk =?0.8V?120?μA

R I input resistance f clk = 100MHz? 1.5?k?

C I input capacitance f clk = 100MHz? 3.5?pF

?900?mV

?V clk(p-p)clock input voltage difference

between CLK and CLK pin8 to

pin9 (peak-to-peak value)

A NALOG INPUT(PIN3);NOTE2

I IL LOW level input current data output = 00204080μA

I IH HIGH level input current data output = FF100200400μA

R I input resistance?10?k?

C I input capacitance?5?pF

8-bit high-speed analog-to-digital converter TDA8718

Outputs (R L = 50?)

D IGITAL100K ECL OUTPUTS(D0TO D7;OF;UF)

V OL LOW level output voltage Tamb=25°C??1770?1650mV

V OH HIGH level output voltage Tamb=25°C?1300?1150?mV

V ECL ECL reference voltage?1550?1450?1350mV

I OL LOW level output current468mA

I OH HIGH level output current102025mA Switching characteristics

f clk(max)maximum clock frequency

(pins 8 and 9)

600??MHz

t r; t f rise and fall times f i = 100MHz??750ps Analog signal processing (f clk = 500MHz)

H ARMONICS(FULL SCALE)

h1fundamental harmonics f i = 100MHz?0?dB

h2second harmonics f i = 100MHz??54?dB

h3third harmonics f i = 100MHz??50?dB Transfer function

ILE DC integral linearity error?±0.7±1.0LSB DLE DC differential linearity error?±0.3±0.5LSB AILE AC integral linearity error note3?±0.9±1.5LSB EB effective bits f i = 4.43MHz, full scale;

I ref=45mA; note4;

f clk=100MHz; Fig.5

?7.5?bits

f i = 100MHz, full scale;

I ref=45mA; note4;

f clk=500MHz; Fig.6

? 6.5?bits

BER bit error rate f clk = 500MHz;

f i=100MHz;

V i=±8LSB at code

128; 50% clock duty

cycle ?10?11?times/

samples

Timing (f clk = 500MHz; R L = 50?; C L = 5pF) note5

t ds sampling delay??300ps

t h output hold time400700?ps

t d output delay time?13001500ps SYMBOL PARAMETER CONDITIONS MIN.TYP.MAX.UNIT

8-bit high-speed analog-to-digital converter

TDA8718

Notes to the “Characteristics”

1.Voltage offset BOTTOM (V osB ) is the difference between the analog input which produces data outputs equal to 00

and the reference voltage BOTTOM (V RB ) at T amb = 25°C. Voltage offset TOP (V osT ) is the difference between reference voltage TOP (V RT ) and the analog input which produces data outputs equal to FF, at T amb =25°C.2.The analog input is not internally biased. It should be externally biased between V RT and V RB levels.3.Full-scale sine wave; f i = 4.43MHz; f clk = 100MHz.

4.Effective bits are obtained via a Fast Fourier Transform (FFT) treatment taking 4K acquisition points per period.

The calculation takes into account all harmonics and noise up to half of the clock frequency (NYQUIST frequency).

Conversion to signal-to-noise ratio: S/N =EB ×6.02+1.76dB.

5.TDA8718 can only withstand one or two 100K ECL loads in order to work out timings at the maximum sampling

frequency. It is recommended to minimize the printed circuit-board load by implementing the load device as close as possible to the TDA8718.Table 1Output coding and input voltage (typical values; referenced to AGND.

STEP

V I

O/UF BINARY OUTPUT BITS

D5D4D3D2D1D0Under?ow

00000001.000

0001..........................254.0111110255?8?×I RT 0111111Over?ow

>?8?×I RT

Fig.4 Timing diagram.

handbook, full pagewidth

sample N + 1sample N

CLK MSA666

sample N + 2

50 %

DATA OF/UF

t ds

t h

50 %

DATA N + 1

DATA N

DATA N - 1

DATA N - 2

V I

8-bit high-speed analog-to-digital converter TDA8718

Fig.5 Fast Fourier Transform (f clk =100MHz; f i =4.43MHz).

Effective bits: 7.53; THD =?54.56dB.

Harmonic levels (dB): 2nd =?77.28; 3rd =?54.76; 4th =?71.43; 5th =?71.85; 6th =?105.50.

handbook, full pagewidth

18.80

120

0 6.2712.5MBD879

43.9

25.131.337.650.2

f (MHz)

100

amplitude (dB)

Fig.6 Fast Fourier Transform (f clk =500MHz; f i =100MHz).

Effective bits: 6.60; THD =?48.60dB.

Harmonic levels (dB): 2nd =?64.81; 3rd =?51.10; 4th =?65.05; 5th =?58.33; 6th =?54.07.

handbook, full pagewidth

93.50

120

031.262.4MBD880

218.0

125.0156.0187.0249.0

f (MHz)

100

amplitude (dB)

8-bit high-speed analog-to-digital converter

TDA8718

APPLICATION INFORMATION

Fig.7 Application diagram.

handbook, full pagewidth

MBB852 - 2

TDA8718

V RT

OF n.c.CLK

V BB

OGND1D6

OGND2

n.c.

V EED

DGND

n.c.

AGND V EEA V RB RM V n.c.CLK 22nF

22nF

22nF 4

321282726111098

765

2223

2425

1415161718

–2 V

n.c.

22 nF

V I

8-bit high-speed analog-to-digital converter

TDA8718

PACKAGE OUTLINE

Fig.8 Plastic leaded chip carrier, 28-leads; SOT261-2.

Dimensions in mm.

handbook, full pagewidth

0.81max

281

A 4

511

2612

1.221.07

0.51max

(3x)MBC654

detail A

0.32max

0.51 min

3.04max

4.57max

11.5811.43

12.5712.32s e a t i n g p l a n e

0.10S

0.53max

0.18M

1.27(24 x)

S 12.5712.3211.5811.432.16max

1.140.64

10.929.91

45o

8-bit high-speed analog-to-digital converter

TDA8718

SOLDERING

Plastic leaded chip carriers B Y WAVE

During placement and before soldering, the component must be fixed with a droplet of adhesive. After curing the adhesive, the component can be soldered. The adhesive can be applied by screen printing, pin transfer or syringe dispensing.

Maximum permissible solder temperature is 260°C, and maximum duration of package immersion in solder bath is 10s, if allowed to cool to less than 150°C within 6s.Typical dwell time is 4s at 250°C.

A modified wave soldering technique is recommended using two solder waves (dual-wave), in which a turbulent wave with high upward pressure is followed by a smooth laminar wave. Using a mildly-activated flux eliminates the need for removal of corrosive residues in most applications.

B Y SOLDER PASTE REFLOW

Reflow soldering requires the solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the substrate by screen printing, stencilling or pressure-syringe dispensing before device placement.Several techniques exist for reflowing; for example,thermal conduction by heated belt, infrared, and

vapour-phase reflow. Dwell times vary between 50 and 300s according to method. Typical reflow temperatures range from 215 to 250°C.

Preheating is necessary to dry the paste and evaporate the binding agent. Preheating duration: 45min at 45°C.R EPAIRING SOLDERED JOINTS (BY HAND -HELD SOLDERING IRON OR PULSE -HEATED SOLDER TOOL )

Fix the component by first soldering two, diagonally

opposite, end pins. Apply the heating tool to the flat part of the pin only. Contact time must be limited to 10s at up to 300°C. When using proper tools, all other pins can be soldered in one operation within 2 to 5s at between 270 and 320°C. (Pulse-heated soldering is not recommended for SO packages.)

For pulse-heated solder tool (resistance) soldering of VSO packages, solder is applied to the substrate by dipping or by an extra thick tin/lead plating before package placement.

DEFINITIONS LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale.

Data sheet status Objective speci?cation This data sheet contains target or goal speci?cations for product development.Preliminary speci?cation This data sheet contains preliminary data; supplementary data may be published later.Product speci?cation This data sheet contains ?nal product speci?cations.

Limiting values

Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the speci?cation is not implied. Exposure to limiting values for extended periods may affect device reliability.Application information

Where application information is given, it is advisory and does not form part of the speci?cation.

8-bit high-speed analog-to-digital converter TDA8718

NOTES

8-bit high-speed analog-to-digital converter TDA8718

NOTES

8-bit high-speed analog-to-digital converter TDA8718

NOTES

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