BUK765R2-40B,118;中文规格书,Datasheet资料
1.Product profile
1.1General description
Standard level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using TrenchMOS technology. This product has been designed and qualified to the appropriate AEC standard for use in automotive critical applications.
1.2Features and benefits
?Q101 compliant
?Suitable for standard level gate drive sources
?Suitable for thermally demanding environments due to 175 °C rating
1.3Applications
?12 V loads
?Automotive systems
?General purpose power switching ?Motors, lamps and solenoids
1.4Quick reference data
[1]
Continuous current is limited by package.
BUK765R2-40B
N-channel TrenchMOS standard level FET
Rev. 3 — 22 November 2011
Product data sheet
Table 1.Quick reference data Symbol Parameter
Conditions
Min Typ Max Unit V DS drain-source voltage T j ≥25°C; T j ≤175°C
--40V I D drain current
V GS =10V;T mb =25°C;see Figure 1; see Figure 3
[1]
--75A P tot total power dissipation T mb =25°C;see Figure 2--203W Static characteristics
R DSon
drain-source on-state resistance V GS =10V;I D =25A;T j =25°C; see Figure 11; see Figure 12-
4.4
5.2
m ?
Dynamic characteristics Q GD
gate-drain charge
V GS =10V;I D =25A;V DS =32V; T j =25°C; see Figure 13
-16
-nC
Avalanche ruggedness E DS(AL)S
non-repetitive drain-source avalanche energy
I D =75A;V sup ≤40V; R GS =50?; V GS =10V;T j(init)=25°C; unclamped
--494mJ
2.Pinning information
[1]
It is not possible to make a connection to pin 2.
3.Ordering information
Table 2.Pinning information Pin Symbol Description Simplified outline Graphic symbol
1G gate SOT404 (D2PAK)
2D drain [1]3S source
mb
D
mounting base; connected to drain
mb
1
3
2Table 3.
Ordering information
Type number
Package Name
Description
Version
BUK765R2-40B
D2PAK
plastic single-ended surface-mounted package (D2PAK); 3 leads (one lead cropped)
SOT404
4.Limiting values
[1]Current is limited by power dissipation chip rating.[2]
Continuous current is limited by package.
Table 4.Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter
Conditions
Min Max Unit V DS drain-source voltage T j ≥25°C; T j ≤175°C -40V V DGR drain-gate voltage R GS =20k ?
-40V V GS gate-source voltage -2020V I D
drain current
T mb =25°C;V GS =10V;see Figure 1; see Figure 3
[1]-143A [2]-75A T mb =100°C; V GS =10V; see Figure 1
[2]
-75A I DM peak drain current T mb =25°C; pulsed; t p ≤10μs; see Figure 3-573A P tot total power dissipation T mb =25°C;see Figure 2
-203W T stg storage temperature -55175°C T j junction temperature -55
175°C Source-drain diode
I S source current T mb =25°C
[1]-143A [2]
-75A I SM peak source current pulsed; t p ≤10μs; T mb =25°C
-573A Avalanche ruggedness
E DS(AL)S
non-repetitive drain-source avalanche energy
I D =75A;V sup ≤40V; R GS =50?; V GS =10V; T j(init)=25°C; unclamped
-
494
mJ
5.Thermal characteristics
Table 5.Thermal characteristics Symbol Parameter
Conditions Min Typ Max Unit R th(j-mb)thermal resistance from junction to mounting base
see Figure 4
--0.74K/W R th(j-a)
thermal resistance from junction to ambient
minimum footprint ; mounted on a printed-circuit board
-
50
-
K/W
6.Characteristics
Table 6.Characteristics
Symbol Parameter Conditions Min Typ Max Unit Static characteristics
V(BR)DSS drain-source breakdown
voltage I D=0.25mA; V GS=0V; T j=25°C40--V I D=0.25mA; V GS=0V; T j=-55°C36--V
V GS(th)gate-source threshold voltage I D=1mA; V DS=V GS; T j=25°C;
see Figure 10
234V
I D=1mA; V DS=V GS; T j=-55°C;
see Figure 10
-- 4.4V
I D=1mA; V DS=V GS; T j=175°C;
see Figure 10
1--V I DSS drain leakage current V DS=40V; V GS=0V; T j=25°C-0.021μA
V DS=40V; V GS=0V; T j=175°C--500μA I GSS gate leakage current V GS=20V;V DS=0V; T j=25°C-2100nA
V GS=-20V; V DS=0V; T j=25°C-2100nA
R DSon drain-source on-state
resistance V GS=10V;I D=25A;T j=175°C;
see Figure 11; see Figure 12
--9.9m?
V GS=10V;I D=25A;T j=25°C;
see Figure 11; see Figure 12
- 4.4 5.2m?
Dynamic characteristics
Q G(tot)total gate charge I D=25A;V DS=32V; V GS=10V;
T j=25°C; see Figure 13-52-nC
Q GS gate-source charge-12-nC Q GD gate-drain charge-16-nC
C iss input capacitance V GS=0V; V DS=25V; f=1MHz;
T j=25°C; see Figure 14-28423789pF
C oss output capacitance-711853pF C rss reverse transfer capacitance-296406pF
t d(on)turn-on delay time V DS=30V; R L=1.2?; V GS=10V;
R G(ext)=10?; T j=25°C -15-ns
t r rise time-51-ns t d(off)turn-off delay time-81-ns t f fall time-56-ns L D internal drain inductance from drain lead 6 mm from package
to centre of die; T j=25°C
- 4.5-nH
from upper edge of drain mounting
base to centre of die; T j=25°C
- 2.5-nH
L S internal source inductance from source lead to source bond
pad; T j=25°C
-7.5-nH Source-drain diode
V SD source-drain voltage I S=25A; V GS=0V; T j=25°C;
see Figure 15
-0.85 1.2V
t rr reverse recovery time I S=20A; dI S/dt=-100A/μs;
V GS=-10V; V DS=20V; T j=25°C -54-ns
Q r recovered charge-38-nC
7.Package outline
Plastic single-ended surface-mounted package (D2PAK); 3 leads (one lead cropped)SOT404
Fig 16.Package outline SOT404 (D2PAK)
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BUK765R2-40B,118