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P4C170-25JC中文资料

Document # SRAM107 REV A

P4C168, P4C169, P4C170ULTRA HIGH SPEED 4K x 4STATIC CMOS RAMS

DESCRIPTION

The P4C168, P4C169 and P4C170 are a family of 16,384-bit ultra high-speed static RAMs organized as 4K x 4. All three devices have common input/output ports.The P4C168 enters the standby mode when the chip enable (CE ) control goes HIGH; with CMOS input levels, power consumption is only 83mW in this mode. Both the P4C169and the P4C170 offer a fast chip select access time that is only 67% of the address access time. In addition, the P4C170 includes an output enable (OE ) control to elimi-nate data bus contention. The RAMs operate from a single 5V ± 10% tolerance power supply.

FEATURES

Full CMOS, 6T Cell

High Speed (Equal Access and Cycle Times)– 12/15/20/25/35ns (Commercial)

– 20/25/35/45/55/70ns (P4C168 Military)Low Power Operation (Commercial)– 715 mW Active

– 193 mW Standby (TTL Input) P4C168– 83 mW Standby (CMOS Input) P4C168Single 5V±10% Power Supply

Fully TTL Compatible, Common I/O Ports Three Options

– P4C168 Low Power Standby Mode – P4C169 Fast Chip Select Control

– P4C170 Fast Chip Select, Output Enable Controls

Standard Pinout (JEDEC Approved)– P4C168: 20-pin DIP, SOJ, LCC, SOIC,

CERPACK, and Flat Pack – P4C169: 20-pin DIP and SOIC – P4C170: 22-pin DIP

Access times as fast as 12 nanoseconds are available,permitting greatly enhanced system operating speeds.CMOS is used to reduce power consumption to a low 715mW active, 193 mW standby.

The P4C168 and P4C169 are available in 20-pin (P4C170in 22-pin) 300 mil DIP packages providing excellent board level densities. The P4C168 is also available in 20-pin 300 mil SOIC, SOJ, CERPACK, and Flat Pack packages.

The P4C169 is also available in a 20-pin 300 mil SOIC package.

PIN CONFIGURATIONS

FUNCTIONAL BLOCK DIAGRAM

P4C168 P4C169DIP (P2, C6, D2) DIP (P2)SOIC (S2) SOIC (S2)SOJ (J2)

CERPACK (F2)

SOLDER SEAL FLAT PACK (FS-2)

P4C170

DIP (P3)

P4C168, P4C169, P4C170

MAXIMUM RATINGS (1)

Symbol Parameter Value Unit V CC

Power Supply Pin with –0.5 to +7V

Respect to GND Terminal Voltage with –0.5 to V TERM Respect to GND V CC +0.5V (up to 7.0V)

T A

Operating Temperature

–55 to +125

°C

Symbol Parameter Value Unit T BIAS Temperature Under –55 to +125°C Bias

T STG Storage Temperature –65 to +150

°C P T Power Dissipation 1.0W I OUT

DC Output Current

Symbol Parameter Conditions Typ.Unit C IN Input Capacitance

V IN = 0V

5pF C OUT

Output Capacitance V OUT = 0V

RECOMMENDED OPERATING CONDITIONS

CAPACITANCES (4)

(V CC = 5.0V, T A = 25°C, f = 1.0MHz)Grade (2)Commercial Military

Ambient Temp 0°C to 70°C –55°C to +125°C

Gnd 0V 0V

V CC 5.0V ± 10%5.0V ± 10%

V IH V IL V HC V LC V OH I LI I SB

I SB1

Input High Voltage Input Low Voltage CMOS Input High Voltage CMOS Input Low Voltage Output Low Voltage (TTL Load)Output High Voltage (CMOS Load)Input Leakage Current Output Leakage Current Dynamic Operating Current

Standby Power Supply Current (TTL Input Levels)P4C168 only Standby Power Supply Current

(CMOS Input Levels)P4C168 only

Input Clamp Diode Voltage Output Low Voltage (CMOS Load)Output High Voltage (TTL Load)Parameter

Symbol Test Conditions

V CC = Min., I IN = –18 mA V CC = Max., V IN = GND to V CC V CC = Max., CS = V IH ,V OUT = GND to V CC

CE ≥ V IH , V CC = Max., f = Max.,Outputs Open

CE ≥ V HC , V CC = Max., f = 0,Outputs Open

V IN ≤ V LC or V IN ≥ V HC

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P4C168/169/170Min 2.2–0.5(3)V CC –0.2–0.5(3)

2.4–10–5–10–5

Max V CC +0.50.8V CC +0.50.2+10+5+10+5Unit V V V V –1.2V V CD I OL = +8 mA, V CC = Min.0.4V V OL I OLC = +100 μA, V CC = Min.0.2

V V OLC I OH = –4 mA, V CC = Min.V I OHC = –100 μA, V CC = Min.V CC –0.2V

V OHC μA I LO μA I CC 35

15mA

___

V CC = Max., f = Max., Outputs Open 130mA ___DC ELECTRICAL CHARACTERISTICS

AC CHARACTERISTICS—READ CYCLE

= 5V ± 10%, All Temperature Ranges)(2)

§ P4C168 only ? P4C170 only

? Chip Select/Deselect for P4C169 and P4C170

AC CHARACTERISTICS—READ CYCLE (CONTINUED)

(V CC = 5V ± 10%, All Temperature Ranges)(2)

P4C168, P4C169, P4C170

Notes:

7.ADDRESS must be valid prior to, or coincident with CE /CS transition low. For Fast CS , t AA must still be met.

8.Transition is measured ±200mV from steady state voltage prior to change, with loading as specified in Figure 1.

9.Read Cycle Time is measured from the last valid address to the first transitioning address.

TIMING WAVEFORM OF READ CYCLE NO. 2 (CE /CS CONTROLLED)(5,7)

TIMING WAVEFORM OF READ CYCLE NO. 3—P4C170 ONLY (OE CONTROLLED)

(5)

AC ELECTRICAL CHARACTERISTICS - WRITE CYCLE

(V CC = 5V ± 10%, All Temperature Ranges)(2)

AC ELECTRICAL CHARACTERISTICS - WRITE CYCLE (CONTINUED)(V = 5V ± 10%, All Temperature Ranges)(2)

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P4C168, P4C169, P4C170

Mode CE (CS )WE Output Standby (Deselect)H X High Z Read L H D OUT Write

High Z

TIMING WAVEFORM OF WRITE CYCLE NO. 2 (CE /CS CONTROLLED)

(10)

TRUTH TABLES

P4C168 (P4C169)

P4C170

Mode CE WE OE Output Deselect H X X High Z Read L H L D OUT Output Inhibit L H H High Z Write

High Z

* including scope and test fixture.

Note:

Because of the ultra-high speed of the P4C168, P4C169 AND P4C170care must be taken when testing these devices; an inadequate setup can cause a normal functioning part to be rejected as faulty. Long high-inductance leads that cause supply bounce must be avoided by bringing the V CC and ground planes directly up to the contactor fingers. A high frequency capacitor of 0.01 μF is also required between V CC and ground.

Figure 1. Output Load

Figure 2. Thevenin Equivalent

Input Pulse Levels GND to 3.0V

Input Rise and Fall Times 3ns Input Timing Reference Level 1.5V Output Timing Reference Level 1.5V

Output Load

See Figures 1 and 2

AC TEST CONDITIONS

To avoid signal reflections, proper termination must be used; for example, a 50? test environment should be terminated into a 50? load with 1.73V (Thevenin Voltage) at the comparator input, and a 116?resistor must be used in series with D OUT to match 166? (Thevenin

Resistance).

P4C168, P4C169, P4C170

ORDERING INFORMATION

SELECTION GUIDE

? P4C168 and P4C169 only.

?? P4C168

* Military temperature range with MIL-STD-883, Class B processing. N/A = Not available

SELECTION GUIDE (CONTINUED)

* Military temperature range with MIL-STD-883, Class B processing.

P4C168, P4C169, P4C170

CERPACK CERAMIC FLAT PACKAGE

SIDE BRAZED DUAL IN-LINE PACKAGE

SOJ SMALL OUTLINE IC PACKAGE

SOLDER SEAL FLAT PACKAGE

P4C168, P4C169, P4C170

RECTANGULAR LEADLESS CHIP CARRIER PLASTIC DUAL IN-LINE PACKAGE (P4C168, P4C169)

SOIC/SOP SMALL OUTLINE IC PACKAGE

PLASTIC DUAL IN-LINE PACKAGE (P4C170)

P4C168, P4C169, P4C170

CERDIP DUAL IN-LINE PACKAGE

REVISIONS

DOCUMENT NUMBER:SRAM107

DOCUMENT TITLE:P4C168, P4C169, P4C170 ULTRA HIGH SPEED 4K x 4 STATIC CMOS RAMS

REV.ISSUE

DATE

ORIG. OF

CHANGE

DESCRIPTION OF CHANGE

OR1997DAB New Data Sheet

A Oct-05JD

B Change logo to Pyramid