74LCX38SJX中文资料
? 2005 Fairchild Semiconductor Corporation
DS012574
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October 1995
Revised February 2005
74LCX38 Low Voltage Quad 2-Input NAND Gate (Open Drain) with 5V Tolerant Inputs
74LCX38
Low Voltage Quad 2-Input NAND Gate (Open Drain)with 5V Tolerant Inputs
General Description
The LCX38 contains four 2-input open drain NAND gates.The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems.
The 74LCX38 is fabricated with advanced CMOS technol-ogy to achieve high speed operation while maintaining CMOS low power dissipation.
Features
s 5V tolerant inputs
s 2.3V to 3.6V V CC specifications provided s 5.0 ns t PD max (V CC 3.3V), 10 P A I CC max s Power down high impedance inputs and outputs s 24 mA output drive (V CC 3.0V)
s Implements patented noise/EMI reduction circuitry s Latch-up performance exceeds 500 mA s ESD performance:
Human body model ! 2000V Machine model ! 150V
Ordering Code:
Devices also available in T ape and Reel. Specify by appending the suffix letter “X” to the ordering code.Pb-Free package per JEDEC J-STD-020B.
Note 1: “_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only.
Logic Symbol
IEEE/IEC
Connection Diagram
Pin Descriptions
Order Number Package Package Description
Number 74LCX38M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 74LCX38MX_NL (Note 1)M14A Pb-Free 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 74LCX38SJ M14D Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74LCX38MTC MTC1414-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 74LCX38MTCX_NL (Note 1)
MTC14
Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Pin Names Description A n , B n Inputs O n
Outputs
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74L C X 38
Absolute Maximum Ratings (Note 2)
Recommended Operating Conditions (Note 4)
Note 2: The Absolute Maximum Ratings are those beyond which the safety of the device cannot be guaranteed. The device should not be operating at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the Absolute Maximum Rating s. The “Recommended Operating Conditions ” table will define the conditions for actual device operation.Note 3: I O Absolute Maximum Rating must be observed.
Note 4: Unused inputs must be held HIGH or LOW. They may not float.
DC Electrical Characteristics
Symbol Parameter
Value
Conditions
Units V CC Supply Voltage 0.5 to 7.0V
V I DC Input Voltage 0.5 to 7.0 V
V O DC Output Voltage 0.5 to 7.0
Output in HIGH or LOW State (Note 3)V I IK DC Input Diode Current 50V I GND mA I OK DC Output Diode Current 50V O GND
mA I O DC Output Sink Current (I OL ) 50mA I CC DC Supply Current per Supply Pin r 100mA I GND DC Ground Current per Ground Pin r 100mA
T STG
Storage Temperature
65 to 150
q C
Symbol Parameter
Min Max Units V CC Supply Voltage Operating 2.0 3.6V Data Retention
1.5 3.6V I Input Voltage 0 5.5V V O Output Voltage 0
5.5V
I OL
Output Current
V CC 3.0V 3.6V 24mA V CC 2.7V 3.0V 12V CC 2.3V 2.7V
8
T A
Free-Air Operating Temperature
4085q C 't/'V
Input Edge Rate, V IN 0.8V –2.0V, V CC 3.0V
10
ns/V
Symbol Parameter
Conditions
V CC T A 40q C to 85q C Units (V)Min Max
V IH HIGH Level Input Voltage 2.3 2.7 1.7V 2.7 3.6 2.0
V IL LOW Level Input Voltage 2.3 2.70.7V
2.3
3.60.8V OL
LOW Level Output Voltage
I OL 100P A 2.3 3.60.2I OL = 8mA 2.30.6I OL 12 mA 2.70.4V
I OL 16 mA 3.00.4I OL 24 mA
3.00.55I I Input Leakage Current 0 d V I d 5.5V 2.3 3.6
r 5.0P A I OFF Power-Off Leakage Current V I or V O 5.5V 010P A I CC Quiescent Supply Current V I V CC or GND 2.3 3.610P A 3.6V d V I d 5.5V 2.3 3.6r 10'I CC Increase in I CC per Input V IH V CC 0.6V 2.3 3.6500P A I OHZ
Off State Current
V O 5.5
2 - 3.6
10
P A
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74LCX38
AC Electrical Characteristics
Note 5: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH-to-LOW (t OSHL ) or LOW-to-HIGH (t OSLH ).
Dynamic Switching Characteristics
Capacitance
Symbol
Parameter
T A 40q C to 85q C, R L 500 :
Units
V CC 3.3V r 0.3V
V CC 2.7V V CC 2.5V r 0.2V
C L 50 pF C L 50 pF C L 30 pF Min
Max Min Max Min Max t PZL Propagation Delay Time
1.5 5.0 1.5 5.5 1.5 6.5ns t PLZ 1.5
5.0 1.5
5.5
1.5
6.0
t OSHL Output to Output Skew 1.0ns t OSLH
(Note 5)
1.0
Symbol Parameter
Conditions
V CC T A 25q C Units (V)Typical V OLP Quiet Output Dynamic Peak V OL C L 50 pF, V IH 3.3V, V IL 0V 3.30.8V C L 30 pF, V IH 2.5V, V IL 0V 2.50.6V OLV
Quiet Output Dynamic Valley V OL
C L 50 pF, V IH 3.3V, V IL 0V 3.3 0.8V
C L 30 pF, V IH 2.5V, V IL 0V
2.5
0.6
Symbol Parameter
Conditions
Typical Units C IN Input Capacitance V CC Open, V I 0V or V CC 7pF C OUT Output Capacitance
V CC 3.3V, V I 0V or V CC
8pF C PD
Power Dissipation Capacitance
V CC 3.3V, V I 0V or V CC , f 10 MHz
25
pF
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74L C X 38
AC Loading and Waveforms Generic for LCX Family
FIGURE 1. AC Test Circuit
(C L includes probe and jig capacitance)
3-STATE Output Low Enable and
Disable Times for Logic
t rise and t fall
FIGURE 2. Waveforms
(Input Pulse Characteristics; f = 1MHz, t r = t f = 3ns)Test Switch
t PZL , t PLZ
6V at V CC 3.3 r 0.3V V CC x 2 at V CC 2.5 r 0.2V
Symbol V CC
3.3V r 0.3V
2.7V 2.5V r 0.2V V mi 1.5V 1.5V V CC /2V mo 1.5V 1.5V V CC /2V x V OL 0.3V V OL 0.3V V OL 0.15V V y
V OH 0.3V
V OH 0.3V
V OH 0.15V
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Physical Dimensions inches (millimeters) unless otherwise noted
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
Package Number M14A
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74L C X 38
Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M14D
7
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74LCX38 Low Voltage Quad 2-Input NAND Gate (Open Drain) with 5V Tolerant Inputs
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC14
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.LIFE SUPPORT POLICY
FAIRCHILD ’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein:1.Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be rea-sonably expected to result in a significant injury to the user.
2. A critical component in any component of a life support device or system whose failure to perform can be rea-sonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.
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