W05010-SDR_Wideband_Channelisation_Techniques_Jan05
Wideband Channelisation
Techniques
Flexible architectures for
Software Defined Radio
Steve Matthews
RF Engines Limited
RF Engines
FPGA based Signal Processing
for Defence, Communications
and Instrumentation Applications
Established -1999
Location-Isle of Wight, UK
Channelisation
“Processing a wide bandwidth of radio spectrum to produce narrower channel(s)”Channeliser (Downconverter)
(Filter Bank)…
Wideband
Input
Signal 123N
Narrowband Outputs
1
3N
2
...RF Engines Channelisers
Digital channelisation techniques
Very wideband inputs
Multiple channels
Flexibility
The Need For Flexibility 25MHz
824MHz 849MHz
GSM:125 x 200kHz
CDMA2000:10 x 1.25 MHz
IS136:833 x 30kHz An Example: 800 MHz Telecoms Band
Flexibility
Controllable channel filter shapes
Tuneable channel centre frequencies
Selectable output sample rates
Independent channels
Channelisation Architectures ?Digital Downconverter (DDC)
?Fast Fourier Transform (FFT) Techniques –Windowed FFT
–WOLA (Polyphase DFT)
–Mixed Radix FFT
?RF Engines’ Techniques
–Pipelined Frequency Transform (PFT)
–Tuneable Pipelined Frequency Transform (TPFT)
Channelisation Architectures ?Digital Downconverter (DDC)
?Fast Fourier Transform (FFT) Techniques –Windowed FFT
–WOLA (Polyphase DFT)
–Mixed Radix FFT
?RF Engines’ Techniques
–Pipelined Frequency Transform (PFT)
–Tuneable Pipelined Frequency Transform (TPFT)
Digital Down-converters (DDC)
Wideband Input Signal
-Fs/2
+Fs/2
Frequency Shift Complex Input Signal
Low Pass Filter
Decimate
Complex Output Signal
Shifted Signal
-Fs/2
+Fs/2
0Hz
Spectral Shift
Decimated Signal
-Fs/2N +Fs/2N
Filtered Signal
-Fs/2+Fs/2
0Hz
Digital Down-converters (DDC)
Sample Rate = Fs/N
(Complex )
Sample Rate = Fs (Complex)
B + C
D -A
Low Pass Filters (CIC / FIR)
I
Q
I
Q
Local Oscillator Frequency = F LO
Cosine
Sine
D
C B
A
N
N
Decimators
CIC Filter used in DDC
G=1/R N
Integ
Integ
Integ
↓R
Comb
Comb
Comb
Input Sample Rate =
Fs (complex)
Output Sample Rate =
Fs/R (complex)
∑
Z -1
∑
Z -M
-1
Sub-sample
Decimating
FIR
Decimating FIR Filter Performs final stage of decimation Allows control over filter shape Compensates for CIC droop in passband
DDC Filter Performance
-100
-20-40
-60
-80
dB 0
-Fs/2
+Fs/2
Frequency
Input Bandwidth < +F s / 2
Input Sample Rate (S/R)= Fs (Complex)
Output Bandwidth < +F s / 2N Output S/R = Fs/N (Complex)
Multi-channel DDC Architecture N-Channels require
N-off complex filter
modules
Example
16K channels
needs 16,384modules!
( Impractical !! )
DDC Summary
Channelisation Architectures ?Digital Downconverter (DDC)
?Fast Fourier Transform (FFT) Techniques –Windowed FFT
–WOLA (Polyphase DFT)
–Mixed Radix FFT
?RF Engines’ Techniques
–Pipelined Frequency Transform (PFT)
–Tuneable Pipelined Frequency Transform (TPFT)
FFT Based Channelisation FFT ……N time-domain
samples
N frequency-domain bins “N Channels regularly
spaced at Fs/N ”Each bin is a filtered , down-converted and decimated channel Channel Spacing –Controlled by sample rate and transform size Channel Sample Rate –Fs/N, or controlled by overlapping FFTs
Filter Shape –sinc/x function for non-windowed FFT, or controlled by Window function
Example –GSM Channeliser
Complex Sample Rate (Fs) = Input Bandwidth = 102.4 MHz
FFT Size (N) = Number of channels = 512Channel Spacing = 200 kHz Channel Sample Rate = 200 kHz
Filter performance for Windowed FFT Kaiser Windowed 32-point FFT
-20
-40
-60
-80
-100
dB
0-Fs/2+Fs/2Frequency Channel Spacing =F s /N
Weight, Overlap and Add (WOLA)
x[n]
Weight data by weighting function
h[n]
input data
M samples at a time
Divide into blocks of K samples
overlap and add
K -point FFT
X
Phase correction
+++++++
weighting function
Channel Spacing = Fs/K Channel Sample Rate = Fs/M Over-sampling Rate = K/M
Polyphase DFT
A special case of WOLA with integer over-sampling rate
High Performance Filter Bank L
WOLA Filter Performance
N = 32-points
-20
-40
-60
-80
-100
dB
0-Fs/2
Frequency
Channel Spacing = F s /N
Superior Cut-Off &
Stop-Band Performance
+Fs/2
Mixed-Radix FFT
?Use of mixed-radix FFTs allows arbitrary length DFTs to be built ?Greater flexibility for channel spacing and sample rates
Example –GSM Channeliser
Channel Spacing = 200kHz Symbol Rate = 270.833 kHz
To achieve a sample rate at exactly twice the symbol rate one solution is:
Fs = 52MHz M = 96 K = 260
This requires a 260-point DFT !
This example is being targeted at Virtex-II 6000 device to produce a 200-channel GSM channeliser.
Pipelined FFT Implementations
?When K is 2n an FFT can be used in the WOLA
?Pipelined techniques allow for very high-speed FFT architectures
Stage n Input Buffer (optional)
FFT Length = 2n
Stage 2Stage 1
Bit-Reverser (optional)
RF Engines QuadSpeed FFT Architecture
I even Q even I odd Q odd
I pos Q pos I neg Q neg
FFT Performance on Single FPGA
Transform Length (Samples)
Speed (MS/s)
HyperSpeed
32K points 3.2 GS/s
HiSpeed and QuadSpeed
128K points 400 MS/s
HyperLength (SRAM)
1M points 200 MS/s
HyperLength (SDRAM)
256M points 10 MS/s