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CD4098BMS中文资料

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.CD4098BMS

CMOS Dual Monostable Multivibrator

Description

CD4098BMS dual monostable multivibrator provides stable retriggerable/resettable one shot operation for any ?xed volt-age timing application.

An external resistor (RX) and an external capacitor (CX)control the timing for the circuit. Adjustment of RX and CX provides a wide range of output pulse widths from the Q and Q terminals. The time delay from trigger input to output transition (trigger propagation delay) and the time delay from reset input to output transition (reset propagation delay) are independent of RX and CX.

Leading edge triggering (+TR) and trailing edge triggering (-TR) inputs are provided for triggering from either edge of an input pulse. An unused +TR input should be tied to VSS.An unused -TR input should be tied to VDD. A RESET (on low level) is provided for immediate termination of the output pulse or to prevent output pulses when power is turned on.An unused RESET input should be tied to VDD. However, if an entire section of the CD4098BMS is not used, its RESET should be tied to VSS. See Table 9.

In normal operation the circuit triggers (extends the output pulse one period) on the application of each new trigger pulse. For operation in the non-retriggerable mode,Q is connected to -TR when leading edge triggering (+TR) is used or Q is connected to +TR when trailing edge triggering (-TR) is used.

The time period (T) for this multivibrator can be approximated by: TX =1/2RXCX for CX 3 0.01μF. Time periods as a function of RX for values of CX and VDD are given in Figure 8. Values of T vary from unit to unit and as a function of voltage, temperature, and RXCX.

The minimum value of external resistance, RX, is 5k ?. The maximum value of external capacitance, CX, is 100μF.Figure 9 shows time periods as a function of CX for values of RX and VDD.

The output pulse width has variations of ±2.5% typically, over the temperature range of -55o C to +125o C for CX = 1000pF and RX = 100k ?.

For power supply variations of ±5%, the output pulse width has variations of ±0.5% typically, for VDD = 10V and 15V and ±1% typically, for VDD = 5V at CX = 1000pF and RX =5k ?.

The CD4098BMS is supplied in these 16-lead outline packages:Braze Seal DIP H4T Frit Seal DIP

H1F Ceramic Flatpack

H6W

Features

?High Voltage Type (20V Rating)?Retriggerable/Resettable Capability

?Trigger and Reset Propagation Delays Independent of RX, CX ?Triggering from Leading or Trailing Edge ?Q and Q Buffered Outputs Available ?Separate Resets

?Wide Range of Output Pulse Widths ?100% Tested for Quiescent Current at 20V ?5V, 10V and 15V Parametric Ratings

?Standardized Symmetrical Output Characteristics ?Maximum Input Current of 1μA at 18V Over Full Pack-age Temperature Range; 100nA at 18V and +25o C ?Noise Margin (Over Full Package/Temperature Range)-1V at VDD = 5V -2V at VDD = 10V - 2.5V at VDD = 15V ?Meets All Requirements of JEDEC Tentative Standard No. 13B, “Standard Speci?cations for Description of ‘B’ Series CMOS Devices”

Applications

?Pulse Delay and Timing ?Pulse Shaping Astable Multivibrator

Pinout

CD4098BMS TOP VIEW

14151691312111012345768

CX1

RXCX (1)RESET (1)+TR (1)-TR (1)

Q1VSS

Q1VDD RXCX (2)RESET (2)+TR (2)-TR (2)Q2Q2

CX2TERMINALS 1, 8, 15 ARE ELECTRICALLY CONNECTED INTERNALLY

December 1992

File Number

3332

CD4098BMS

Functional Diagram

MONO 1

453

+TR -TR RESET

CX1

RX1

2RXCX (1)

VDD

MONO 2

121113

+TR -TR RESET

CX2

RX2

1514RXCX (2)

VDD

VDD = 16VSS = 8

Absolute Maximum Ratings Reliability Information

DC Supply Voltage Range, (VDD) . . . . . . . . . . . . . . .-0.5V to +20V (Voltage Referenced to VSS Terminals)

Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VDD +0.5V DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . .±10mA Operating Temperature Range. . . . . . . . . . . . . . . .-55o C to +125o C Package Types D, F, K, H

Storage Temperature Range (TSTG). . . . . . . . . . .-65o C to +150o C Lead Temperature (During Soldering) . . . . . . . . . . . . . . . . .+265o C At Distance 1/16 ± 1/32 Inch (1.59mm± 0.79mm) from case for 10s Maximum Thermal Resistance . . . . . . . . . . . . . . . .θjaθjc Ceramic DIP and FRIT Package. . . . .80o C/W20o C/W Flatpack Package . . . . . . . . . . . . . . . .70o C/W20o C/W Maximum Package Power Dissipation (PD) at +125o C

For TA = -55o C to +100o C (Package Type D, F, K). . . . . .500mW For TA = +100o C to +125o C (Package Type D, F, K) . . . . .Derate

Linearity at 12mW/o C to 200mW Device Dissipation per Output Transistor . . . . . . . . . . . . . . .100mW For TA = Full Package Temperature Range (All Package Types) Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+175o C

TABLE1.DC ELECTRICAL PERFORMANCE CHARACTERISTICS

PARAMETER SYMBOL CONDITIONS(NOTE 1)

GROUP A

SUBGROUPS TEMPERATURE

LIMITS

UNITS

MIN MAX

Supply Current IDD VDD = 20V, VIN = VDD or GND1+25o C-2μA

2+125o C-200μA

VDD = 18V, VIN = VDD or GND3-55o C-2μA Input Leakage Current IIL VIN = VDD or GND VDD = 20V1+25o C-100-nA

2+125o C-1000-nA

VDD = 18V3-55o C-100-nA Input Leakage Current IIH VIN = VDD or GND VDD = 20V1+25o C-100nA

2+125o C-1000nA

VDD = 18V3-55o C-100nA Output Voltage VOL15VDD = 15V, No Load1, 2, 3+25o C, +125o C, -55o C-50mV Output Voltage VOH15VDD = 15V, No Load (Note 3)1, 2, 3+25o C, +125o C, -55o C14.95-V Output Current (Sink)IOL5VDD = 5V, VOUT = 0.4V1+25o C0.53-mA Output Current (Sink)IOL10VDD = 10V, VOUT = 0.5V1+25o C 1.4-mA Output Current (Sink)IOL15VDD = 15V, VOUT = 1.5V1+25o C 3.5-mA Output Current (Source)IOH5A VDD = 5V, VOUT = 4.6V1+25o C--0.53mA Output Current (Source)IOH5B VDD = 5V, VOUT = 2.5V1+25o C--1.8mA Output Current (Source)IOH10VDD = 10V, VOUT = 9.5V1+25o C--1.4mA Output Current (Source)IOH15VDD = 15V, VOUT = 13.5V1+25o C--3.5mA N Threshold Voltage VNTH VDD = 10V, ISS = -10μA1+25o C-2.8-0.7V P Threshold Voltage VPTH VSS = 0V, IDD = 10μA1+25o C0.7 2.8V

Functional F VDD = 2.8V, VIN = VDD or GND7+25o C VOH >

VDD/2VOL <

VDD/2

VDD = 20V, VIN = VDD or GND7+25o C

VDD = 18V, VIN = VDD or GND8A+125o C

VDD = 3V, VIN = VDD or GND8B-55o C

Input Voltage Low

(Note 2)

VIL VDD = 5V, VOH > 4.5V, VOL < 0.5V1, 2, 3+25o C, +125o C, -55o C- 1.5V

Input Voltage High

(Note 2)

VIH VDD = 5V, VOH > 4.5V, VOL < 0.5V1, 2, 3+25o C, +125o C, -55o C 3.5-V

Input Voltage Low (Note 2)VIL VDD = 15V, VOH > 13.5V,

VOL < 1.5V

1, 2, 3+25o C, +125o C, -55o C-4V

Input Voltage High (Note 2)VIH VDD = 15V, VOH > 13.5V,

VOL < 1.5V

1, 2, 3+25o C, +125o C, -55o C11-V

NOTES: 1.All voltages referenced to device GND, 100% testing being implemented.

2.Go/No Go test with limits applied to inputs.

3.For accuracy, voltage is measured differentially to VDD. Limit

is 0.050V max.

TABLE2.AC ELECTRICAL PERFORMANCE CHARACTERISTICS

PARAMETER SYMBOL CONDITIONS(NOTE 1, 2)

GROUP A

SUBGROUPS TEMPERATURE

LIMITS

UNITS

MIN MAX

Propagation Delay +TR, -TR to Q,Q TPHL1

TPLH1

VDD = 5V, VIN = VDD or GND

RX = 5K to 10K?, CX≥ 15pF

9+25o C-500ns

10, 11+125o C, -55o C-675ns

Transition Time TTHL1VDD = 5V, VIN = VDD or GND

RX = 5K to 10K?, CX = 15pF to

10,000pF

9+25o C-200ns 10, 11+125o C, -55o C-270ns

Transition Time (Note 2)TTLH1VDD = 5V, VIN = VDD or GND

RX = 5K to 10K?, CX≥ 15pF

9+25o C-200ns

10, 11+125o C, -55o C-270ns

NOTES:

1.CL = 50pF, RL = 200K, Input TR, TF < 20ns.

2.-55o C and +125o C limits guaranteed, 100% testing being implemented.

TABLE3.ELECTRICAL PERFORMANCE CHARACTERISTICS

PARAMETER SYMBOL CONDITIONS NOTES TEMPERATURE

LIMITS

UNITS MIN MAX

Supply Current IDD VDD = 5V, VIN = VDD or GND1, 2-55o C, +25o C-1μA

+125o C-30μA

VDD = 10V, VIN = VDD or GND1, 2-55o C, +25o C-2μA

+125o C-60μA

VDD = 15V, VIN = VDD or GND1, 2-55o C, +25o C-2μA

+125o C-120μA Output Voltage VOL VDD = 5V, No Load1, 2+25o C, +125o C,

-55o C

-50mV

Output Voltage VOL VDD = 10V, No Load1, 2+25o C, +125o C,

-55o C

-50mV

Output Voltage VOH VDD = 5V, No Load1, 2+25o C, +125o C,

-55o C

4.95-V

Output Voltage VOH VDD = 10V, No Load1, 2+25o C, +125o C,

-55o C

9.95-V Output Current (Sink)IOL5VDD = 5V, VOUT = 0.4V1, 2+125o C0.36-mA

-55o C0.64-mA Output Current (Sink)IOL10VDD = 10V, VOUT = 0.5V1, 2+125o C0.9-mA

-55o C 1.6-mA Output Current (Sink)IOL15VDD = 15V, VOUT = 1.5V1, 2+125o C 2.4-mA

-55o C 4.2-mA Output Current (Source)IOH5A VDD = 5V, VOUT = 4.6V1, 2+125o C--0.36mA

-55o C--0.64mA Output Current (Source)IOH5B VDD = 5V, VOUT = 2.5V1, 2+125o C--1.15mA

-55o C--2.0mA Output Current (Source)IOH10VDD = 10V, VOUT = 9.5V1, 2+125o C--0.9mA

-55o C--1.6mA Output Current (Source)IOH15VDD =15V, VOUT = 13.5V1, 2+125o C--2.4mA

-55o C--4.2mA

Input Voltage Low VIL VDD = 10V, VOH > 9V, VOL <

1V 1, 2+25o C, +125o C,

-55o C

-3V

Input Voltage High VIH VDD = 10V, VOH > 9V, VOL <

1V 1, 2+25o C, +125o C,

-55o C

+7-V

Propagation Delay +TR, -TR to Q,Q CX ≥ 15pF TPHL1TPLH1VDD = 10V 1, 2, 3, 4+25o C -250ns VDD = 15V 1, 2, 3, 4+25o C -200ns Propagation Delay Reset CX ≥ 15pF

TPHL2TPLH2

VDD = 5V 1, 2, 3+25o C -450ns VDD = 10V 1, 2, 3, 4+25o C -250ns VDD = 15V

1, 2, 3,4+25o C -150ns Transition Time

CX = 15pF to 10,000pF TTHL1VDD = 10V 1, 2, 3, 4+25o C -100ns VDD = 15V 1, 2, 3, 4+25o C -80ns Transition Time

CX = 0.01μF to 0.1μF

TTLH2TTHL2

VDD = 5V 1, 2, 3+25o C -300ns VDD = 10V 1, 2, 3, 5+25o C -150ns VDD = 15V

1, 2, 3, 5+25o C -130ns Transition Time CX = 0.1μF to 1μF

TTHL3

VDD = 5V 1, 2, 3+25o C -500ns VDD = 10V 1, 2, 3, 4+25o C -300ns VDD = 15V

1, 2, 3, 4+25o C -160ns Transition Time CX ≥ 15pF

TTLH1VDD = 10V 1, 2, 3, 4+25o C -100ns VDD = 15V 1, 2, 3, 4+25o C -80ns Minimum Reset Pulse Width, CX = 15pF

VDD = 5V 1, 2, 3, 5+25o C -200ns VDD = 10V 1, 2, 3, 5+25o C -80ns VDD = 15V

1, 2, 3, 5+25o C -60ns Minimum Reset Pulse Width, CX = 1000pF

VDD = 5V 1, 2, 3, 5+25o C -1200ns VDD = 10V 1, 2, 3, 5+25o C -600ns VDD = 15V

1, 2, 3,5+25o C -500ns Minimum Reset Pulse Width, CX = 0.1μF

VDD = 5V 1, 2, 3, 5+25o C -50μs VDD = 10V 1, 2, 3, 5+25o C -30μs VDD = 15V

1, 2, 3, 5+25o C -20μs Pulse Width Match Be-tween Circuits in Same Package

VDD = 5V 1, 2, 3, 6+25o C -10%VDD = 10V 1, 2, 3, 6+25o C -15%VDD = 15V

1, 2, 3, 6+25o C -15%Trigger Rise or Fall Time TRTR TFTR VDD = 5V to 15V 1, 2+25o C -100μs Input Capacitance CIN

Any Inputs

1, 2

+25o C

-7.5

NOTES:

1.All voltages referenced to device GND.

2.The parameters listed on Table 3 are controlled via design or process and are not directly tested. These parameters are characterized on initial design release and upon design changes which would affect these characteristics.

3.CL = 50pF, RL = 200K, inputs tR, tF < 20ns.

4.RX = 5K to 10M ?.

5.RX = 100k ?

6.RX = 10k ?

TABLE 4.POST IRRADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS

PARAMETER SYMBOL CONDITIONS

NOTES TEMPERATURE

LIMITS

UNITS MIN MAX Supply Current IDD VDD = 20V, VIN = VDD or GND 1, 4+25o C -7.5μA N Threshold Voltage

VNTH

VDD = 10V, ISS = -10μA

1, 4

+25o C

-2.8

-0.2

TABLE 3.ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued)

PARAMETER SYMBOL CONDITIONS

NOTES TEMPERATURE

LIMITS

UNITS MIN MAX

N Threshold Voltage Delta

?VTN VDD = 10V, ISS = -10μA 1, 4+25o C -±1V P Threshold Voltage VTP VSS = 0V, IDD = 10μA 1, 4+25o C 0.2 2.8V P Threshold Voltage Delta ?VTP VSS = 0V, IDD = 10μA

1, 4+25o C -±1V Functional

VDD = 18V, VIN = VDD or GND 1

+25o C

VOH >VDD/2VOL

VDD = 3V, VIN = VDD or GND

Propagation Delay Time

TPHL TPLH

VDD = 5V

1, 2, 3, 4

+25o C

- 1.35 x +25o C Limit

NOTES: 1.All voltages referenced to device GND.

2.CL = 50pF, RL = 200K, Input TR, TF < 20ns.

3.See Table 2 for +25o C limit.

4.Read and Record

TABLE 5.BURN-IN AND LIFE TEST DELTA PARAMETERS +25o C PARAMETER

SYMBOL DELTA LIMIT

Supply Current - MSI-1IDD ± 0.2μA

Output Current (Sink)IOL5± 20% x Pre-Test Reading Output Current (Source)

IOH5A

± 20% x Pre-Test Reading

TABLE 6.APPLICABLE SUBGROUPS

CONFORMANCE GROUP MIL-STD-883METHOD GROUP A SUBGROUPS

READ AND RECORD Initial Test (Pre Burn-In)100% 50041, 7, 9IDD, IOL5, IOH5A Interim Test 1 (Post Burn-In)100% 50041, 7, 9IDD, IOL5, IOH5A Interim Test 2 (Post Burn-In)100% 50041, 7, 9IDD, IOL5, IOH5A

PDA (Note 1)

100% 50041, 7, 9, Deltas

Interim Test 3 (Post Burn-In)100% 50041, 7, 9IDD, IOL5, IOH5A

PDA (Note 1)100% 50041, 7, 9, Deltas Final Test 100% 50042, 3, 8A, 8B, 10, 11Group A Sample 50051, 2, 3, 7, 8A, 8B, 9, 10, 11Group B

Subgroup B-5Sample 50051, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas

Subgroups 1, 2, 3, 9, 10, 11Subgroup B-6

Sample 50051, 7, 9Group D

Sample 5005

1, 2, 3, 8A, 8B, 9

Subgroups 1, 2 3

NOTE:1. 5% Parameteric, 3% Functional; Cumulative for Static 1 and 2.

TABLE 7.TOTAL DOSE IRRADIATION

CONFORMANCE GROUPS MIL-STD-883METHOD

TEST

READ AND RECORD PRE-IRRAD POST-IRRAD PRE-IRRAD

POST-IRRAD Group E Subgroup 2

5005

1, 7, 9

Table 4

1, 9

Table 4

TABLE 4.POST IRRADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS

PARAMETER SYMBOL CONDITIONS

NOTES TEMPERATURE

LIMITS

UNITS MIN MAX

All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certi?cation.

Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or speci?cations at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.

For information regarding Intersil Corporation and its products, see web site https://www.wendangku.net/doc/e114831883.html,

TABLE 8.BURN-IN AND IRRADIATION TEST CONNECTIONS

FUNCTION OPEN GROUND VDD 9V ± -0.5V

OSCILLATOR

50kHz

25kHz

Static Burn-In 1Note 16, 7, 9, 101-5, 8, 11-1516Static Burn-In 2Note 16, 7, 9, 10

1, 8, 152-5, 11-14, 16Dynamic Burn-In Note 1-1, 4, 8, 12, 152, 14, 166, 7, 9, 10

5, 11

3, 13

Irradiation Note 22, 6, 7, 9, 10, 14

1, 8, 15

3-5, 11-13, 16

NOTE:

1.Each pin except VDD and GND will have a series resistor of 10K ± 5%, VDD = 18V ± 0.5V

2.Each pin except VDD and GND will have a series resistor of 47K ±5%; Group E, Subgroup 2, sample size is 4 dice/wafer, 0 failures, VDD = 10V ± 0.5V

TABLE 9.FUNCTIONAL TERMINAL CONNECTIONS FUNCTION

VDD TO TERM. NO.

VSS TO TERM. NO.INPUT PULSE TO

TERM. NO.OTHER CONNECTIONS MONO 1MONO 2MONO 1

MONO 2

MONO 1

MONO 2MONO 1

MONO 2

Leading Edge Trigger/Retriggerable 3, 511, 13412Leading Edge Trigger/Non-Retriggerable 3134

125-711-9

Trailing Edge Trigger/Retriggerable 313412511Trailing Edge Trigger/Non-Retriggerable 3135

4-612-10

Unused Section 5

3, 412, 13

NOTES:

1.A retriggerable one-shot multivibrator has an output pulse width which is extended one full time period (TX) after application of the last trigger pulse. The minimum time between retriggering edges (or trigger and retrigger edges) is 40% of (TX).

2.A non-retriggerable one-shot multivibrator has a time period TX referenced from the application of the first trigger pulse.

INPUT PULSE TRAIN

RETRIGGERABLE MODE PULSE WIDTH (+TR MODE)NON-RETRIGGERABLE MODE

PULSE WIDTH (-TR MODE)

Logic Diagram

FIGURE 1.LOGIC DIAGRAM

Typical Performance Characteristics

FIGURE 2.TYPICAL OUTPUT LOW (SINK) CURRENT

CHARACTERISTICS FIGURE 3.MINIMUM OUTPUT LOW (SINK) CURRENT

CHARACTERISTICS

VDD

VSS

D Q

C R1

VDD

*RXCX

2 (14)Q 6 (10)Q

7 (9)VSS VDD

81 (15)

3 (13)RESET

5 (11)-TR 4 (12)+TR NOTE:

SCHEMATIC SHOWN IS 1/2 OF TOTAL PACKAGE. TWO SETS OF TERMINAL NUMBERS ARE SHOWN. TERMINALS 1, 8, AND 15 ARE ELECTRICALLY CONNECTED INTERNALLY.

VDD

VSS

*ALL INPUTS ARE PROTECTED BY CMOS PROTECTION NETWORK

10V

AMBIENT TEMPERATURE (T A ) = +25o C

GATE-TO-SOURCE VOLTAGE (VGS) = 15V

51015

151********DRAIN-TO-SOURCE VOLTAGE (VDS) (V)

O U T P U T L O W (S I N K ) C U R R E N T (I O L ) (m A )

10V

AMBIENT TEMPERATURE (T A ) = +25o C

GATE-TO-SOURCE VOLTAGE (VGS) = 15V

51015

7.55.02.510.012.515.0DRAIN-TO-SOURCE VOLTAGE (VDS) (V)

O U T P U T L O W (S I N K ) C U R R E N T (I O L ) (m A )

FIGURE 4.TYPICAL OUTPUT HIGH (SOURCE) CURRENT

CHARACTERISTICS

FIGURE 5.MINIMUM OUTPUT HIGH (SOURCE) CURRENT

CHARACTERISTICS

FIGURE 6.TYPICAL PROPAGATION DELAY TIME vs LOAD CA-PACITANCE, TRIGGER INTO Q OUT (ALL VALUES OF CX AND RX).

FIGURE 7.TRANSITION TIME vs LOAD CAPACITANCE FOR

RX = 5k ?-10000k ? AND CX = 15pF-10000pF

FIGURE 8.TYPICAL EXTERNAL RESISTANCE vs PULSE

WIDTH FIGURE 9.TYPICAL EXTERNAL CAPACITANCE vs PULSE

WIDTH

-10V

-15V

AMBIENT TEMPERATURE (T A

) = +25o C

GATE-TO-SOURCE VOLTAGE (VGS) = -5V

0-5-10-15

DRAIN-TO-SOURCE VOLTAGE (VDS) (V)

-20-25

-30

0-5

-10-15O U T P U T H I G H (S O U R C E ) C U R R E N T (I O H ) (m A )

-10V

-15V

AMBIENT TEMPERATURE (T A ) = +25o

-5

-10

-15

DRAIN-TO-SOURCE VOLTAGE (VDS) (V)

-5

-10-15O U T P U T H I G H (S O U R C E ) C U R R E N T (I O H ) (m A )GATE-TO-SOURCE VOLTAGE (VGS) = -5V

LOAD CAPACITANCE (CL) (pF)

0100

SUPPL Y VOLTAGE (VDD) = 15V

P R O P A G A T I O N D E L A Y T I M E (t P H L , t P L H ) (n s )

AMBIENT TEMPERATURE (T A ) = +25o C

10V 20

406080100120140

15V

200

300

AMBIENT TEMPERATURE (T A ) = +25o C

LOAD CAPACITANCE (CL) (pF)

40608010020

050

100

150

200

SUPPL Y VOLTAGE (VDD) = 5V

10V

T R A N S I T I O N T I M E (t T H L , t T L H ) (n s )

AMBIENT TEMPERATURE (T A ) = +25o C

103

468104

468105

468106

46810-1

2468

124681022468

103

2468

104

2468

1052468

2468

106

E X T E R N A L R E S I S T A N C E (R X ) (?)

PULSE WIDTH (PW) (μs)

CX = 0.01μF

CX = 0.1μF

CX = 15pF CX = 100pF

CX = 1000pF

107VDD = 3V

= 5V

= 10V, 15V, 18V

VDD = 5V, 10V, 15V, 18V

VDD = 3V, 5V

AMBIENT TEMPERATURE (T A ) = +25o C 1010

10310410-1

102103104105

106

E X T E R N A L C A P A C I T A N C E (C X ) (p

F )

PULSE WIDTH (PW) (μs)

105VDD = 3V

= 5V

= 10V, 15V, 18V

RX = 100K ?

RX = 10M ?

RX =1M ?106107RX = 10K ?

RX = 5K ?

FIGURE 10.TYPICAL MINIMUM RESET PULSE WIDTH vs EXTERNAL CAPACITANCE

FIGURE 11.AVERAGE POWER DISSIPATION vs ONE-SHOT PULSE WIDTH

Applications

FIGURE 12.PULSE DELAY

SUPPL Y VOLTAGE (VDD) = 5V

10V 15V AMBIENT TEMPERATURE (T A ) = +25o C CL = 50pF RX = 100K ?FREQUENCY = 100KHz

RISE TIME (tr), FALL (tf) = 20ns

1022

1032

1042

105

EXTERNAL CAPACITANCE (CX) (pF)

468

1022

468103

468104

468105M I N I M U M R E S E T P U L S E W I D T H (t W R ) (n s )

A V E R A G E P O W E R - D I S S I P A T I O N F O R 100%D U T Y C Y C L E (P 100) (μW )

106

642

105

642

104

642

103

210

210642

102642

103642

104642

105

642

ONE-SHOT PULSE WIDTH (τm) (μs)

AMBIENT TEMPERATURE (T A ) = +25o C RX = 5K ? TO 1M ?CL = 50pF

VDD = 5V

= 10V = 15V

CX = 100pF

1μF 0.1μF

0.01μF

1000pF τm

τT

To calculate average power dissipation(P)

for less than 100% duty cycle:

P100 = average power for 100% duty cycle:

P =

(

tm )P100 where τm = one shot pulse

width

τT

τT = trigger pulse period

e.g. For τm = 600μs, tT = 1000μs. CX = 0.01mF

VDD = 5V

P1 =(

600)

103μW = 600μW (see dotted line on

graph)

1000

MONO 1

453

+TR VDD

RX1

CX1

MONO 2111213

-TR

VDD

RX2

151410Q CX2

VSS VDD

VDD

OUTPUT

INPUT PULSE OUTPUT PULSE

T1≈

2RX1 CX1

T2≈

RX2 CX2CX ≥ 0.01μF

FIGURE 13.ASTABLE MULTIVIBRATOR WITH RESTART AFTER RESET CAPABILITY

Chip Dimensions and Pad Layout

Dimensions in parenthesis are in millimeters and are derived from the basic inch dimensions as indicated.Grid graduations are in mils (10-3 inch).

METALLIZATION:Thickness: 11k ??14k ?, AL.

PASSIVATION:

10.4k? - 15.6k ?, Silane

BOND PADS:0.004 inches X 0.004 inches MIN DIE THICKNESS:0.0198 inches - 0.0218 inches

Applications (Continued)

IDD, TX vs RX

RX IDD

(AVG.)TX (T1 + T2)VDD 10k ?

10M ?1mA 0.05mA 3.8μs 0.5s 5V

2.5mA 0.5mA

3.2μs 0.5s 10V

5mA

1mA

3μs 0.5s

10V

NOTES:

1.All values are typical.

2.CX range:0.0001μF to 0.1μF

MONO 1

453+TR VDD

RX1

126

CX1

MONO 2

111213

-TR R

RX2

15149Q2CX2

VSS

VDD

OUTPUT

IDD

VDD SUPPLY

Q2R 8

VSS Q1Q1VDD VSS

RESET

TO ENSURE RESTART, APPLY RESET (NEGATIVE PULSE) AFTER VDD SUPPLY VOLTAGE HAS REACHED ITS VDD LEVEL

VDD 0Q2

IDD

VDD SUPPLY RESET *

10TX

RUN