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XRT84L14中文资料

á?PRODUCT BRIEF XRT84L14

QUAD T1 FRAMER OCTOBER 2000REV. A1.0.0

GENERAL DESCRIPTION

The XRT84L14 quad T1/DS1 Framer is a single chip device which integrates 4 T1 framers and transmitters for terminating DS1 Signals. Each framer has its own framing synchronizer and transmit-receive slip bufffers, and can be independently enabled or dis-abled as required and can be configured to frame to the common DS1 signal formats

Each Framer block contains its own T ransmit and Re-ceive T1 Framing function. The T ransmit HDLC con-troller encapsulates contents of the T ransmit HDLC buffers into LAPD Message frames. The Receive HDLC controller extracts payload content of Receive LAPD Message frames from the incoming T1 data stream and writes it into the Receive HDLC buffer. Each framer also contains a T ransmit and Overhead Data Input port, which permits Data Link T erminal Equipment direct access to the outbound T1 frames Likewise, a Receive Overhead output data port per-mits Data Link T erminal Equipment direct access to the Data Link bits of the inbound T1 frames.

The XRT84L18 fully meets all of the latest T1 specifi-cations: ANSI T1.403-1995, ANSI T1.231-1993,

A T&T TR62411 (12-90), A T&T TR54016 and

TR62411, and ITU G-703, G.704, G706 and G.733. Extensive test and diagnostic functions include Loop-backs, Boundary scan, Pseudo Random bit se-quence (PRBS) test pattern generation, Performance Monitor,Bit Error Rate (BER) meter, and forced error insertion.

FEATURES

?Four independent, full duplex DS1 Tx and Rx Framer

?T wo 512-bit (two-frame) elastic store, PCM frame slip buffers (FIFO) on TX and Rx

?Provides up to 8.192 MHz asynchronous back plane connections with jitter and wander attenuation ?Supports input PCM and signaling data from 1.544 to 8.192 MHz. Also supports 4-channel multiplexed 12.352/16.384 Mbit/s on the back plane bus ?Programmable output clocks for Fractional T1?Supports channel associated signaling (CAS)?Supports Common-channel and ISDN Primary Rate Interface (ISDN PRI) signaling

?Integrated HDLC controller with two 96-byte T ransmit HDLC buffers and two 96-byte Receive HDLC buffers ?Timeslot assignable HDLC

?Programmable Interrupt output pin

?Supports programmed I/O, Burst and DMA modes of Read-Write access

?Facilitates Inverse Multiplexing for A TM

?Extracts and inserts robbed bit signaling (RBS)

F IGURE 1. 84L14 S YSTEM D IAGRAM

元器件交易网https://www.wendangku.net/doc/eb17583870.html,

XRT84L14á?QUAD T1 FRAMER

REV. A1.0.0PRODUCT BRIEF

FEATURES (CONT.)

?8-bit Intel/Motorola μP interface for configuration, control and status monitoring

?Each framer block encodes and decodes the T1 Frame serial data into and from the Single-rail or Dual-rail

(B8ZS) format

?Dual or single rail line side digital PCM inputs ?Detects and forces Red (SAI), Y ellow (RAI) and Blue (AIS) Alarms

?Detects OOF, LOF, LOS errors and COFA conditions ?Loopbacks: Local (LLB) and Line remote (RLB) ?Performance monitor with one second polling ?Boundary scan (IEEE 1149.1) JT AG test port ?Accepts external 8kHz Sync reference

?Fully meets all of the latest T1 specifications: ANSI

T1.403-1995, ANSI T1.231-1993, AT&T TR62411 (12-

90), AT&T TR54016 and TR62411, and ITU G-703,

G.704, G706 and G.733.3.3V CMOS operation with 5V tolerant inputs

?208-pin PQFP package with –40°C to +85°C operation ?Pin-compatible with the XRT84V24, 4-channel E1 framer ?Direct Interface to Exar’s four channel LIUs

APPLICATIONS

?High-Density T1 interfaces for Multiplexers, Switches, LAN Routers and Digital Modems

?SONET/SDH terminal or Add/Drop multiplexers (ADMs) ?T1 add/drop multiplexers (MUX)

?Channel Service Units (CSUs): T1 and Fractional T1?Digital Access Cross-connect System (DACs)

?Digital Cross-connect Systems (DCS)

?Frame Relay Switches and Access Devices (FRADS)?ISDN Primary Rate Interfaces (PRA)

?PBXs and PCM channel bank

?T3 channelized access concentrators and M13 MUX ?Wireless base stations

?A TM equipment with integrated DS1 interfaces ?Multichannel DS1 T est Equipment

?T1 Performance Monitoring

á?XRT84L14

QUAD T1 FRAMER PRODUCT BRIEF REV. A1.0.0

F IGURE 2. 84L14 B LOCK D IAGRAM

XRT84L14á?QUAD T1 FRAMER

REV. A1.0.0PRODUCT BRIEF F IGURE 3. P IN O UT OF THE XRT84L14 IN THE 208 PIN PQFP PACKAGE

ORDERING INFORMATION

P ART N UMBER P ACKAGE O PERATING T EMPERATURE R ANGE

XRT84L14IQ208-pin PQFP-40°C to +85°C

á?XRT84L14

QUAD T1 FRAMER PRODUCT BRIEF REV. A1.0.0

PACKAGE DIMENSIONS

Note: The control dimension is the millimeter column

INCHES MILLIMETERS

SYMBOL MIN MAX MIN MAX

A0.1280.161 3.25 4.10

A10.0020.0200.050.50

A20.1260.142 3.20 3.60

B0.0070.0110.170.27

C0.0040.0080.090.20

D 1.197 1.21230.4030.80

D1 1.098 1.10627.9028.10

e0.0197 BSC0.50 BSC

L0.0180.0300.450.75

α0°8°0°8°

á?

XRT84L14 QUAD T1 FRAMER PRODUCT BRIEF REV. A1.0.0

REVISIONS

NOTICE

EXAR Corporation reserves the right to make changes to the products contained in this publication in order to improve design, performance or reliability. EXAR Corporation assumes no responsibility for the use of any circuits described herein, conveys no license under any patent or other right, and makes no represen-tation that the circuits are free of patent infringement. Charts and schedules contained here in are only for illustration purposes and may vary depending upon a user’s specific application. While the information in this publication has been carefully checked; no responsibility, however, is assumed for inaccuracies. EXAR Corporation does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to cause failure of the life support sys-tem or to significantly affect its safety or effectiveness. Products are not authorized for use in such applica-tions unless EXAR Corporation receives, in writing, assurances to its satisfaction that: (a) the risk of injury or damage has been minimized; (b) the user assumes all such risks; (c) potential liability of EXAR Corpo-ration is adequately protected under the circumstances.

Copyright 2000 EXAR Corporation

Datasheet October 2000.

Reproduction, in part or whole, without the prior written consent of EXAR Corporation is prohibited.

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