ADS42XX系列开发板
User's Guide
SLAU333–March2011
ADS42xx EVM This is the user’s guide for the ADS42xx EVM(Revision B).The ADS42xx is a dual channel12-bit/14-bit, up to250MSPS dual analog-to-digital converter family.This EVM is specifically suited for interfacing with TI’s TSW1200EVM to capture and display waveforms from the ADC.The EVM schematic,BOM,and layout files can be found in the design package in the ADS42xx EVM product folder on https://www.wendangku.net/doc/e218225317.html,.
Contents
1Software Control (2)
1.1Installation Instructions (2)
1.2Software Operation (2)
2Basic Test Procedure (5)
2.1Test Block Diagram (5)
2.2Verify Board Set-up (5)
2.3Test Set-up connections (6)
2.4TSW1200Quick start Operation (6)
2.5ADS42xx Test Procedure (7)
2.6ADS42xx Performance Results (8)
3Optional Configurations (8)
3.1THS4509Input Op-Amp Configuration (8)
3.2On-Board CDC72010Clock (9)
3.3Parallel CMOS Output (9)
List of Figures
1ADS58C28_ADS42xx_GUI Front Panel–Top Level (3)
2ADS58C28_ADS42xx_GUI–Advanced Level (4)
3Test Set-up Block Diagram (5)
4TSW1200GUI (7)
5FFT Plot:250MHz Clock,170MHz Input (8)
List of Tables
1Default ADS58C28/42xx EVM Rev B Jumper Setting for Serial Interface (5)
2Parallel interface with pin control of ADS58C28/42xx EVM Rev B Jumper setting (6)
3Jumper Setting for Transformer-Coupled or OPA-Driven Input (8)
4Jumper Setting for Transformer-Coupled or CDC72010Input (9)
5Jumper/Component Setting for DDR LVDS Output and Parallel CMOS Output (9)
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1.1Installation Instructions
?Open folder named:ADS58C28_ADS42xx_Installer_vxpx(where xpx represents the latest version).
?Double-click:setup.exe
?Follow on-screen instructions to complete GUI installation
–Wait for“ADS58C28/ADS42xx_Installer”initializing screen to complete
–Click“Next”to install files in the default destination directory
–Select“I accept the License Agreement”and click“Next”
–Select“Next”on the summary page
–Wait for files to load and then click“Next”
–Once all files are installed click“Next”
?If Windows?Logo Message window appears,click“Continue Anyway”.
?Once installed,launch by clicking on the ADS58C28_ADS42xx_GUI_vxpx program in Start>Texas Instruments ADCs
?When plugging in the USB cable for the first time,you will be prompted to install the USB drivers.
–On the Welcome to the Found New Hardware Wizard window select“No,not at this time”.
–Select“Install the software automatically”button on the next window
–Select“Continue Anyway”on the Windows Logo Message window
–If computer can not find the drivers automatically then you can access them directly in the install directory:C:\Program Files\Texas Instruments\ADS58C28_ADS42xx\data\
–Click“Finish”once completed
1.2Software Operation
The software allows full programming control of the ADC device.Figure1shows the GUI front panel that has two register tabs:Top Level and Advanced.The Top Level tab provides an interface to the most used registers.The Advanced tab includes less used registers and provides an option to manually input
address and data values.
1.2.1Top Level
Figure1shows the Top Level tab of the register user interface.Below is a brief explanation of the
controls.Please refer to the ADS42xx datasheet for more detailed explanations of the register functions as needed.
?Device selection:Device selection of ADS58C28or ADS42xx for proper device.
?Reset:Device reset,click this switch to reset the registers in the device.
?PND Global:Device power down,click this switch on to power down the device.
?Data format:Device output data format,click it to set2’s complement or offset binary
format.
?LVDS_CMOS Ctrl:Select this box for LVDS or CMOS output format.
?Digital Funct Ctrl:Enable or disable three digital functions:
SNRboost/Gain Disable–Gain,test patterns,and offset correction are disabled.
SNRboost Enable Only–Gain,test patterns and offset correction are disabled,SNRBoost enable.
SNRboost/Gain Enable–Gain,test patterns,offset correction are enabled,SNRBoost enable.
?Gain_chA:Set this box for gain of channel A.
?Gain_chB:Set this box for gain of channel B.
?Test Pattern:Select device test pattern.
?High Perf Mode:High performance mode enable or disable.
?High Freq Mode ChA:High frequency Mode enable for channel A.
?High Freq Mode ChB:High frequency Mode enable for channel B.
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?Low Speed Mode En:Low speed mode enable or disable.
?Low Speed Mode ChA:Low speed mode for channel A.
?Low Speed Mode ChB:Low speed mode for channel B.
?LVDS Data Strength:Set the data strength from this switch.
?LVDS Clkout Strength:Set the output clock strength from this switch.
?CMOS Clk Strength:Set CMOS output clock strength from this switch.
Figure1.ADS58C28_ADS42xx_GUI Front Panel–Top Level
1.2.2Advanced Level
Click on“Advanced”tab on the GUI to bring the advanced panel to the front.On this panel user can write address and data of any register into the address/data boxes(as shown in Figure2,“45”is address and “4”is data).Press Enter on the key board once data is entered or click“Send All”button on the GUI to send address and data from the boxes to ADC.The address and data are shown in the display box
located at right side of the panel.In addition,there is group of switches used for output offset functions, SNRBoost pin overwrite(for ADS58C28),and a group of LEDs used to designate a custom test pattern.
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Figure2.ADS58C28_ADS42xx_GUI–Advanced Level
1.2.3Register Control
?Send All:Sends all the register configurations on the panel to the device
?Read All:Not active
?Save Regs:Saves the register configuration to text file
?Load Regs:Loads a register file from a text file.After load register the relative switches and
selecting boxes are automatically updated.
o Select Load Regs button.
o Double click on the desired register file.
o Click on Send All to ensure all of the values are loaded properly.
1.2.4Miscellaneous Settings
?Device Selection:Select ADS58C28or ADS42xx for proper operation.
?Reset USB:Toggle this button if the USB port is not responding.This generates a new USB
handle address.
?Show USB Port:Allows user to change USB port configuration.Default setting is appropriate for
the EVM RevB.
?Exit:Stops the program
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https://www.wendangku.net/doc/e218225317.html, Basic Test Procedure
2Basic Test Procedure
This section outlines the basic test procedure for testing the EVM.
2.1Test Block Diagram
The test set-up for general testing of the ADS42xx/ADS58C28EVM with the TSW1200capture card is shown in Figure 3.
Figure 3.Test Set-up Block Diagram
2.2Verify Board Set-up
Verify jumper settings are in the correct position as outlined in Table 1.
Table 1.Default ADS58C28/42xx EVM Rev B Jumper Setting for Serial
Interface (1)
Jumper Default position Function JP15Short 12DC supply JP16Short 12DC supply JP17Short 23DC supply,LDO JP19Short 23DC supply,LDO JP28Short 23DC supply,LDO JP29Short 23DC supply,LDO JP26Open DC supply for ext buffer JP27Open DC supply for ext buffer JP3Short 2-3OPA power down JP4Short 2-3OPA power down JP22Open SDOUT to FPGA JP20Short 12CDC JP21Short 12CDC
J14Short 12CDC power down J18Open CDC,VCXO JP8Short 23ADC SCLK for SPI JP9Short 23ADC SDATA for SPI JP10Short 23ADC SEN for SPI JP11Short 23ADC for SPI,also reset JP 12Short 12ADC Low speed mode disable JP 13Open JP14
Short 78
ADC 2’s complement,DDR LVDS
(1)
The EVM schematic shows default setting of JP8to JP11as parallel interface (Table 2)which is for EVM installation.After EVM tested and released these jumpers are set as serial interface (Table 1).
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Basic Test Procedure https://www.wendangku.net/doc/e218225317.html, Table1.Default ADS58C28/42xx EVM Rev B Jumper Setting for Serial
Interface(1)(continued)
Jumper Default position Function
JP5Short12ADC CTRL3,normal operation
JP6Short12ADC CTRL2,normal operation
JP7Short12ADC CTRL1,normal operation
JP18Short12Ext Buffer
JP23Short12Ext Buffer
JP24Short12Ext Buffer
JP25Short12Ext Buffer
Table2.Parallel interface with pin control of ADS58C28/42xx EVM Rev B
Jumper setting
Jumper Position Function
JP8Short12ADC SCLK for parallel control
JP9Short12ADC SDATA for parallel control
JP10Short12ADC SEN for parallel control
JP11Short12ADC parallel control
2.3Test Set-up connections
?Connect ADS42xx/ADS58C28EVM to TSW1200EVM
?Connect5V power to banana jack at J10;connect ground to J12
?Connect USB cable to programming computer at J17
?Connect USB and power supply jack to TSW1200
?Connect Clock signal through appropriate BPF to J19
?Connect input signal through appropriate BPF to J6,J3
2.4TSW1200Quick start Operation
See the TSW1200User’s Guide(SLAU212)for more detailed explanation of the TSW1200set-up and operation.This document assumes the TSW1200software is installed and functioning properly.The front panel of the TSW1200is shown in Figure4.The following configuration needs to be changed from the default settings.
?Jumper setting on TSW1200board
–Set J11(2-3)High,J10(1-2)Low for LVDS DDR data input(default)
–Set J11(2-1)Low,J10(1-2)Low for1-wire serial data input
?Select ADS42xx device name from the TI ADC Selection pull-down menu
–If this option is not available then download the latest ADS42xx.ini file from the product folder of the TSW1200at https://www.wendangku.net/doc/e218225317.html,
–Place updated*.ini files in the TSW1200product directory located at C:\Program Files\Texas Instruments\TSW1200\ADC Files
?Select Single Tone FFT from the Test pull-down menu
?Select Data Capture Option>Capture Options>Two’s Complement Mode to set data format
?Select the desired channel(i.e.,Channel A or B)from the Channel Display pull-down menu
?Change ADC sampling rate to desired value(i.e.,250MHz or other)
?Change input frequency to desired value(i.e.170MHz or other)
?Press Ctrl-Shift-I to reset the software as needed
?Verify status display in lower left has no errors
?Press Capture button to initiate a data capture
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Figure4.TSW1200GUI
2.5ADS42xx Test Procedure
?Switch on5V power supply on ADC EVM.Verify source current is about330mA±30mA with clock and TSW1200connected at EVM default(i.e.,connected at250MHz).
?Connect clock signal at J19through an appropriate BPF.
–Adjust the signal generator amplitude output to0.6Vrms to provide approximately0.8Vpp at J19 through a BPF with about5dB attenuation plus cable losses.
–Use a high quality,low phase noise generator for this input to ensure proper device evaluation.
?Connect input signal through an appropriate BPF at either J6or J3(Channel A or B,i.e.,170MHz).
–Adjust frequency of generator to match the coherent frequency displayed in the TSW1200GUI.
–Select the proper Display Channel on the TSW1200GUI software that corresponds to the input connection.
–Adjust the signal generator amplitude output to achieve–1dBFS on FFT plot.
–Use a high quality,low phase noise generator for this input to ensure proper device evaluation.
?Initiate a capture by pressing the Capture button on the TSW1200GUI.
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Optional Configurations https://www.wendangku.net/doc/e218225317.html, 2.6ADS42xx Performance Results
Figure5shows the performance result at250MSPS clock frequency and with a170MHz input tone.
Figure5.FFT Plot:250MHz Clock,170MHz Input
3Optional Configurations
3.1THS4509Input Op-Amp Configuration
The default analog input configuration is transformer coupling through T1and T2for channel A,and T3 and T4for channel B.The optional configuration for analog input is through an Operational-Amplifier
THS4509.The changes required to modify the transformer coupled input to the OPA-driven input are
shown in Table3.
Table3.Jumper Setting for Transformer-Coupled or OPA-Driven Input
Jumpers or0ΩTransformer-Coupled Input(default)OPA-Driven Input
R119Install Do not install
R123Install Do not install
R120Do not install install
R129Do not install install
R143Install Do not install
R141Install Do not install
R131Do not install Install
R132Do not install Install
R93Install Do not install
R94Install Do not install
R95Do not install Install
R96Do not install Install
R97Install Do not install
R98Install Do not install
R99Do not install Install
R114Do not install Install
SJP3Shunt23,default Shunt12
SJP4Shunt23,default Shunt12
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https://www.wendangku.net/doc/e218225317.html, Optional Configurations J11and J13are the power supply for THS4509.An on-board layout option for a LPF or BPF is available between the amplifier and the ADC.By default the filter is bypassed to allow the user flexibility to design according to desired specifications.
3.2On-Board CDC72010Clock
The default clock input configuration is1:4transformer coupling through T6.The optional configuration is through clock driver CDC72010.The changes required to modify the transformer coupled clock input to clock driver input are shown in Table4.
Table4.Jumper Setting for Transformer-Coupled or CDC72010Input
Jumper Transformer-Coupled(Default)CDC72010
J14shunt open
JP20Shunt12Shunt12
JP21Shunt12Shunt12
J18open open
R1210ohm DNI
R122DNI0ohm
SJP7Short12Short34
SJP6Short34Short56
The on-board layout is available for the option of VCXO and crystal BPF.The CDCE72010comes with a default configuration(see CDCE72010data sheet(SCAS858)for details about device default
configuration).With a10MHz primary reference at J19and a983.04MHz VCXO on-board the CDC
outputs a LVCMOS clock at U0P(pin7)at245.76MHz.With a491.52MHz VCXO the CDC outputs a
LVCMOS clock at U0P at122.88MHz.The clock goes through an on-board crystal BPF(Y0)and is used as the input clock to the ADC through SJP6.
3.3Parallel CMOS Output
The default ADC output is configured as DDR LVDS output on the EVM.The layout provides an option of
1.8v parallel CMOS output from the ADC.The changes required to modify from DDR LVDS output to
parallel CMOS output are shown in Table5.
Table5.Jumper/Component Setting for DDR LVDS Output and Parallel CMOS
Output
Jumper/Component DDR LVDS Output Parallel CMOS
U12(SN74AVC16T245)DNI Installed
U13(SN74AVC16T245)DNI Installed
RN5to RN8Installed DNI
RN9to RN12Installed DNI
JP26Open Shunt
JP27Open Shunt
The CMOS output data is output from the EVM board at40-pin connectors J1(ch A)and J2(ch B).
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