DSP28335 2812 pwm

/* ==================================================================================
File name: F280XPWM.C

Originator: Digital Control Systems Group
Texas Instruments

Description: This file contains source for the PWM drivers for the F280x

Target: TMS320F280x family

=====================================================================================
History:
-------------------------------------------------------------------------------------
04-15-2005 Version 3.20: Using DSP280x v. 1.10 or higher
------------------------------------------------------------------------------------*/

#include "DSP280x_Device.h"
#include "f280xpwm.h"


void F280X_PWM_Init(PWMGEN *p)
{

// Setup Sync
EPwm1Regs.TBCTL.bit.SYNCOSEL = 0; // Pass through
EPwm2Regs.TBCTL.bit.SYNCOSEL = 0; // Pass through
EPwm3Regs.TBCTL.bit.SYNCOSEL = 0; // Pass through
EPwm4Regs.TBCTL.bit.SYNCOSEL = 0; // Pass through
EPwm5Regs.TBCTL.bit.SYNCOSEL = 0; // Pass through
EPwm6Regs.TBCTL.bit.SYNCOSEL = 0; // Pass through

// Allow each timer to be sync'ed
EPwm1Regs.TBCTL.bit.PHSEN = 1;
EPwm2Regs.TBCTL.bit.PHSEN = 1;
EPwm3Regs.TBCTL.bit.PHSEN = 1;
EPwm4Regs.TBCTL.bit.PHSEN = 1;
EPwm5Regs.TBCTL.bit.PHSEN = 1;
EPwm6Regs.TBCTL.bit.PHSEN = 1;

// Init Timer-Base Period Register for EPWM1-EPWM3
EPwm1Regs.TBPRD = p->PeriodMax;
EPwm2Regs.TBPRD = p->PeriodMax;
EPwm3Regs.TBPRD = p->PeriodMax;

// Init Timer-Base Phase Register for EPWM1-EPWM3
EPwm1Regs.TBPHS.half.TBPHS = 0;
EPwm2Regs.TBPHS.half.TBPHS = 0;
EPwm3Regs.TBPHS.half.TBPHS = 0;

// Init Timer-Base Control Register for EPWM1-EPWM3
EPwm1Regs.TBCTL.all = PWM_INIT_STATE;
EPwm2Regs.TBCTL.all = PWM_INIT_STATE;
EPwm3Regs.TBCTL.all = PWM_INIT_STATE;

// Init Compare Control Register for EPWM1-EPWM3
EPwm1Regs.CMPCTL.all = CMPCTL_INIT_STATE;
EPwm2Regs.CMPCTL.all = CMPCTL_INIT_STATE;
EPwm3Regs.CMPCTL.all = CMPCTL_INIT_STATE;

// Init Action Qualifier Output A Register for EPWM1-EPWM3
EPwm1Regs.AQCTLA.all = AQCTLA_INIT_STATE;
EPwm2Regs.AQCTLA.all = AQCTLA_INIT_STATE;
EPwm3Regs.AQCTLA.all = AQCTLA_INIT_STATE;

// Init Dead-Band Generator Control Register for EPWM1-EPWM3
EPwm1Regs.DBCTL.all = DBCTL_INIT_STATE;
EPwm2Regs.DBCTL.all = DBCTL_INIT_STATE;
EPwm3Regs.DBCTL.all = DBCTL_INIT_STATE;

// Init Dead-Band Generator Falling/Rising Edge Delay Register for EPWM1-EPWM3
EPwm1Regs.DBFED = DBCNT_INIT_STATE;
EPwm1Regs.DBRED = DBCNT_INIT_STATE;
EPwm2Regs.DBFED = DBCNT_INIT_STATE;
EPw

m2Regs.DBRED = DBCNT_INIT_STATE;
EPwm3Regs.DBFED = DBCNT_INIT_STATE;
EPwm3Regs.DBRED = DBCNT_INIT_STATE;

// Init PWM Chopper Control Register for EPWM1-EPWM3
EPwm1Regs.PCCTL.all = PCCTL_INIT_STATE;
EPwm2Regs.PCCTL.all = PCCTL_INIT_STATE;
EPwm3Regs.PCCTL.all = PCCTL_INIT_STATE;

EALLOW; // Enable EALLOW

// Init Trip Zone Select Register
EPwm1Regs.TZSEL.all = TZSEL_INIT_STATE;
EPwm2Regs.TZSEL.all = TZSEL_INIT_STATE;
EPwm3Regs.TZSEL.all = TZSEL_INIT_STATE;

// Init Trip Zone Control Register
EPwm1Regs.TZCTL.all = TZCTL_INIT_STATE;
EPwm2Regs.TZCTL.all = TZCTL_INIT_STATE;
EPwm3Regs.TZCTL.all = TZCTL_INIT_STATE;

// Setting six EPWM as primary output pins
GpioCtrlRegs.GPAMUX1.bit.GPIO0 = 1; // EPWM1A pin
GpioCtrlRegs.GPAMUX1.bit.GPIO1 = 1; // EPWM1B pin
GpioCtrlRegs.GPAMUX1.bit.GPIO2 = 1; // EPWM2A pin
GpioCtrlRegs.GPAMUX1.bit.GPIO3 = 1; // EPWM2B pin
GpioCtrlRegs.GPAMUX1.bit.GPIO4 = 1; // EPWM3A pin
GpioCtrlRegs.GPAMUX1.bit.GPIO5 = 1; // EPWM3B pin

EDIS; // Disable EALLOW

}


void F280X_PWM_Update(PWMGEN *p)
{
int16 MPeriod;
int32 Tmp;

// Compute the timer period (Q0) from the period modulation input (Q15)
Tmp = (int32)p->PeriodMax*(int32)p->MfuncPeriod; // Q15 = Q0*Q15
MPeriod = (int16)(Tmp>>16) + (int16)(p->PeriodMax>>1); // Q0 = (Q15->Q0)/2 + (Q0/2)
EPwm1Regs.TBPRD = MPeriod;
EPwm2Regs.TBPRD = MPeriod;
EPwm3Regs.TBPRD = MPeriod;

// Compute the compare A (Q0) from the EPWM1AO & EPWM1BO duty cycle ratio (Q15)
Tmp = (int32)MPeriod*(int32)p->MfuncC1; // Q15 = Q0*Q15
EPwm1Regs.CMPA.half.CMPA = (int16)(Tmp>>16) + (int16)(MPeriod>>1); // Q0 = (Q15->Q0)/2 + (Q0/2)

// Compute the compare B (Q0) from the EPWM2AO & EPWM2BO duty cycle ratio (Q15)
Tmp = (int32)MPeriod*(int32)p->MfuncC2; // Q15 = Q0*Q15
EPwm2Regs.CMPA.half.CMPA = (int16)(Tmp>>16) + (int16)(MPeriod>>1); // Q0 = (Q15->Q0)/2 + (Q0/2)

// Compute the compare C (Q0) from the EPWM3AO & EPWM3BO duty cycle ratio (Q15)
Tmp = (int32)MPeriod*(int32)p->MfuncC3; // Q15 = Q0*Q15
EPwm3Regs.CMPA.half.CMPA = (int16)(Tmp>>16) + (int16)(MPeriod>>1); // Q0 = (Q15->Q0)/2 + (Q0/2)

}