PM6670STR;PM6670S;STEVAL-ISA051V1;中文规格书,Datasheet资料

February 2010Doc ID 14432 Rev 41/54

PM6670S

Complete DDR2/3 memory power supply controller

Features

■

Switching section (VDDQ)

– 4.5 V to 28 V input voltage range –0.9 V , ±1 % voltage reference

– 1.8 V (DDR2) or 1.5 V (DDR3) fixed output voltages

–0.9 V to 2.6 V adjustable output voltage – 1.237 V ±1 % reference voltage available –Very fast load transient response using constant on-time control loop –No R SENSE current sensing using low side MOSFET’s R DS(ON) –Negative current limit –Latched OVP and UVP

–Soft-start internally fixed at 3 ms

–Selectable pulse skipping at light load –Selectable no-audible (33 kHz) pulse skip mode

–Ceramic output capacitors supported –Output voltage ripple compensation ■

VTT LDO and VTTREF

– 2 Apk LDO with foldback for VTT –Remote VTT sensing –High-Z VTT output in S3

–Ceramic output capacitors supported –±15 mA low noise buffered reference

Applications

■DDR2/3 memory supply ■Notebook computers ■Handheld and PDAs ■CPU and chipset I/O supplies

■

SSTL18, SSTL15 and HSTL bus termination

Description

The device PM6670S is a complete DDR2/3

power supply regulator designed to meet JEDEC specifications.

It integrates a constant on-time (COT) buck controller, a 2 Apk sink/source low drop out regulator and a 15 mA low noise buffered reference.

The COT architecture assures fast transient

response supporting both electrolytic and ceramic output capacitors. An embedded integrator control loop compensates the DC voltage error due to the output ripple.

The 2 Apk sink/source linear regulator provides the memory termination voltage with fast load transient response.

The device is fully compliant with system sleep states S3 and S4/S5, providing LDO output high impedance in suspend-to-RAM and tracking discharge of all outputs in suspend-to-disk. Table 1.

Device summary

Order code Package

Packaging PM6670S VFQFPN-24 4x4(Exposed pad)

Tube PM6670STR

T ape and reel

VFQFPN-24 4x4

https://www.wendangku.net/doc/f83095997.html,

Contents PM6670S

Contents

1Typical application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

2Pin settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

2.1Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

2.2Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

3Electrical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

3.1Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

3.2Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

3.3Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 4Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 5Typical operating characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 6Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

7Device description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

7.1VDDQ section - constant on-time PWM controller . . . . . . . . . . . . . . . . . . 21

7.1.1Constant-on-time architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

7.1.2Output ripple compensation and loop stability . . . . . . . . . . . . . . . . . . . . 24

7.1.3Pulse-skip and no-audible pulse-skip modes . . . . . . . . . . . . . . . . . . . . . 28

7.1.4Mode-of-operation selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

7.1.5Current sensing and current limit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

7.1.6POR, UVLO and soft-start . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

7.1.7Power Good signal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

7.1.8VDDQ output discharge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

7.1.9Gate drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

7.1.10Reference voltage and bandgap . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

7.1.11Over voltage and under voltage protections . . . . . . . . . . . . . . . . . . . . . 36

7.1.12Device thermal protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

7.2VTTREF buffered reference and VTT LDO section . . . . . . . . . . . . . . . . . 37

7.2.1VTT and VTTREF Soft-Start . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

7.2.2VTTREF and VTT outputs discharge . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 2/54Doc ID 14432 Rev 4

PM6670S Contents

7.3S3 and S5 power management pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

8Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

8.1External components selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

8.1.1Inductor selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

8.1.2Input capacitor selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42

8.1.3Output capacitor selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43

8.1.4MOSFETs selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

8.1.5Diode selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

8.1.6VDDQ current limit setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47

8.1.7All ceramic capacitors application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 9Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 10Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53

Doc ID 14432 Rev 43/54

Typical application circuit PM6670S 1 Typical application circuit

4/54Doc ID 14432 Rev 4

PM6670S Pin settings

Doc ID 14432 Rev 45/54

2 Pin settings

2.1 Connections

Pin settings PM6670S

6/54Doc ID 14432 Rev 4

2.2 Pin description

Table 2.

Pin functions

N°Pin Function

1VTTGND LDO power ground. Connect to negative terminal of VTT output capacitor.2

VTTSNS

LDO remote sensing. Connect as close as possible to the load via a low

noise PCB trace.

3DDRSEL

DDR voltage selector (if MODE is tied to VCC) or pulse-skip/no-audible pulse-skip selector in adjustable mode (MODE voltage lower than 3 V). See Section 7.1.4: Mode-of-operation selection on page 30.

4VTTREF

Low noise buffered DDR reference voltage. A 22 nF (minimum) ceramic bypass capacitor is required in order to achieve stability.

5SGND

Ground reference for analog circuitry, control logic and VTTREF buffer. Connect together with the thermal pad and VTTGND to a low impedance ground plane. See the Application Note for details.

6AVCC

+5 V supply for internal logic. Connect to +5 V rail through a simple RC filtering network.

7VREF

High accuracy output voltage reference (1.237 V) for multilevel pins setting. It can deliver up to 50 μA. Connect a 100 nF capacitor between VREF and SGND in order to enhance noise rejection.

8VOSC

Frequency selection. Connect to the central tap of a resistor divider to set the desired switching frequency. The pin cannot be left floating. See Section 7: Device description on page 20

9VSNS

VDDQ output remote sensing. Discharge path for VDDQ in Non-T racking Discharge. Input for internal resistor divider that provides VDDQ/2 to

VTTREF and VTT. Connect as close as possible to the load via a low noise PCB trace.

10MODE

Mode of operation selector. If MODE pin voltage is higher than 4 V , the fixed output mode is selected. If MODE pin voltage is lower than 4 V , it is used as negative input of the error amplifier. See Section 7.1.4: Mode-of-operation selection on page 30.

11COMP DC voltage error compensation Input for the switching section. Refer Section 7.1.4: Mode-of-operation selection on page 30.

12

DSCG

Discharge mode selection. Refer to Section 7.1.8: VDDQ output discharge on page 34 for tracking/non-tracking discharge or no-discharge options.13S5

Switching controller enable. Connect to S5 system status signal to meet S0-S5 power management states compliance. See Section 7.3: S3 and S5 power management pins on page 38, S5 pin can't be left floating.

14S3

Linear regulator enable. Connect to S3 system status signal to meet S0-S5 power management states compliance. See Section 7.3: S3 and S5 power management pins on page 38, S3 pin can't be left floating.

15PG Power Good signal (open drain output). High when VDDQ output voltage is within ±10 % of nominal value.16PGND Power ground for the switching section.17

LGA TE

Low-side gate driver output.

PM6670S

Pin settings

Doc ID 14432 Rev 47/54

18VCC +5 V low-side gate driver supply. Bypass with a 100 nF capacitor to PGND.19CSNS Current sense input for the switching section. This pin must be connected through a resistor to the drain of the synchronous rectifier (R DSon sensing) to set the current limit threshold.

20PHASE Switch node connection and return path for the high-side gate driver.21HGA TE High-side gate driver output

22

BOOT

Bootstrap capacitor connection. Positive supply input of the high-side gate driver.

23LDOIN

Linear regulator input. Connect to VDDQ in normal configuration or to a lower supply to reduce the power dissipation. A 10 μF bypass ceramic capacitor is suggested for noise rejection enhancement. See Section 7: Device description on page 20

24VTT

LDO linear regulator output. Bypass with a 20 μF (2x10 μF MLCC) filter capacitor.

Table 2.

Pin functions (continued)

N°Pin Function

Electrical data PM6670S

8/54Doc ID 14432 Rev 4

3 Electrical data

3.1 Maximum rating

3.2 Thermal data

Table 3.

Absolute maximum ratings (1)

1.Free air operating conditions unless otherwise specified. Stresses beyond those listed under “absolute

maximum ratings” may cause permanent damage to the device. Exposure to absolute maximum rated conditions for extended periods may affect device reliability.Symbol Parameter

Value Unit

V AVCC AVCC to SGND -0.3 to 6V V VCC

VCC to SGND

-0.3 to 6PGND, VTTGND to SGND -0.3 to 0.3HGA TE and BOOT to PHASE -0.3 to 6HGA TE and BOOT to PGND

-0.3 to 44V PHASE

PHASE to SGND (2)2.PHASE to SGND up to -2.5 V for t < 10 ns

-0.3 to 38LGA TE to PGND

-0.3 to V CC +0.3CSNS, PG, S3, S5, DSCG, COMP , VSNS,

VOSC, VREF , MODE, DDRSEL to GND -0.3 to V AVCC + 0.3VTTREF , VREF , VTT, VTTSNS to SGND -0.3 to V AVCC + 0.3LDOIN, VTT , VTTREF , LDOIN to VTTGND

-0.3 to V AVCC + 0.3

P TOT

Power dissipation @T A = 25 °C

2.3

W Table 4.

Thermal data

Symbol Parameter

Value Unit R thJA Thermal resistance junction to ambient 42°C/W T STG Storage temperature range

- 50 to 150°C T A Operating ambient temperature range - 40 to 85°C T J

Junction operating temperature range

- 40 to 125

°C

PM6670S Electrical data

Doc ID 14432 Rev 49/54

3.3 Recommended operating conditions

Table 5.

Recommended operating conditions

Symbol Parameter

Values

Unit

Min Typ Max V IN Input voltage range 4.5-28V V AVCC IC supply voltage 4.5- 5.5V VCC

IC supply voltage

4.5

- 5.5

Electrical characteristics PM6670S

10/54Doc ID 14432 Rev 4

4 Electrical characteristics

T A = 0 °C to 85 °C, VCC = AVCC = +5 V and LDOIN connected to VDDQ output if not

otherwise specified (a)

a.T A = T J . All parameters at operating temperature extremes are guaranteed by design and statistical analysis

(not production tested)

Table 6.

Electrical characteristics

Symbol Parameter

Test condition

Values

Unit

Min

Typ

Max

Supply section

I IN

Operating current S3, S5, MODE and DDRSEL

connected to AVCC, no load on VTT and VTTREF outputs. VCC connected to AVCC

0.82

mA

I STR

Operating current in STR S5, MODE and DDRSEL connected to AVCC, S3 tied to SGND, no load on VTTREF .

VCC connected to AVCC 0.61

I SH

Operating current in shutdown

S3 and S5 tied to SGND.Discharge mode active.VCC connected to AVCC

110μA

UVLO

AVCC under voltage lockout upper threshold

4.1 4.25 4.4

V

AVCC under voltage lockout lower threshold 3.85 4.0

4.1

UVLO hysteresis

70

mV

ON-time (SMPS)

t ON

On-time duration

MODE and DDRSEL high,

V VSNS = 2 V

VOSC = 300 mV 650750850ns

VOSC = 500 mV

390

450

510

OFF-time (SMPS)t OFFMIN

Minimum Off time

300

350

ns

Voltage reference

Voltage accuracy 4.5 V < V IN < 25 V 1.224 1.237

1.249V Load regulation

-50 μA< I VREF < 50 μA

-4

4

mV

Undervoltage lockout fault threshold

800

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PM6670STR PM6670S STEVAL-ISA051V1